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Wed, 10 Apr 2024 10:53:31 -0700 (PDT) From: Caleb Connolly Date: Wed, 10 Apr 2024 19:52:36 +0200 Subject: [PATCH v2 1/4] pinctrl: qcom: add qcm2290 pinctrl driver MIME-Version: 1.0 Message-Id: <20240410-b4-qcom-rbx-soc-v2-1-5120a9c7f6ce@linaro.org> References: <20240410-b4-qcom-rbx-soc-v2-0-5120a9c7f6ce@linaro.org> In-Reply-To: <20240410-b4-qcom-rbx-soc-v2-0-5120a9c7f6ce@linaro.org> To: Tom Rini , Neil Armstrong , Sumit Garg Cc: u-boot-qcom@groups.io, u-boot@lists.denx.de, Caleb Connolly X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=3680; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=wIhtbCK00y80rWMGbvITilPUuGZfCoQErVGMDMJBYc4=; b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmFtIZF2m7qYS1f17of0mqAAbQtJOrR4nh1+mPa zAG57FIvOCJAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZhbSGQAKCRAFgzErGV9k tn5RD/0bKVsP91Ol/sETUr11ixMxd9IBxEQFkG75CiPNXlzgFDGUoIZ7waWLPvyG1yA+uAaLUjB F0wtY7mhUEC7MqzW/6HqwElrIF3X82fgHV/vdIPnjpgVGHlowsnkGxWK4V8bBUSj84GgUrl9vZJ 80VimVXg1KyMfuOYEnUSZMxYdros72k7OpZVR2Q8J7x/aqmI8fF0sGYUTRu1GrHkftLHthdCZHo Kw7V7pHY0Ix1vbji9Zw0GRmXUT+WabuFaFTqm/nvnI8kOGkB30NbK6YcKqZD58OnNgAxGKPRMck CvthkTv5AYZ1RS9RYE+GDnuD3S5WMV4uA2PK6aAxmdK9A07Xve5WQwE2JeyLFwELpT8+2EQcd6H iaDumXD66JH0JI4mOM+45y9UdsRNOnX1EiGgRIT60JwXV2bxm707uOfDEwDwC8b9nsAR4Bz5IKz d4F7zcz7yCq04CrsIvmTC8HHsCxCwnn99Szi2W8T44EbQgBUBEv/F2NpYjVQcJmj+JMbgcyZCf7 IgvC5UpJssauq/rhHp5IDpGn4ZFip3VIG0c8q/qJwPN9W8ie7kg5MuxhHKt1JOx7IaIQ4zdovsk YbP9/eyi+BIi0F5YYGZJpFSGnoePIRnpywLWL9nK/gr51nvT1qwUd79dCi5+LPwIPLkUNcCKVaw tOSsrsHhwmq69YA== X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This SoC has a basic pinctrl block with no tiles. Signed-off-by: Caleb Connolly --- drivers/pinctrl/qcom/Kconfig | 7 ++++ drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-qcm2290.c | 70 ++++++++++++++++++++++++++++++++++ 3 files changed, 78 insertions(+) diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index 2fe639814785..35140efd5b62 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -26,8 +26,15 @@ config PINCTRL_QCOM_IPQ4019 help Say Y here to enable support for pinctrl on the IPQ4019 SoC, as well as the associated GPIO driver. +config PINCTRL_QCOM_QCM2290 + bool "Qualcomm QCM2290 GCC" + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the Snapdragon QCM2290 SoC, + as well as the associated GPIO driver. + config PINCTRL_QCOM_QCS404 bool "Qualcomm QCS404 GCC" select PINCTRL_QCOM help diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 6d9aca6d7b7e..0b1d610ea3e8 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_PINCTRL_QCOM) += pinctrl-qcom.o obj-$(CONFIG_PINCTRL_QCOM_APQ8016) += pinctrl-apq8016.o obj-$(CONFIG_PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o +obj-$(CONFIG_PINCTRL_QCOM_QCM2290) += pinctrl-qcm2290.o obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o diff --git a/drivers/pinctrl/qcom/pinctrl-qcm2290.c b/drivers/pinctrl/qcom/pinctrl-qcm2290.c new file mode 100644 index 000000000000..af969e177d73 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-qcm2290.c @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm qcm2290 pinctrl + * + * (C) Copyright 2024 Linaro Ltd. + * + */ + +#include + +#include "pinctrl-qcom.h" + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +static const struct pinctrl_function msm_pinctrl_functions[] = { + { "qup4", 1 }, + { "gpio", 0 }, +}; + +static const char *qcm2290_get_function_name(struct udevice *dev, unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *qcm2290_get_pin_name(struct udevice *dev, unsigned int selector) +{ + static const char *const special_pins_names[] = { + "sdc1_rclk", "sdc1_clk", "sdc1_cmd", "sdc1_data", + "sdc2_clk", "sdc2_cmd", "sdc2_data", + }; + + if (selector >= 127 && selector <= 133) + snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 127]); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + + return pin_name; +} + +static unsigned int qcm2290_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +struct msm_pinctrl_data qcm2290_data = { + .pin_data = { + .pin_count = 133, + .special_pins_start = 127, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = qcm2290_get_function_name, + .get_function_mux = qcm2290_get_function_mux, + .get_pin_name = qcm2290_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { + .compatible = "qcom,qcm2290-tlmm", + .data = (ulong)&qcm2290_data + }, + { /* Sentinel */ } }; + +U_BOOT_DRIVER(pinctrl_qcm2290) = { + .name = "pinctrl_qcm2290", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +};