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[92.17.96.232]) by smtp.gmail.com with ESMTPSA id u17-20020a05600c19d100b00416b163e52bsm7166057wmq.14.2024.04.18.10.26.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 10:26:26 -0700 (PDT) From: Caleb Connolly Date: Thu, 18 Apr 2024 18:25:47 +0100 Subject: [PATCH 4/9] phy: qcom: snps-femto-v2: drop clocks MIME-Version: 1.0 Message-Id: <20240418-b4-qcom-rbx-fixes-v1-4-f5f19d52969e@linaro.org> References: <20240418-b4-qcom-rbx-fixes-v1-0-f5f19d52969e@linaro.org> In-Reply-To: <20240418-b4-qcom-rbx-fixes-v1-0-f5f19d52969e@linaro.org> To: Caleb Connolly , Neil Armstrong , Sumit Garg , Tom Rini Cc: u-boot-qcom@groups.io, u-boot@lists.denx.de X-Mailer: b4 0.14-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=2290; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=ICCz9hpOfFIT7tLy64Sy4o+II72OOqyAu2y9tUZCKcE=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhjTF8H1zp3+Sbb25aFv5PP2Oyft1o+Vvt5cvdlh0WzlRY 139vu8WHaUsDIIcDLJiiiziJ5ZZNq29bK+xfcEFmDmsTCBDGLg4BWAi+usYGWYKpbZ9DvcpsntZ K13z8C6DZWzUi/Dp71MY/306/ex4Ngcjw8LF7zdoKC9ZEHe4XytEo5znytlcoXqPBpvbnd7LPdP 7zwIA X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean There is a clock associated with this phy, but it's always from the rpmhcc and isn't actually needed for the hardware to work. Drop all the clock handling from the driver. Signed-off-by: Caleb Connolly --- drivers/phy/qcom/phy-qcom-snps-femto-v2.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/drivers/phy/qcom/phy-qcom-snps-femto-v2.c b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c index a1675b664e46..04f0f0e7817d 100644 --- a/drivers/phy/qcom/phy-qcom-snps-femto-v2.c +++ b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c @@ -5,10 +5,8 @@ * * Based on Linux driver */ -#include -#include #include #include #include #include @@ -16,9 +14,8 @@ #include #include #include -#include #include #include #define USB2_PHY_USB_PHY_UTMI_CTRL0 (0x3c) @@ -61,9 +58,8 @@ #define REFCLK_SEL_DEFAULT (0x2 << 0) struct qcom_snps_hsphy { void __iomem *base; - struct clk_bulk clks; struct reset_ctl_bulk resets; }; /* @@ -142,10 +138,8 @@ static int qcom_snps_hsphy_power_on(struct phy *phy) { struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev); int ret; - clk_enable_bulk(&priv->clks); - ret = reset_deassert_bulk(&priv->resets); if (ret) return ret; @@ -160,9 +154,8 @@ static int qcom_snps_hsphy_power_off(struct phy *phy) { struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev); reset_assert_bulk(&priv->resets); - clk_disable_bulk(&priv->clks); return 0; } @@ -174,21 +167,14 @@ static int qcom_snps_hsphy_phy_probe(struct udevice *dev) priv->base = dev_read_addr_ptr(dev); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); - ret = clk_get_bulk(dev, &priv->clks); - if (ret < 0 && ret != -ENOENT) { - printf("%s: Failed to get clocks %d\n", __func__, ret); - return ret; - } - ret = reset_get_bulk(dev, &priv->resets); if (ret < 0) { printf("failed to get resets, ret = %d\n", ret); return ret; } - clk_enable_bulk(&priv->clks); reset_deassert_bulk(&priv->resets); return 0; }