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[85.214.62.61]) by mx.google.com with ESMTPS id ffacd0b85a97d-3730811706fsi3971861f8f.180.2024.08.26.05.03.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Aug 2024 05:03:43 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D0B9B88BBE; Mon, 26 Aug 2024 14:01:39 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id DDAEC88BBE; Mon, 26 Aug 2024 14:01:37 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED, SPF_HELO_NONE,SPF_SOFTFAIL,T_FILL_THIS_FORM_SHORT,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id E1D9F88A2E for ; Mon, 26 Aug 2024 14:01:35 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8FCA811FB; Mon, 26 Aug 2024 05:02:01 -0700 (PDT) Received: from a079122.blr.arm.com (a079122.arm.com [10.162.17.48]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ACAC53F762; Mon, 26 Aug 2024 05:01:31 -0700 (PDT) From: Sughosh Ganu To: u-boot@lists.denx.de Cc: Simon Glass , Tom Rini , Ilias Apalodimas , Heinrich Schuchardt , Marek Vasut , Mark Kettenis , Michal Simek , Patrick DELAUNAY , Patrice CHOTARD , =?utf-8?q?Marek_Beh=C3=BAn?= , Sughosh Ganu Subject: [PATCH v4 21/27] spl: sandbox: initialise the ram banksize in spl Date: Mon, 26 Aug 2024 17:29:34 +0530 Message-Id: <20240826115940.3233167-22-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240826115940.3233167-1-sughosh.ganu@linaro.org> References: <20240826115940.3233167-1-sughosh.ganu@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Initialise the ram bank information for sandbox in SPL. The ram bank information gets initialised as part of the SPL initialisation sequence in board_init_r(), which is then used for adding available memory to the LMB memory map. Signed-off-by: Sughosh Ganu Reviewed-by: Simon Glass --- Changes since V3: None arch/sandbox/cpu/spl.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c index cc46965b73..1c33a520c6 100644 --- a/arch/sandbox/cpu/spl.c +++ b/arch/sandbox/cpu/spl.c @@ -127,6 +127,15 @@ static int load_from_image(struct spl_image_info *spl_image, } SPL_LOAD_IMAGE_METHOD("sandbox_image", 7, BOOT_DEVICE_BOARD, load_from_image); +int dram_init_banksize(void) +{ + /* These are necessary so TFTP can use LMBs to check its load address */ + gd->bd->bi_dram[0].start = gd->ram_base; + gd->bd->bi_dram[0].size = get_effective_memsize(); + + return 0; +} + void spl_board_init(void) { struct sandbox_state *state = state_get_current(); @@ -134,10 +143,6 @@ void spl_board_init(void) if (!CONFIG_IS_ENABLED(UNIT_TEST)) return; - /* These are necessary so TFTP can use LMBs to check its load address */ - gd->bd->bi_dram[0].start = gd->ram_base; - gd->bd->bi_dram[0].size = get_effective_memsize(); - if (state->run_unittests) { struct unit_test *tests = UNIT_TEST_ALL_START(); const int count = UNIT_TEST_ALL_COUNT();