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b=YLSSDxambd5CmLIqBH95q0yPvDtz61iGQ+ap+HKh5R5/almKNkKkPiE0iLZw3kAqo5 itt2ZxoH7pik1o9In2788nIgDMGnAHaAJP/GxZeLeKmkLuc6I8RjRF/wjO9IW+hCXZMl pzxxKcNXAssBma/PBbBs/XfU129Qn24zvC9HC9h37jGV8gGsZ4UlNXGD7Sjks986ogrx ZZDyiCEuF+OoTmH/q/g45cG9z/IvXIFFxYSbdV2GvCnB7zTt9ARE19tTlWcSIKj/+zdV 61KjJAdpXqmqR4kB6ol/YRCHKcybXyb/nsASXu/6wQ295mTQYqP1m2JKUCgkppZfKwhz 5/Iw== X-Gm-Message-State: AOJu0YwreoNUDd0hddzFmsh+YaNMUXW3u+kMSlT7VhK6VQpBye56Q72M nT8d/8xJvM9CzR0ICVgsRFQ3oisLtYTTJ2jx3XMYZQ4debep1UA/MooyJzjIyxQ= X-Received: by 2002:a5d:4585:0:b0:368:7f53:6b57 with SMTP id ffacd0b85a97d-378d61e282dmr8636146f8f.18.1726480731616; Mon, 16 Sep 2024 02:58:51 -0700 (PDT) Received: from lino.lan ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a906109662fsm292862966b.38.2024.09.16.02.58.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Sep 2024 02:58:51 -0700 (PDT) From: Linus Walleij Date: Mon, 16 Sep 2024 11:58:46 +0200 Subject: [PATCH v2 4/7] mtd: rawnand: brcmnand: Fix mtd oobsize MIME-Version: 1.0 Message-Id: <20240916-brcmnand-fixes-v2-4-08632f64c8ec@linaro.org> References: <20240916-brcmnand-fixes-v2-0-08632f64c8ec@linaro.org> In-Reply-To: <20240916-brcmnand-fixes-v2-0-08632f64c8ec@linaro.org> To: u-boot@lists.denx.de, Dario Binacchi , Michael Trimarchi , Anand Gore , William Zhang , Kursad Oney , Philippe Reynes Cc: Linus Walleij , Miquel Raynal X-Mailer: b4 0.14.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: William Zhang Backport from upstream Linux commit 60177390fa061c62d156f4a546e3efd90df3c183 "mtd: rawnand: brcmnand: Fix mtd oobsize" brcmnand controller can only access the flash spare area up to certain bytes based on the ECC level. It can be less than the actual flash spare area size. For example, for many NAND chip supporting ECC BCH-8, it has 226 bytes spare area. But controller can only uses 218 bytes. So brcmand driver overrides the mtd oobsize with the controller's accessible spare area size. When the nand base driver utilizes the nand_device object, it resets the oobsize back to the actual flash spare aprea size from nand_memory_organization structure and controller may not able to access all the oob area as mtd advises. This change fixes the issue by overriding the oobsize in the nand_memory_organization structure to the controller's accessible spare area size. Fixes: a7ab085d7c16 ("mtd: rawnand: Initialize the nand_device object") Signed-off-by: William Zhang Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20230706182909.79151-6-william.zhang@broadcom.com Signed-off-by: Linus Walleij Reviewed-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 60d34bd21f53..552b239b95ae 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -2304,6 +2305,8 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) { struct mtd_info *mtd = nand_to_mtd(&host->chip); struct nand_chip *chip = &host->chip; + struct nand_device *nanddev = mtd_to_nanddev(mtd); + struct nand_memory_organization *memorg = nanddev_get_memorg(nanddev); struct brcmnand_controller *ctrl = host->ctrl; struct brcmnand_cfg *cfg = &host->hwcfg; char msg[128]; @@ -2331,10 +2334,11 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) if (cfg->spare_area_size > ctrl->max_oob) cfg->spare_area_size = ctrl->max_oob; /* - * Set oobsize to be consistent with controller's spare_area_size, as - * the rest is inaccessible. + * Set mtd and memorg oobsize to be consistent with controller's + * spare_area_size, as the rest is inaccessible. */ mtd->oobsize = cfg->spare_area_size * (mtd->writesize >> FC_SHIFT); + memorg->oobsize = mtd->oobsize; cfg->device_size = mtd->size; cfg->block_size = mtd->erasesize;