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Mon, 25 Nov 2024 09:12:59 -0800 (PST) From: Neil Armstrong Date: Mon, 25 Nov 2024 18:12:56 +0100 Subject: [PATCH 1/2] rng: msm: add support for newer Qualcomm hwrandom IPs MIME-Version: 1.0 Message-Id: <20241125-topic-sm8x50-rng-v1-1-52b72821c3e9@linaro.org> References: <20241125-topic-sm8x50-rng-v1-0-52b72821c3e9@linaro.org> In-Reply-To: <20241125-topic-sm8x50-rng-v1-0-52b72821c3e9@linaro.org> To: Robert Marko , Luka Perkov , Sughosh Ganu , Heinrich Schuchardt , Tom Rini , Caleb Connolly , Sumit Garg Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1820; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=eBg4Ydo4UCF/rdI47CkqU7I7R82YACn0mrqKh33uHJg=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnRLAZDOs4YzDpAFqWAZRLAeXoUOmUPqZuaat6VKLd FJ3CJWmJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ0SwGQAKCRB33NvayMhJ0TNdEA CmWnSWeaJRLu2VrF5HWhWqBjWU6VxqjcuBQMbUDi7qHExkI7dbQyyII/KPdXhrhFMZehvLvLxpIlRg hhy8hpt+Y+D0wlS4BtlKqRf3GJLo34cYmM00fYh1N+NH5BtHNHiKm13fyg6DpDvp9GWt5cxhRNS3gY c5lxz8K5eb9wHKeSo7M+uwJRexMUzrDmjWu894ckBUNIpPvQXDAoXcOp6TMC3xB0aHMkcUUQN+l2Vk raW08JnNEiq6TzUquI+sC+mGJj2GKrkddyf3xRD0WKDZ0sUdP38c7IyO9vXehnQq2kWlqhg7KzBH2i Dt1agwWF6mwWcKtfDbxQhLdIclRPTjcyxjZKpvBFofA+cO/8UMz6XECjB2+qw2OOVqQTIeFo8pFXrr hoJxzXDx3fHbiD0rvlYbE6jfq/He3wuEUaSfRrkkxNsXBkGDopJ5RAViPTA+VyzgNksre/U0dkMh7p Z0sKJHHhKI2MvSdQLPWq3eCnyu9VHiovkAPQk5n+I25lbgoRZUo7C322XPzSI5ZXcdNxGsNk3ziwoB aMXlmwKRui8XuONMgQc2zlCLEopAhR3G69P6AuN5IRCbG1bDCeccpJ14gSrMRHO3AdkMW4ioPPjuhy BiIUPMZU5l6nIDgeZZ4wiKkm0+ZT2Nb9iJ4HZuQaQwmhnkSpBr732I2hpAAA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On recent Qualcomm SoCs, the hardware random generator is initialized and handled by the firmware because shared between different Execution Environments (EE), thus the initialization step should be skipped. Also support the newer "TRNG" found on SM8550 and newer SoCs that has inbuilt NIST SP800 90B compliant entropic source. Signed-off-by: Neil Armstrong Tested-by: Alexey Minnekhanov --- drivers/rng/msm_rng.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/rng/msm_rng.c b/drivers/rng/msm_rng.c index 658c153d3edb2590b0b470e3067da9aac76169ac..f790d3b60f99bfc04ecd9acdd21405a8c38c257a 100644 --- a/drivers/rng/msm_rng.c +++ b/drivers/rng/msm_rng.c @@ -34,6 +34,7 @@ struct msm_rng_priv { phys_addr_t base; struct clk clk; + bool skip_init; }; static int msm_rng_read(struct udevice *dev, void *data, size_t len) @@ -100,10 +101,15 @@ static int msm_rng_probe(struct udevice *dev) int ret; + priv->skip_init = (bool)dev_get_driver_data(dev); + priv->base = dev_read_addr(dev); if (priv->base == FDT_ADDR_T_NONE) return -EINVAL; + if (priv->skip_init) + return 0; + ret = clk_get_by_index(dev, 0, &priv->clk); if (ret) return ret; @@ -119,6 +125,9 @@ static int msm_rng_remove(struct udevice *dev) { struct msm_rng_priv *priv = dev_get_priv(dev); + if (priv->skip_init) + return 0; + return msm_rng_enable(priv, 0); } @@ -127,7 +136,9 @@ static const struct dm_rng_ops msm_rng_ops = { }; static const struct udevice_id msm_rng_match[] = { - { .compatible = "qcom,prng", }, + { .compatible = "qcom,prng", .data = (ulong)false }, + { .compatible = "qcom,prng-ee", .data = (ulong)true }, + { .compatible = "qcom,trng", .data = (ulong)true }, {}, };