From patchwork Thu Jul 7 12:35:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Harkin X-Patchwork-Id: 71576 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp1380404qgy; Thu, 7 Jul 2016 05:35:52 -0700 (PDT) X-Received: by 10.28.173.8 with SMTP id w8mr25411365wme.39.1467894952606; Thu, 07 Jul 2016 05:35:52 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id q190si3003816wmg.17.2016.07.07.05.35.52; Thu, 07 Jul 2016 05:35:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 336634BA5C; Thu, 7 Jul 2016 14:35:51 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0jU1-EnzfUTE; Thu, 7 Jul 2016 14:35:51 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AE5F84BA0E; Thu, 7 Jul 2016 14:35:50 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6409C4BA0E for ; Thu, 7 Jul 2016 14:35:46 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YLyoQuhZXOUQ for ; Thu, 7 Jul 2016 14:35:46 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lf0-f51.google.com (mail-lf0-f51.google.com [209.85.215.51]) by theia.denx.de (Postfix) with ESMTPS id 1E8C14B9B1 for ; Thu, 7 Jul 2016 14:35:42 +0200 (CEST) Received: by mail-lf0-f51.google.com with SMTP id q132so10356392lfe.3 for ; Thu, 07 Jul 2016 05:35:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=9/6cj7QXm1N+p9FIw5F0bNCvEV+WxRfw/m3Aa33DpOs=; b=R+KM2qXj/fqSZ/UDcw21W+aIHgwDanrblcPUmPGsl6tP0p+hpbvIzFGvD1IZPH8Gu+ bh2JPxEStPm3bSgwUnnZ1tzbY+rEqxhDy85brLfEtEScds/DRG8lYnAuuP2nRVGIBnt4 O6whLuB/rqV3hLzAceFD9sZgKHqINRlCcoXFA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=9/6cj7QXm1N+p9FIw5F0bNCvEV+WxRfw/m3Aa33DpOs=; b=NMJXL6VPOf2VTbaWIcMrHLV7nDEex1QezPIAhKzuYDIRIionsB8V0lq3CIuX5e4ChH BcbSeZj15j+Wivm9bBCmR53NJajb3b7qmEMggee6azDswnKbTl9F6UNocx09UApt+PRB V53amysRAHLRlHxPHD1zKiw45LfymiSPAA9Ds7wLA+2Ld39mNUG5PDl7Ydtaif7b0SE0 OCAsSXUM9AhP8n31NXkdIShnlKSvtdKLDYfW97wyWCYHCW+QEP00eNHe9pK++gPh9CH7 KUIoSMzxkOI/8sumrCtI1fh51KgO5K7LGmXS2zJDDnPkiJE+QSHHNFbuZbnSEFpnuzf9 Dn7A== X-Gm-Message-State: ALyK8tLO1AhPTRc7RKrY/FigdR8o6KI6NIb7S/WYlSIeIL95xUn799TUaOKcR2r84FEmu1QK36hG80YGHrfPkKIa X-Received: by 10.46.71.83 with SMTP id u80mr6723573lja.15.1467894942274; Thu, 07 Jul 2016 05:35:42 -0700 (PDT) MIME-Version: 1.0 Received: by 10.25.213.202 with HTTP; Thu, 7 Jul 2016 05:35:41 -0700 (PDT) In-Reply-To: <577E4B6C.8020205@suse.de> References: <1467873048-46777-1-git-send-email-b18965@freescale.com> <1467873048-46777-2-git-send-email-b18965@freescale.com> <577E4B6C.8020205@suse.de> From: Ryan Harkin Date: Thu, 7 Jul 2016 13:35:41 +0100 Message-ID: To: Alexander Graf Cc: David Feng , jason.jin@nxp.com, leoyang.li@nxp.com, U-Boot ML , scott.wood@nxp.com Subject: Re: [U-Boot] [PATCH v5 1/2] armv8: Support loading 32-bit OS in AArch32 execution state X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" On 7 July 2016 at 13:30, Alexander Graf wrote: > On 07/07/2016 02:16 PM, Ryan Harkin wrote: >> >> On 7 July 2016 at 07:30, Alison Wang wrote: >>> >>> To support loading a 32-bit OS, the execution state will change from >>> AArch64 to AArch32 when jumping to kernel. >>> >>> The architecture information will be got through checking FIT image, >>> then U-Boot will load 32-bit OS or 64-bit OS automatically. >>> >>> Signed-off-by: Ebony Zhu >>> Signed-off-by: Alison Wang >>> Signed-off-by: Chenhui Zhao >> >> Unfortunately, this patch fails to boot for me. >> >> On FVP Foundation models, I see this error before the model hangs: >> >> [snip] >> Starting kernel ... >> >> resetting ... >> [snip] >> >> And I see the same output on AEMv8 Base models and Juno boards, only >> they reset continuously rather than hang. >> >> I think the problem is that I see this from ARM Trusted Firmware on boot: >> >> INFO: BL31: Preparing for EL3 exit to normal world >> >> Looking at the patch, it appears to be changing everything to boot in EL2. > > > That was the case before the patch (with the removal of the EL1 boot thing) > already. Linux can't run in EL3, that's why it has to boot in EL2 (or EL1, > but that really should be limited to VMs). > Pah! I misread the patch, specifically this hunk (and the one before it, I suppose): That's a "-", not a "+" on the call to armv8_switch_to_el2(). Either way, all my platforms are dead with this patch. > > Alex > _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index e3c9832..59adab8 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -193,7 +193,6 @@ static void do_nonsec_virt_switch(void) { smp_kick_all_cpus(); dcache_disable(); /* flush cache before swtiching to EL2 */ - armv8_switch_to_el2(); } #endif