From patchwork Fri Sep 8 18:23:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 112114 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp660205qgf; Fri, 8 Sep 2017 11:23:30 -0700 (PDT) X-Received: by 10.84.244.6 with SMTP id g6mr4504849pll.223.1504895010222; Fri, 08 Sep 2017 11:23:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1504895010; cv=none; d=google.com; s=arc-20160816; b=jf+wMwLTww05762q3ISuEVyT8ZHZcMybcksifJ4izQHnwKAvJ/WFBQ9BdV9U9GMaPa 5eAe1AsGWB/MbSFc6vhEeQd3Qvt4Eg+s/Ulyki1nBekTtEPRKz9cdZjTs9Nurtfnv5Ld WLBfEalnJvS+5RFvSUl48G92JidFa1dEZKQxwXlBuDy/KS2hqMUXeZ+jYFrz5JmtDF0A F0vuHoSRkPr0cJU0PCv5RhNHKuW75HyHLx8HG5N129+SzfzzBI6lL20LIy7ynCuCPWx2 pKubI3OXicPf+VDlvs04nY+yTRORenz0shUzfmMu4UZrTYoyEq5pTkRuO9dw+nBTuq2k 8Czg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:dkim-signature :delivered-to:arc-authentication-results; bh=dKL1g5Aq69ahT5CtTb7kJKF7PAUXc+o+GJiqBcK4CGg=; b=Vlc+M8q3bdWBho4pwTJQWt2AsQN6MwDnfSwPfy3ThkTud5giJViB1lZnANsomfltQX vPzQEpWeqwNn5Y3hMW16MTMmksMz0+SlY8SnwdVyPxWUFYtDmri9SKr9XajskC2ND9e+ Gufkl7dLRIkzZxMiEqmnUBj9bLStJvTcgSSVDtVQvMKswecewTLiQu0L9ZjIhF9DdP1X 8m9lMwHYbPG1qSP3f9Jzo7Xr/gYvVzxLtfcQ56HHWcLJiKJ3QNh56qlIRGk7l/xY6YXp DuAtOwvrNkQHAvWpz4IOuYVSLyiW4GuJbrF5nx8CfVaJLaQ9wydHv82NzTfz+QvBpSV/ 3X7g== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hNu4oy74; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id t25si1877871pge.211.2017.09.08.11.23.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Sep 2017 11:23:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hNu4oy74; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E07FD21E87998; Fri, 8 Sep 2017 11:20:36 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x22f.google.com (mail-wm0-x22f.google.com [IPv6:2a00:1450:400c:c09::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A068D21E87991 for ; Fri, 8 Sep 2017 11:20:35 -0700 (PDT) Received: by mail-wm0-x22f.google.com with SMTP id i189so9389557wmf.1 for ; Fri, 08 Sep 2017 11:23:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=hYwHxqPWg3Ld3XcBhhz52BWb76lohROovUg5GF14pOI=; b=hNu4oy74DtG0DwidaCZUcEo+zayzN2OuWgr/c7pxrzItalLygpRP7I7GiDdaC1/Ga1 22UyII1Vssm6/7QpFlpatNk2WMLYVmRUvFuQrHtwl/fZedjH5FKsyculs4mtqA+i/UXm aVTZkAwQkkCI+XOpGRECF5ycYBH9VUkf5i2ag= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=hYwHxqPWg3Ld3XcBhhz52BWb76lohROovUg5GF14pOI=; b=qSY94KfJilyyU6AVArsXeQLmp8m07ohQWqD5DTidXekaIbq2GF+OhsJbRNNiM4j8T8 kJL82bj00Lm6obiY0MyFOjNRmfyahrkG1E39NzggcTvBMuPdSlUxHqcsb9roz1mVtV9X yRf6MxnADpR3M1oy4UNJxIOv3aiUloyQ7JzO1ac1aBrBNULuhoZTn7//gWIxtmoEyHdW C+u1hvxtWXRGXcpAdmYHxzT3NyjWyioKCvA3KKKJttA5VExOTx1EInKdWxRSKbqm78Ad py/fB6PgPwyXll+yeeJijt5eFmvwzsHLp2zev7low7PDLC1yE6iec3FnL9+wh2DgfbYM no4Q== X-Gm-Message-State: AHPjjUiXDw6/xYy1SQiJz1VbUeAvbQFBifbiGEAG8Vocd6wfasKWT76y 6QnPHRgNjANVzjT4yEsGPY0wIE0viVA= X-Google-Smtp-Source: AOwi7QBqMJ8IIVS4RngRzH8Arl6O9jgxQGNlHjSTkR+zWkF1HvQm7yihtlqdtsZPQ5DFdV11GZ4tzg== X-Received: by 10.28.30.73 with SMTP id e70mr2133027wme.151.1504895006320; Fri, 08 Sep 2017 11:23:26 -0700 (PDT) Received: from localhost.localdomain ([154.151.223.220]) by smtp.gmail.com with ESMTPSA id s196sm3254354wmb.6.2017.09.08.11.23.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Sep 2017 11:23:25 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 8 Sep 2017 19:23:01 +0100 Message-Id: <20170908182315.9591-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 Subject: [edk2] [PATCH edk2-platforms 00/14] add support for Socionext Synquacer EVB X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: masahisa.kojima@linaro.org, methavanitpong.pipat@socionext.com, masami.hiramatsu@linaro.org, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" This adds support for the Socionext Synquacer SC2A11 evaluation board. It implements support for the core peripherals (CPU, GIC, serial), and for the two PCIe RCs present on this board. (Note that the board requires PCI slot CN2 to be populated or it will not boot). Both ACPI and DT hardware descriptions are provided. In ACPI mode, Debian stretch can be booted and installed on PCIe based peripherals, and requires a PCIe based network card that already has upstream support. The DT description contains references to drivers that are not upstream yet, and will be merged into Linux v4.15 at the earliest. No other OS support is currently planned (as far as I am aware) The non-volatile EFI variable store is backed by the SPI NOR flash, which is therefore not exposed to the OS. Note that it occupies the 'devtree' partition, which must be wiped before use. A driver for the NETSEC network interface is included, which means network boot is supported as well. (Note that this driver deviates in coding style. This code is based on the platform independent driver provided by Socionext, and making cosmetic changes to it will only make it more difficult to track upstream changes) Note that this firmware requires a version of the CM3 firmware that is compatible with the PCIe window configuration as can be found in the file Silicon/Socionext/Synquacer/Include/Platform/Pcie.h (patch #1) Ard Biesheuvel (14): Silicon/Synquacer: add package with platform headers Silicon/Synquacer: add MemoryInitPeiLib implementation Platform: add support for Socionext Synquacer eval board Silicon/Synquacer: implement PciSegmentLib to support dual RCs Silicon/Synquacer: implement PciHostBridgeLib support Silicon/Synquacer: implement EFI_CPU_IO2_PROTOCOL Platform/SynquacerEvalBoard: add PCI support Silicon/Socionext: add driver for NETSEC network controller Platform/SynquacerEvalBoard: add NETSEC driver Silicon/Synquacer: add ACPI support Silicon/Synquacer: add device tree support for eval board Silicon/Synquacer: add NorFlashPlatformLib implementation Silicon/Socionext: add driver for SPI NOR flash Platform/Synquacer: incorporate NOR flash and variable drivers Platform/Socionext/SynquacerEvalBoard/SynquacerEvalBoard.dsc | 528 +++++++ Platform/Socionext/SynquacerEvalBoard/SynquacerEvalBoard.fdf | 361 +++++ Silicon/Socionext/Synquacer/AcpiTables/AcpiSsdtRootPci.asl | 292 ++++ Silicon/Socionext/Synquacer/AcpiTables/AcpiTables.h | 58 + Silicon/Socionext/Synquacer/AcpiTables/AcpiTables.inf | 58 + Silicon/Socionext/Synquacer/AcpiTables/Dsdt.asl | 168 +++ Silicon/Socionext/Synquacer/AcpiTables/Fadt.aslc | 88 ++ Silicon/Socionext/Synquacer/AcpiTables/Gtdt.aslc | 98 ++ Silicon/Socionext/Synquacer/AcpiTables/Iort.aslc | 164 +++ Silicon/Socionext/Synquacer/AcpiTables/Madt.aslc | 152 ++ Silicon/Socionext/Synquacer/AcpiTables/Mcfg.aslc | 63 + Silicon/Socionext/Synquacer/AcpiTables/Spcr.aslc | 127 ++ Silicon/Socionext/Synquacer/DeviceTree/Synquacer.dtsi | 517 +++++++ Silicon/Socionext/Synquacer/DeviceTree/SynquacerEvalBoard.dts | 21 + Silicon/Socionext/Synquacer/DeviceTree/SynquacerEvalBoard.inf | 28 + Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/Fip006Dxe.dec | 31 + Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/Fip006Dxe.inf | 78 ++ Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/Fip006Reg.h | 242 ++++ Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/NorFlashBlockIoDxe.c | 136 ++ Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/NorFlashDxe.c | 1313 ++++++++++++++++++ Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/NorFlashDxe.h | 305 ++++ Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/NorFlashFvbDxe.c | 845 ++++++++++++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/NetsecDxe.c | 1000 ++++++++++++++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/NetsecDxe.dec | 47 + Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/NetsecDxe.h | 88 ++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/NetsecDxe.inf | 69 + Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_api.h | 736 ++++++++++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_basic_type.h | 45 + Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_version.h | 24 + Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_basic_access.c | 88 ++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_basic_access.h | 52 + Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_desc_ring_access.c | 1391 +++++++++++++++++++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_desc_ring_access_internal.h | 111 ++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_gmac_access.c | 1454 ++++++++++++++++++++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_internal.h | 210 +++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc.c | 1385 +++++++++++++++++++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc_internal.h | 38 + Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg.h | 219 +++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg_f_gmac_4mt.h | 222 +++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg_netsec.h | 368 +++++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/ogma_config.h | 25 + Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/pfdep.h | 265 ++++ Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/pfdep_uefi.c | 176 +++ Silicon/Socionext/Synquacer/Drivers/SynquacerPciCpuIo2dxe/SynquacerPciCpuIo2Dxe.c | 588 ++++++++ Silicon/Socionext/Synquacer/Drivers/SynquacerPciCpuIo2dxe/SynquacerPciCpuIo2Dxe.inf | 50 + Silicon/Socionext/Synquacer/Include/Platform/MemoryMap.h | 65 + Silicon/Socionext/Synquacer/Include/Platform/Pcie.h | 63 + Silicon/Socionext/Synquacer/Library/NorFlashSynquacerLib/NorFlashSynquacer.c | 60 + Silicon/Socionext/Synquacer/Library/NorFlashSynquacerLib/NorFlashSynquacerLib.inf | 38 + Silicon/Socionext/Synquacer/Library/SynquacerLib/AArch64/SynquacerHelper.S | 93 ++ Silicon/Socionext/Synquacer/Library/SynquacerLib/Arm/SynquacerHelper.S | 93 ++ Silicon/Socionext/Synquacer/Library/SynquacerLib/Synquacer.c | 124 ++ Silicon/Socionext/Synquacer/Library/SynquacerLib/SynquacerLib.inf | 39 + Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.c | 150 ++ Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.inf | 52 + Silicon/Socionext/Synquacer/Library/SynquacerPciHostBridgeLib/SynquacerPciHostBridgeLib.c | 223 +++ Silicon/Socionext/Synquacer/Library/SynquacerPciHostBridgeLib/SynquacerPciHostBridgeLib.inf | 50 + Silicon/Socionext/Synquacer/Library/SynquacerPciHostBridgeLib/SynquacerPciHostBridgeLibConstructor.c | 383 ++++++ Silicon/Socionext/Synquacer/Library/SynquacerPciSegmentLib/PciSegmentLib.c | 1396 +++++++++++++++++++ Silicon/Socionext/Synquacer/Library/SynquacerPciSegmentLib/SynquacerPciSegmentLib.inf | 35 + Silicon/Socionext/Synquacer/Synquacer.dec | 22 + 61 files changed, 17210 insertions(+) create mode 100644 Platform/Socionext/SynquacerEvalBoard/SynquacerEvalBoard.dsc create mode 100644 Platform/Socionext/SynquacerEvalBoard/SynquacerEvalBoard.fdf create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/AcpiSsdtRootPci.asl create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/AcpiTables.h create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/AcpiTables.inf create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/Dsdt.asl create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/Fadt.aslc create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/Gtdt.aslc create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/Iort.aslc create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/Madt.aslc create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/Mcfg.aslc create mode 100644 Silicon/Socionext/Synquacer/AcpiTables/Spcr.aslc create mode 100644 Silicon/Socionext/Synquacer/DeviceTree/Synquacer.dtsi create mode 100644 Silicon/Socionext/Synquacer/DeviceTree/SynquacerEvalBoard.dts create mode 100644 Silicon/Socionext/Synquacer/DeviceTree/SynquacerEvalBoard.inf create mode 100644 Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/Fip006Dxe.dec create mode 100644 Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/Fip006Dxe.inf create mode 100644 Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/Fip006Reg.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/NorFlashBlockIoDxe.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/NorFlashDxe.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/NorFlashDxe.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Fip006Dxe/NorFlashFvbDxe.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/NetsecDxe.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/NetsecDxe.dec create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/NetsecDxe.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/NetsecDxe.inf create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_api.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_basic_type.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_version.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_basic_access.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_basic_access.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_desc_ring_access.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_desc_ring_access_internal.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_gmac_access.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_internal.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc_internal.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg_f_gmac_4mt.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg_netsec.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/ogma_config.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/pfdep.h create mode 100644 Silicon/Socionext/Synquacer/Drivers/Net/NetsecDxe/netsec_for_uefi/pfdep_uefi.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/SynquacerPciCpuIo2dxe/SynquacerPciCpuIo2Dxe.c create mode 100644 Silicon/Socionext/Synquacer/Drivers/SynquacerPciCpuIo2dxe/SynquacerPciCpuIo2Dxe.inf create mode 100644 Silicon/Socionext/Synquacer/Include/Platform/MemoryMap.h create mode 100644 Silicon/Socionext/Synquacer/Include/Platform/Pcie.h create mode 100644 Silicon/Socionext/Synquacer/Library/NorFlashSynquacerLib/NorFlashSynquacer.c create mode 100644 Silicon/Socionext/Synquacer/Library/NorFlashSynquacerLib/NorFlashSynquacerLib.inf create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerLib/AArch64/SynquacerHelper.S create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerLib/Arm/SynquacerHelper.S create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerLib/Synquacer.c create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerLib/SynquacerLib.inf create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.c create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.inf create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerPciHostBridgeLib/SynquacerPciHostBridgeLib.c create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerPciHostBridgeLib/SynquacerPciHostBridgeLib.inf create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerPciHostBridgeLib/SynquacerPciHostBridgeLibConstructor.c create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerPciSegmentLib/PciSegmentLib.c create mode 100644 Silicon/Socionext/Synquacer/Library/SynquacerPciSegmentLib/SynquacerPciSegmentLib.inf create mode 100644 Silicon/Socionext/Synquacer/Synquacer.dec -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel