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[82.69.54.187]) by smtp.gmail.com with ESMTPSA id r62sm147581wmd.15.2016.03.01.09.26.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 01 Mar 2016 09:26:59 -0800 (PST) From: Ryan Harkin To: Leif Lindholm , Ard Biesheuvel , edk2-devel@lists.01.org, linaro-uefi@lists.linaro.org Date: Tue, 1 Mar 2016 17:26:47 +0000 Message-Id: <1456853207-937-4-git-send-email-ryan.harkin@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1456853207-937-1-git-send-email-ryan.harkin@linaro.org> References: <1456853207-937-1-git-send-email-ryan.harkin@linaro.org> Subject: [edk2] [PATCH 3/3] ArmPlatformPkg/PL180MciDxe: don't check ID_REG3 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" TC2 reads 0x02 for the PL180 ID3 register instead of 0x00 as defined in the spec. However, the spec [1] states that the contents of ID3 register represent the "configuration option of the peripheral" and thus not part of the Prime Cell identification. For this patch, we drop checking the value in MCI_PERIPH_ID_REG3. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0172a/index.html Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin --- ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c | 1 - 1 file changed, 1 deletion(-) -- 2.5.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c index 3e94ea5..5526aac 100644 --- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c +++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c @@ -528,7 +528,6 @@ PL180MciDxeInitialize ( if (MmioRead8 (MCI_PERIPH_ID_REG0) != MCI_PERIPH_ID0 || MmioRead8 (MCI_PERIPH_ID_REG1) != MCI_PERIPH_ID1 || MmioRead8 (MCI_PERIPH_ID_REG2) != MCI_PERIPH_ID2 || - MmioRead8 (MCI_PERIPH_ID_REG3) != MCI_PERIPH_ID3 || MmioRead8 (MCI_PCELL_ID_REG0) != MCI_PCELL_ID0 || MmioRead8 (MCI_PCELL_ID_REG1) != MCI_PCELL_ID1 || MmioRead8 (MCI_PCELL_ID_REG2) != MCI_PCELL_ID2 ||