From patchwork Thu Mar 3 11:55:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Lloyd X-Patchwork-Id: 63475 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp2900443lbc; Thu, 3 Mar 2016 03:55:45 -0800 (PST) X-Received: by 10.98.18.215 with SMTP id 84mr3002843pfs.131.1457006144938; Thu, 03 Mar 2016 03:55:44 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id j10si25579485pap.82.2016.03.03.03.55.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Mar 2016 03:55:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E212C1A1EC1; Thu, 3 Mar 2016 03:55:52 -0800 (PST) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B29B21A1EA0 for ; Thu, 3 Mar 2016 03:55:51 -0800 (PST) Received: from E107800.Emea.Arm.com (e107800.emea.arm.com [10.1.27.28]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id u23BtYEa011685; Thu, 3 Mar 2016 11:55:34 GMT From: evan.lloyd@arm.com To: edk2-devel@ml01.01.org Date: Thu, 3 Mar 2016 11:55:21 +0000 Message-Id: <1457006121-7604-4-git-send-email-evan.lloyd@arm.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1457006121-7604-1-git-send-email-evan.lloyd@arm.com> References: <1457006121-7604-1-git-send-email-evan.lloyd@arm.com> Cc: leif.lindholm@linaro.org Subject: [edk2] [PATCH 3/3] ArmPkg: Correct typos in ArmArchTimerLib.c. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Evan Lloyd SOme minor typographical problems were noticed during previous commits. This change corrects those, and contains no functional modifications. The changes are in comments, and one diagnostic message. Code at: https://github.com/EvanLloyd/tianocore/commit/6de873f7e3fd63b045adf994e1c8289a7da66531 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Evan Lloyd --- ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -- 2.7.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ryan Harkin Reviewed-by: Ard Biesheuvel diff --git a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c index 2384b40..c97b1e5 100644 --- a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c +++ b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c @@ -50,7 +50,7 @@ TimerConstructor ( if (PcdGet32 (PcdArmArchTimerFreqInHz) != 0) { // // Check if ticks/uS is not 0. The Architectural timer runs at constant - // frequency, irrespective of CPU frequency. According to General Timer + // frequency, irrespective of CPU frequency. According to Generic Timer // Ref manual, lower bound of the frequency is in the range of 1-10MHz. // ASSERT (TICKS_PER_MICRO_SEC); @@ -69,14 +69,14 @@ TimerConstructor ( } // - // Architectural Timer Frequency must be set in the Secure privileged + // Architectural Timer Frequency must be set in Secure privileged // mode (if secure extension is supported). // If the reset value (0) is returned, just ASSERT. // ASSERT (ArmGenericTimerGetTimerFreq () != 0); } else { - DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library can not be used.\n")); + DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library cannot be used.\n")); ASSERT (0); } @@ -89,7 +89,7 @@ TimerConstructor ( @param MicroSeconds The minimum number of microseconds to delay. - @return The value of MicroSeconds inputted. + @return The value of MicroSeconds input. **/ UINTN @@ -107,7 +107,7 @@ MicroSecondDelay ( TimerFreq = ArmGenericTimerGetTimerFreq (); } - // Calculate counter ticks that can represent requested delay: + // Calculate counter ticks that represent requested delay: // = MicroSeconds x TICKS_PER_MICRO_SEC // = MicroSeconds x Frequency.10^-6 TimerTicks64 = DivU64x32 ( @@ -123,7 +123,7 @@ MicroSecondDelay ( TimerTicks64 += SystemCounterVal; - // Wait until delay count is expired. + // Wait until delay count expires. while (SystemCounterVal < TimerTicks64) { SystemCounterVal = ArmGenericTimerGetSystemCount (); } @@ -214,12 +214,12 @@ GetPerformanceCounterProperties ( ) { if (StartValue != NULL) { - // Timer starts with the reload value + // Timer starts at 0 *StartValue = (UINT64)0ULL ; } if (EndValue != NULL) { - // Timer counts down to 0x0 + // Timer counts up. *EndValue = 0xFFFFFFFFFFFFFFFFUL; }