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[81.37.107.46]) by smtp.gmail.com with ESMTPSA id c16sm8908374wme.4.2016.08.10.08.18.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 10 Aug 2016 08:18:32 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, eugene@hp.com Date: Wed, 10 Aug 2016 17:17:45 +0200 Message-Id: <1470842282-8415-10-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1470842282-8415-1-git-send-email-ard.biesheuvel@linaro.org> References: <1470842282-8415-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 09/26] ArmPkg/ArmCpuLib: switch to ASM_FUNC() asm macro X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Annotate functions with ASM_FUNC() so that they are emitted into separate sections. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S | 9 ++------- ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | 9 +-------- 2 files changed, 3 insertions(+), 15 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S index e5fbc86bc1c4..ba3d48f11f6d 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S @@ -14,16 +14,11 @@ #include -.text -.align 3 -GCC_ASM_EXPORT (ArmReadCpuExCr) -GCC_ASM_EXPORT (ArmWriteCpuExCr) - -ASM_PFX(ArmReadCpuExCr): +ASM_FUNC(ArmReadCpuExCr) mrs x0, S3_1_c15_c2_1 ret -ASM_PFX(ArmWriteCpuExCr): +ASM_FUNC(ArmWriteCpuExCr) msr S3_1_c15_c2_1, x0 dsb sy isb diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S index 5db586192206..365d57d7e8bd 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S @@ -12,17 +12,10 @@ // #include -#include -#include - -.text -.align 3 - -GCC_ASM_EXPORT(ArmGetScuBaseAddress) // IN None // OUT r0 = SCU Base Address -ASM_PFX(ArmGetScuBaseAddress): +ASM_FUNC(ArmGetScuBaseAddress) // Read Configuration Base Address Register. ArmCBar cannot be called to get // the Configuration BAR as a stack is not necessary setup. The SCU is at the // offset 0x0000 from the Private Memory Region.