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[198.145.21.10]) by mx.google.com with ESMTPS id a5si2797593pac.173.2016.09.09.01.15.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Sep 2016 01:15:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 235941A1E5B; Fri, 9 Sep 2016 01:15:49 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x236.google.com (mail-wm0-x236.google.com [IPv6:2a00:1450:400c:c09::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8792C1A1E4F for ; Fri, 9 Sep 2016 01:15:47 -0700 (PDT) Received: by mail-wm0-x236.google.com with SMTP id b187so17712495wme.1 for ; Fri, 09 Sep 2016 01:15:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KfYHMiSZi/gV011FwH5gqJtuD1xgd2MMtqDP1BMuwLs=; b=ceBRcJEC4XgjatqATXeNVxsOcdt37PFM8h80D8UGlZA4GsE4tyvx7dsQaNrLWpX4pw nVTOM1BDNcfsUCRrqAJxQF71Bfnx66wRvuY9Qr3ndR3qpMwTvDvrajb8DlTW0SNlw3LQ 4Pcgr4gDUvF7VIx/DtCUPvONcrVlkeoqQqpFo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KfYHMiSZi/gV011FwH5gqJtuD1xgd2MMtqDP1BMuwLs=; b=HwkEPt2eph89uQhYuUEx56smrS8TSr3jq3dunIUm14rhpTfN5sg5aNkFIzOwDs9A8i j07WEpDLFXSLFO4tyU12IfpcT2XamqMV9eYzP1sU6DWNczhpKH3lQ7CJSR+CzPl4xB5O 9pG7I9WWVe/RxWec5NiMthpfpbLkVR3ZjQg/YXFkV1QUnPfCNK5Qvk6kc/w80UVLa3bu FebQx7yfFJvQ701zYyY5tZovEFbHGJhkg8Ih7diQTUUwfjCYe8GexLEYasOGCsMBbRuE uy/iJQb/OOvohV+tUu6ZNaEhB377POZ/8m9ntm01l0rGgVeT3rLtUobmRvAdsvl7vltf qG0A== X-Gm-Message-State: AE9vXwM0eMd739MsHDEMbtKCne1JkitDpHs6pPABUm0BhuTcyCC1tsumlRBPG5n6EB8IBshE X-Received: by 10.28.129.145 with SMTP id c139mr1685132wmd.102.1473408945947; Fri, 09 Sep 2016 01:15:45 -0700 (PDT) Received: from localhost.localdomain ([197.253.216.206]) by smtp.gmail.com with ESMTPSA id s184sm2109044wmb.11.2016.09.09.01.15.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Sep 2016 01:15:45 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Fri, 9 Sep 2016 09:15:39 +0100 Message-Id: <1473408939-18044-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473408939-18044-1-git-send-email-ard.biesheuvel@linaro.org> References: <1473408939-18044-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 2/2] Platforms/ARM/FVP: limit VA range to 36 bits X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , eugene@hp.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The FVP model has up to 8 GB of memory (on the Base model), where the top 6GB starts at 0x8_8000_0000, and all other memory regions of interest live below that. This means we can cover the whole VA space with 36-bits worth of VA. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 3 +++ 1 file changed, 3 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc index 3d8e0cfbb57e..60df45dca276 100644 --- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc +++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc @@ -175,6 +175,9 @@ # Set tick frequency value to 100Mhz gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000 + # the entire FVP address space can be covered by 36 bit VAs + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36 + [PcdsDynamicDefault.common] # # The size of a dynamic PCD of the (VOID*) type can not be increased at run