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[198.145.21.10]) by mx.google.com with ESMTPS id 131si4089801pfv.7.2016.09.09.07.01.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Sep 2016 07:01:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 1012C1A1E86; Fri, 9 Sep 2016 07:01:05 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x22b.google.com (mail-wm0-x22b.google.com [IPv6:2a00:1450:400c:c09::22b]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 26BE21A1DFC for ; Fri, 9 Sep 2016 07:01:03 -0700 (PDT) Received: by mail-wm0-x22b.google.com with SMTP id w12so34945805wmf.0 for ; Fri, 09 Sep 2016 07:01:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5sMEz0v3MAPElgqYgjE9cJdCB99wCYpOL9eEa+ckFbQ=; b=HI8GbVokZNIKp9B2Yz7XanuDwfWwC3S5oQIO3ugze8+HdIJ5Se8UuyEoyrbWB2TIXC 4dtJCCR/bRk9zqnfphOlFbR6Tv0qx1MWZS8UZrKVlF28X8ykGipULY7S5m/K1LJLmYnh FHLx7iMJYuyaV8hzLlIjWLJjpH/t+Q1zi+uRE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5sMEz0v3MAPElgqYgjE9cJdCB99wCYpOL9eEa+ckFbQ=; b=B36HCs7q8Hoeu9uaKQP4GGs9IzkJWU1Z1KpeQm6rpQVFVdPW2chvcPxV8HZ05bfYtv cjmfKUp04iKwT87mEyZNZUGgDO/o8N0K2NV2gaCmZaRMeoXMHz8Y2gARNYqfVcKuIDeS 5H6SHte3VXgh84YvrxErk51xweKKsLT1Z+3FZhC4cJu3EDkL8El3dIyIPIzwx+PXoNA5 CUbdmSNKoDdZ+t8w8S02AmunjMnqVGLOlFLTKJG/ncyEWmxQZgK/YvfjjpWe3w97R8hD aNxjKGyZ2/lxueBt6VxPInkrQiXfoXd/V0dkUY2QcUnd7q0cjFCR8VZtyABj9xIL0MFY 5FUQ== X-Gm-Message-State: AE9vXwOcmxJjjF20umPRBiCzaZBUFD6MsgVWkXAj5GeKmQ4dT4lQHAFxiPMvJTPZiBtVDiud X-Received: by 10.28.154.83 with SMTP id c80mr3332150wme.48.1473429661518; Fri, 09 Sep 2016 07:01:01 -0700 (PDT) Received: from localhost.localdomain ([105.190.180.180]) by smtp.gmail.com with ESMTPSA id 1sm9708769wmm.0.2016.09.09.07.00.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Sep 2016 07:01:00 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, liming.gao@intel.com, leif.lindholm@linaro.org, michael.d.kinney@intel.com Date: Fri, 9 Sep 2016 15:00:44 +0100 Message-Id: <1473429644-13480-5-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473429644-13480-1-git-send-email-ard.biesheuvel@linaro.org> References: <1473429644-13480-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v5 4/4] MdePkg/BaseMemoryLibOptDxe ARM|AARCH64: disallow use in SEC & PEI phases X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The new accelerated ARM and AARCH64 implementations take advantage of features that are only available when the MMU and Dcache are on. So restrict the use of this library to the DXE phase or later. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf b/MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf index 64d11b09ef06..5ddc0cbc2d77 100644 --- a/MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf +++ b/MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf @@ -116,6 +116,15 @@ [Sources.X64] X64/CopyMem.S X64/IsZeroBuffer.nasm +[Defines.ARM, Defines.AARCH64] + # + # The ARM implementations of this library may perform unaligned accesses, and + # may use DC ZVA instructions that are only allowed when the MMU and D-cache + # are on. Since SEC, PEI_CORE and PEIM modules may execute with the MMU off, + # omit them from the supported module types list for this library. + # + LIBRARY_CLASS = BaseMemoryLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER UEFI_DRIVER UEFI_APPLICATION + [Sources.ARM] Arm/ScanMem.S |GCC Arm/SetMem.S |GCC