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[198.145.21.10]) by mx.google.com with ESMTPS id b27si78503599pfe.274.2017.01.05.22.52.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 Jan 2017 22:52:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E4AD2819F5; Thu, 5 Jan 2017 22:52:50 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-pg0-x229.google.com (mail-pg0-x229.google.com [IPv6:2607:f8b0:400e:c05::229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A6271819F9 for ; Thu, 5 Jan 2017 22:52:49 -0800 (PST) Received: by mail-pg0-x229.google.com with SMTP id g1so210006515pgn.0 for ; Thu, 05 Jan 2017 22:52:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gfFAcEvEPCRy1TtYCLY4xdhpNNkUWFckxGxMRjacxuQ=; b=BAl/GhH0wPuyXprcbFQ9GFPjWlzMff6EgQB1iMdPdYTU1N0SEiMuNNPOVCAEs8o46Q VXQCpEMAW9cBIcWEExfMAprg4fYXlMOTzQ6Hei9szPOJbVAmKS3LMxzXg9gMrNqrkbSm nZuJVweCz+wpf6RyXCKi7ThUDUvguxlOtia5g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gfFAcEvEPCRy1TtYCLY4xdhpNNkUWFckxGxMRjacxuQ=; b=XizKXdXlHpUyUpQULPOd8lRT1Xr6LrkOinQ+zn/Vbd9YeuTNNQHnNUyecIh/ujY4mL V0DMAE5+D90VkDLnie8a2GiwqKJaV1fM83lTC5Xm9gC+oSo+2fJIMCBh1qSGlJsktx7u uMrOA3Bu1BKF+PqBJklRds41SwBbhnc0C3eyi+42TaF2mj5m/yCQDb6KFzHwyHYYWBu4 084fcTH+RP5Kg8hw14/poSULj9c1mJWbzJnzN4WgoaYwKdRYBniRYcBSt9/G+TkKBct4 dg+P7BJwn1L1jqKA/+0hKOyBV5qtkgz6ddSYer1efVkJQabTIFd626NhC2mo871ZGRKX qvtQ== X-Gm-Message-State: AIkVDXK8gOrGk3VHVjn8Y7ny6rQ/jWY3K06WGFvn7zZnnthxNm2PHkfnwldn4/FzZI0xQQZ/ X-Received: by 10.84.210.233 with SMTP id a96mr163240718pli.72.1483685569350; Thu, 05 Jan 2017 22:52:49 -0800 (PST) Received: from localhost.localdomain ([45.56.159.83]) by smtp.gmail.com with ESMTPSA id p13sm159096976pgf.47.2017.01.05.22.52.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 05 Jan 2017 22:52:48 -0800 (PST) From: Haojian Zhuang To: feng.tian@intel.com, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, edk2-devel@lists.01.org Date: Fri, 6 Jan 2017 14:52:17 +0800 Message-Id: <1483685538-11058-9-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1483685538-11058-1-git-send-email-haojian.zhuang@linaro.org> References: <1483685538-11058-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH 8/9] Ufs: fix to add cache operation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Since command UPIU is initialized with virtual address that CPU accesses, need to add cache operation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang --- MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h | 1 + MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf | 1 + MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 8 ++++++++ 3 files changed, 10 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h index 7fc82ba..af13757 100644 --- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h +++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h @@ -26,6 +26,7 @@ #include #include #include +#include #include #include diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf index c90c72f..254f51a 100644 --- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf +++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf @@ -49,6 +49,7 @@ BaseMemoryLib UefiLib BaseLib + CacheMaintenanceLib UefiDriverEntryPoint DebugLib DevicePathLib diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c index db70fb1..98a17ac 100644 --- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c +++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c @@ -1449,6 +1449,7 @@ UfsExecScsiCmds ( UTP_TR_PRD *PrdtBase; EFI_TPL OldTpl; UFS_PASS_THRU_TRANS_REQ *TransReq; + UINTN TotalLen; TransReq = AllocateZeroPool (sizeof (UFS_PASS_THRU_TRANS_REQ)); if (TransReq == NULL) { @@ -1521,6 +1522,13 @@ UfsExecScsiCmds ( UfsInitUtpPrdt (PrdtBase, (VOID*)(UINTN)DataBufPhyAddr, DataLen); // + // Flush & invalidate data cache since CmdDescHost is virtual address + // and Command UPIU is updated after Map (). + // + TotalLen = (TransReq->Trd->PrdtO << 2) + (TransReq->Trd->PrdtL << 2); + WriteBackInvalidateDataCacheRange (TransReq->CmdDescHost, TotalLen); + + // // Insert the async SCSI cmd to the Async I/O list // if (Event != NULL) {