From patchwork Wed Oct 11 15:40:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Wojtas X-Patchwork-Id: 115572 Delivered-To: patch@linaro.org Received: by 10.80.163.170 with SMTP id s39csp758065edb; Wed, 11 Oct 2017 08:41:43 -0700 (PDT) X-Received: by 10.84.197.35 with SMTP id m32mr14357pld.306.1507736502960; Wed, 11 Oct 2017 08:41:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507736502; cv=none; d=google.com; s=arc-20160816; b=HFx6rtSL/mq0fGumoBhIvEG1JzkoX9Tun2S5n1xzfbiHZMn92yAT32eqDtDjmWJEa9 j3VHQlZNb8Rdg+1MoqTjSk68GuzrdfuJ4YL4WZ2XHuRdfHrFS2RZWwqSH5pMi5yfszpl 8ZXczbH8kN54lDgUoC0NxYLOtYkN5lY7tHE0Bh/TZ860JCVGU7p1vrPl0xzp2AecJBB6 xHNF5JAjc/N/098Jtwy9lbCkH2UOJ8//lBB81C+rmMG2sN2rVzlPN03I9HU9lMsl870C UsRUDoRkODImIBY7kp5HincMkVCRWZDCXToKfW/3F1L4GvQ/6kwk3ro7ckEbqgBXSOSw QC9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=PTCjifxySsbvFu2xrSOjkSjDpBr5jUv94NyXxWz6sZE=; b=WWGtbP6AwgeKzBm+Nmfi86+dMV8WmJlz9HZvGyuIafdoS1byMMdHiclbE25ZJZ3j1H TNBBu/3tvd+CvTDYYL0V6d/jKPRl+LFtAYF0PxCETCOxzqjAr2CBjNyxqZ3Q7k7HAvNi n1EYM/BERkvCm/HViIG4gr0boxeskY/ESWm8FlAibXR890j8Pff1pvBS+3Iq37uEwpQC 9SBemZBbp+qY9yyer5A6mNRshMdVlEgUAOlHeR5VSitqLEEgwyBSB2EsXvFDPh3cOtC5 WrvivpMIHcoDnXS5Qt//0kZPDvqwPH21XyJh5q1d8zFSA6sf18F4c5k8U7252BKX5tXy o4Rg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=ILUWpjxV; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id n66si11030353pfi.500.2017.10.11.08.41.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Oct 2017 08:41:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@semihalf-com.20150623.gappssmtp.com header.s=20150623 header.b=ILUWpjxV; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 504E621F7D4F8; Wed, 11 Oct 2017 08:37:55 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::231; helo=mail-lf0-x231.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x231.google.com (mail-lf0-x231.google.com [IPv6:2a00:1450:4010:c07::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7A7D621F7D4F4 for ; Wed, 11 Oct 2017 08:37:54 -0700 (PDT) Received: by mail-lf0-x231.google.com with SMTP id g70so2556815lfl.3 for ; Wed, 11 Oct 2017 08:41:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hk66oXNfmi1mIMfvmK//JVJdGthOZYrSl3pzB9f+g2o=; b=ILUWpjxVog0vb+1Hkfy1XROoBbMIIypP7GSUSohvUtnN8DkCF6TpagXSXmiqX+qDUm bxulid/xvVDCiGzdiq3ZMxJZw3jYdjHR2dLrpUDOrlMrTi/458cNAcFpdgk9H0JOLRjk M6raGl67sG1aJc1toQNMFtBkxWVaDaFD0hBVVghTedAG349265gzQ8WVLop2aPQC5kEn 37xtM/zjCG+QwDI1Nk4KXwQeC6CQoKO6e64uj9fHra1x+TgmGMW5ZQnR8LHpUa21rMaX 0uV5TX9W2Jy9LCq2yu/Z/6QFxmeCRGp+0zKk90R56szXwZD/9ejJzQ7yp5u8dDN37dKY 5Hzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hk66oXNfmi1mIMfvmK//JVJdGthOZYrSl3pzB9f+g2o=; b=FRiTF49KPN4R5/BCUUPITlDS3h+UadZofCgBX4+20Cd4g1OBwVB45yLqrFPEAWsY4I Ppi8FHo7pTih3tgYKsNx3EhEWP0K2Pmmw6AcjRwpM0y4F+G0ITt19Jq/PZsN7SNzkYJn ZICY3G3+ekugP/Lm4KaLnsPcDMmGqZ4Mp728hP8mq/L2/axZeAmXFG2UGZUiH3EkZwL5 sMvjdRI/4/zm9aZGAJD50tpAmB3UGrkTOfMBzy2wHzwqsjtRrUZ6EljrPqzndFu7ciwG sK18JPPcQADv3EsTZZ5U5WMW+J3sspP5UAI7asEviucOjv35rXpcuMF+WaC9tg3B6gzF AFxA== X-Gm-Message-State: AMCzsaWql0nh2L7azbRZKQnXfeVylTcCFgWiWk4uJUOirhvoNKXRdwQy RBBxl47ui05uTDum/93dvowjp5cOCGo= X-Google-Smtp-Source: AOwi7QAXy8AA9saV8byTDcx772jPgfRD6VEBofEkWVXY3xLt1CGbVzrrqgamXLKLF9ieeSo9VCYSUw== X-Received: by 10.46.99.86 with SMTP id x83mr11041ljb.161.1507736482022; Wed, 11 Oct 2017 08:41:22 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id p15sm160610lje.24.2017.10.11.08.41.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 11 Oct 2017 08:41:21 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Wed, 11 Oct 2017 17:40:48 +0200 Message-Id: <1507736449-6073-8-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507736449-6073-1-git-send-email-mw@semihalf.com> References: <1507736449-6073-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH 7/8] Marvell/Armada: Armada70x0Lib: Add support for 32-bit ARM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Ard Biesheuvel Add an ARM implementation of ArmPlatformHelper.S. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Signed-off-by: Marcin Wojtas --- Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S | 77 ++++++++++++++++++++ Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf | 3 + 2 files changed, 80 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S b/Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S new file mode 100644 index 0000000..21459e5 --- /dev/null +++ b/Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S @@ -0,0 +1,77 @@ +//Based on ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S +// +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. +// Copyright (c) 2016, Marvell. All rights reserved. +// Copyright (c) 2017, Linaro Limited. All rights reserved. +// +// This program and the accompanying materials are licensed and made available +// under the terms and conditions of the BSD License which accompanies this +// distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED +// + +#include +#include + +#define CCU_MC_BASE 0xF0001700 +#define CCU_MC_RCR_OFFSET 0x0 +#define CCU_MC_RCR_REMAP_EN BIT0 +#define CCU_MC_RCR_REMAP_SIZE(Size) (((Size) - 1) ^ (SIZE_1MB - 1)) + +#define CCU_MC_RSBR_OFFSET 0x4 +#define CCU_MC_RSBR_SOURCE_BASE(Base) (((Base) >> 20) << 10) +#define CCU_MC_RTBR_OFFSET 0x8 +#define CCU_MC_RTBR_TARGET_BASE(Base) (((Base) >> 20) << 10) + +ASM_FUNC(ArmPlatformPeiBootAction) + .if FixedPcdGet64 (PcdSystemMemoryBase) != 0 + .err PcdSystemMemoryBase should be 0x0 on this platform! + .endif + + .if FixedPcdGet64 (PcdSystemMemorySize) > FixedPcdGet32 (PcdDramRemapTarget) + // + // Use the low range for UEFI itself. The remaining memory will be mapped + // and added to the GCD map later. + // + ADRL (r0, mSystemMemoryEnd) + MOV32 (r2, FixedPcdGet32 (PcdDramRemapTarget) - 1) + mov r3, #0 + strd r2, r3, [r0] + .endif + + bx lr + +//UINTN +//ArmPlatformGetCorePosition ( +// IN UINTN MpId +// ); +// With this function: CorePos = (ClusterId * 2) + CoreId +ASM_FUNC(ArmPlatformGetCorePosition) + and r1, r0, #ARM_CORE_MASK + and r0, r0, #ARM_CLUSTER_MASK + add r0, r1, r0, LSR #7 + bx lr + +//UINTN +//ArmPlatformGetPrimaryCoreMpId ( +// VOID +// ); +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) + MOV32 (r0, FixedPcdGet32(PcdArmPrimaryCore)) + bx lr + +//UINTN +//ArmPlatformIsPrimaryCore ( +// IN UINTN MpId +// ); +ASM_FUNC(ArmPlatformIsPrimaryCore) + MOV32 (r1, FixedPcdGet32(PcdArmPrimaryCoreMask)) + and r0, r0, r1 + MOV32 (r1, FixedPcdGet32(PcdArmPrimaryCore)) + cmp r0, r1 + moveq r0, #1 + movne r0, #0 + bx lr diff --git a/Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf b/Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf index 838a670..0dabd4b 100644 --- a/Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf +++ b/Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf @@ -60,6 +60,9 @@ [Sources.AArch64] AArch64/ArmPlatformHelper.S +[Sources.ARM] + ARM/ArmPlatformHelper.S + [FixedPcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize