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[198.145.21.10]) by mx.google.com with ESMTPS id k4-v6si3348916plt.255.2018.03.14.23.05.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Mar 2018 23:05:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Q0yEyNqB; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id D0FF12202E49E; Wed, 14 Mar 2018 22:58:53 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::22a; helo=mail-pl0-x22a.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x22a.google.com (mail-pl0-x22a.google.com [IPv6:2607:f8b0:400e:c01::22a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4E54821E08283 for ; Wed, 14 Mar 2018 22:58:52 -0700 (PDT) Received: by mail-pl0-x22a.google.com with SMTP id u13-v6so3171868plq.1 for ; Wed, 14 Mar 2018 23:05:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=x1PIFmRa9L5EHuOxCczQBXiPyyouN19MpWKAKHjHilA=; b=Q0yEyNqBduANfhEtu1BqHtsLCEjilMsAmggfNsmwL+mGhFtaKS2n1DiemKDKsHYPXr diac/5KtX54g1ddUEm/3Rtru/CF86JnTAMyRuUsQObtagBC7o9+fuEQEPHm/eRy9jgom f422QbLTnMNMk1Z9cPg5S32Q1UISWfl5nYx2g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=x1PIFmRa9L5EHuOxCczQBXiPyyouN19MpWKAKHjHilA=; b=dN+diy5StJPuN7feHfZpHyJn3aKxmcFq7lzxCnFqIvb6HaLl9WuzOKB7PhH4VLiZxz /K9xLh2FjqUB0yd8WKnKc7TtEBhrdWNRkmG6Qv/eifRqm8r73CpB6HS1GR6KNqGZ2+ph Fycj0r1r3/2zi+f6i2dvbn5r6cU3aQ6IIufjMys3mPC8qIZyyVGiuTdqRZtNXH3duQ9d VMicmqhd9rzhB6DjzmtIPLk5GE4xSFCyokdCqCOVEPuXjuEgFMSmJUlzr8CyPeBFpwEW lnb5/nfSdIbu8/L7JMdqyA76KVL2sH1nmqC/MFv890FBL3iEB2e2iwwuYuJT/wtXTQJD J+vQ== X-Gm-Message-State: AElRT7EjO+lXg6dkqvAXxf0fRFgpUD/HVDayAXBVnMvur87gFcKU9+Uj 5q5dy07bk5hNlVwasKTPBavaVFx03YQ= X-Received: by 2002:a17:902:9307:: with SMTP id bc7-v6mr6725937plb.29.1521093915557; Wed, 14 Mar 2018 23:05:15 -0700 (PDT) Received: from localhost.localdomain ([45.56.152.100]) by smtp.gmail.com with ESMTPSA id 70sm7436192pgb.86.2018.03.14.23.05.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Mar 2018 23:05:15 -0700 (PDT) From: Heyi Guo To: edk2-devel@lists.01.org Date: Thu, 15 Mar 2018 14:03:59 +0800 Message-Id: <1521093843-48615-3-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521093843-48615-1-git-send-email-heyi.guo@linaro.org> References: <1521093843-48615-1-git-send-email-heyi.guo@linaro.org> Subject: [edk2] [PATCH v7 2/6] OvmfPkg/PciHostBridgeLib: clear PCI aperture vars for (re)init X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ruiyu Ni , Yi Li , Ard Biesheuvel , Jordan Justen , Heyi Guo , Anthony Perard , Laszlo Ersek MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Use ZeroMem() to initialize (or re-initialize) all fields in temporary PCI_ROOT_BRIDGE_APERTURE variables to zero. This is not mandatory but is helpful for future extension: when we add new fields to PCI_ROOT_BRIDGE_APERTURE and the default value of these fields can safely be zero, this code will not suffer from an additional change. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo Signed-off-by: Yi Li Reviewed-by: Ni Ruiyu Cc: Jordan Justen Cc: Anthony Perard Cc: Julien Grall Cc: Ruiyu Ni Cc: Laszlo Ersek Cc: Ard Biesheuvel --- Notes: v6: - Move ZeroMem() into the loop [Laszlo] - Move ZeroMem() after checking PcdPciDisableBusEnumeration [Laszlo] - Commit title change (However 74 characters will cause PatchCheck warning, so I tried to reduce the length to eliminate the warning) [laszlo] - Minor changes in commit message OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 4 ++++ OvmfPkg/Library/PciHostBridgeLib/XenSupport.c | 7 ++++++- 2 files changed, 10 insertions(+), 1 deletion(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c index ff837035caff..65d0ef9252c5 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -221,6 +221,10 @@ PciHostBridgeGetRootBridges ( return ScanForRootBridges (Count); } + ZeroMem (&Io, sizeof (Io)); + ZeroMem (&Mem, sizeof (Mem)); + ZeroMem (&MemAbove4G, sizeof (MemAbove4G)); + Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO | EFI_PCI_ATTRIBUTE_ISA_IO_16 | diff --git a/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c b/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c index 31c63ae19e0a..920417950ad9 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c +++ b/OvmfPkg/Library/PciHostBridgeLib/XenSupport.c @@ -202,8 +202,13 @@ ScanForRootBridges ( for (PrimaryBus = 0; PrimaryBus <= PCI_MAX_BUS; PrimaryBus = SubBus + 1) { SubBus = PrimaryBus; Attributes = 0; + + ZeroMem (&Io, sizeof (Io)); + ZeroMem (&Mem, sizeof (Mem)); + ZeroMem (&MemAbove4G, sizeof (MemAbove4G)); + ZeroMem (&PMem, sizeof (PMem)); + ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G)); Io.Base = Mem.Base = MemAbove4G.Base = PMem.Base = PMemAbove4G.Base = MAX_UINT64; - Io.Limit = Mem.Limit = MemAbove4G.Limit = PMem.Limit = PMemAbove4G.Limit = 0; // // Scan all the PCI devices on the primary bus of the PCI root bridge //