From patchwork Wed Jun 15 12:52:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Lloyd X-Patchwork-Id: 70110 Delivered-To: patch@linaro.org Received: by 10.140.106.246 with SMTP id e109csp2553889qgf; Wed, 15 Jun 2016 05:53:02 -0700 (PDT) X-Received: by 10.66.131.75 with SMTP id ok11mr3680392pab.87.1465995181414; Wed, 15 Jun 2016 05:53:01 -0700 (PDT) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id k62si43996935pfk.56.2016.06.15.05.53.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 Jun 2016 05:53:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id ED5D11A1E4C; Wed, 15 Jun 2016 05:53:17 -0700 (PDT) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 847231A1DFF for ; Wed, 15 Jun 2016 05:53:15 -0700 (PDT) Received: from E107800.Emea.Arm.com (e107800.emea.arm.com [10.1.26.57]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id u5FCqkuR020558; Wed, 15 Jun 2016 13:52:47 +0100 From: evan.lloyd@arm.com To: edk2-devel@ml01.01.org Date: Wed, 15 Jun 2016 13:52:39 +0100 Message-Id: <20160615125243.1376-3-evan.lloyd@arm.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160615125243.1376-1-evan.lloyd@arm.com> References: <20160615125243.1376-1-evan.lloyd@arm.com> Subject: [edk2] [PATCH v3 2/6] ArmPlatformPkg: Update PL011 Serial PCDs to Fixed PCDs X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: WoA-Tech , Laszlo Ersek , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Evan Lloyd The PCDs used in the PL011 UART Driver and Serial Port Library are inherently "fixed at build". This change updates the source to use Fixed PCDs for these values. This improves clarity and efficiency. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar Signed-off-by: Evan Lloyd Tested-by: Ryan Harkin Reviewed-by: Ryan Harkin --- ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf | 4 ++-- ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf | 4 ++-- ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c | 10 ++++----- ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c | 22 ++++++++++---------- 4 files changed, 20 insertions(+), 20 deletions(-) -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf index 18df7c9fb94431ffa1d2e8b4c06dfb82e53181e5..5afce36d3935e7fd79c25c46360d72328b2a571f 100644 --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf @@ -2,7 +2,7 @@ # # Component description file for PL011Uart module # -# Copyright (c) 2011-2013, ARM Ltd. All rights reserved.
+# Copyright (c) 2011-2016, ARM Ltd. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -34,7 +34,7 @@ [Packages] MdeModulePkg/MdeModulePkg.dec ArmPlatformPkg/ArmPlatformPkg.dec -[Pcd] +[FixedPcd] gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate gArmPlatformTokenSpaceGuid.PL011UartClkInHz diff --git a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf index 3a950d0788d481ab73408af41343dfcfa2378a6e..653c0b2dfc147f1d82155e4150812f0cb4c59e12 100644 --- a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf +++ b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf @@ -2,7 +2,7 @@ # # Component description file for PL011SerialPortLib module # -# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
+# Copyright (c) 2011-2016, ARM Ltd. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -35,7 +35,7 @@ [Packages] MdeModulePkg/MdeModulePkg.dec ArmPlatformPkg/ArmPlatformPkg.dec -[Pcd] +[FixedPcd] gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c index ab00cae26d92fced0f14bb17706129859846ad3c..d0f9381e9eaad2c14e1c86b89ff1c1cf9f0a6427 100644 --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c @@ -168,17 +168,17 @@ PL011UartInitializePort ( // // If PL011 Integer value has been defined then always ignore the BAUD rate - if (PcdGet32 (PL011UartInteger) != 0) { - MmioWrite32 (UartBase + UARTIBRD, PcdGet32 (PL011UartInteger)); - MmioWrite32 (UartBase + UARTFBRD, PcdGet32 (PL011UartFractional)); + if (FixedPcdGet32 (PL011UartInteger) != 0) { + MmioWrite32 (UartBase + UARTIBRD, FixedPcdGet32 (PL011UartInteger)); + MmioWrite32 (UartBase + UARTFBRD, FixedPcdGet32 (PL011UartFractional)); } else { // If BAUD rate is zero then replace it with the system default value if (*BaudRate == 0) { - *BaudRate = PcdGet32 (PcdSerialBaudRate); + *BaudRate = FixedPcdGet32 (PcdSerialBaudRate); ASSERT (*BaudRate != 0); } - Divisor = (PcdGet32 (PL011UartClkInHz) * 4) / *BaudRate; + Divisor = (FixedPcdGet32 (PL011UartClkInHz) * 4) / *BaudRate; MmioWrite32 (UartBase + UARTIBRD, Divisor >> FRACTION_PART_SIZE_IN_BITS); MmioWrite32 (UartBase + UARTFBRD, Divisor & FRACTION_PART_MASK); } diff --git a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c index 3b5f1edf68ea5dc84bd0dad66cfe404b6ed27332..015f6fbb712c4ca6fbf20448d795dda41ad24e9c 100644 --- a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c +++ b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c @@ -43,14 +43,14 @@ SerialPortInitialize ( UINT8 DataBits; EFI_STOP_BITS_TYPE StopBits; - BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate); + BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate); ReceiveFifoDepth = 0; // Use default FIFO depth - Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity); - DataBits = PcdGet8 (PcdUartDefaultDataBits); - StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits); + Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity); + DataBits = FixedPcdGet8 (PcdUartDefaultDataBits); + StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits); return PL011UartInitializePort ( - (UINTN)PcdGet64 (PcdSerialRegisterBase), + (UINTN)FixedPcdGet64 (PcdSerialRegisterBase), &BaudRate, &ReceiveFifoDepth, &Parity, @@ -76,7 +76,7 @@ SerialPortWrite ( IN UINTN NumberOfBytes ) { - return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); + return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); } /** @@ -96,7 +96,7 @@ SerialPortRead ( IN UINTN NumberOfBytes ) { - return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); + return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes); } /** @@ -113,7 +113,7 @@ SerialPortPoll ( VOID ) { - return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase)); + return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase)); } /** Set new attributes to PL011. @@ -158,7 +158,7 @@ SerialPortSetAttributes ( ) { return PL011UartInitializePort ( - (UINTN)PcdGet64 (PcdSerialRegisterBase), + (UINTN)FixedPcdGet64 (PcdSerialRegisterBase), BaudRate, ReceiveFifoDepth, Parity, @@ -199,7 +199,7 @@ SerialPortSetControl ( IN UINT32 Control ) { - return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control); + return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control); } /** @@ -240,5 +240,5 @@ SerialPortGetControl ( OUT UINT32 *Control ) { - return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control); + return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control); }