From patchwork Wed Jun 15 12:52:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Lloyd X-Patchwork-Id: 70107 Delivered-To: patch@linaro.org Received: by 10.140.106.246 with SMTP id e109csp2553832qgf; Wed, 15 Jun 2016 05:52:54 -0700 (PDT) X-Received: by 10.36.78.67 with SMTP id r64mr34748346ita.72.1465995174012; Wed, 15 Jun 2016 05:52:54 -0700 (PDT) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id 2si33496927pfu.115.2016.06.15.05.52.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 Jun 2016 05:52:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 0F3D31A1E41; Wed, 15 Jun 2016 05:53:17 -0700 (PDT) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 865DE1A1E3C for ; Wed, 15 Jun 2016 05:53:15 -0700 (PDT) Received: from E107800.Emea.Arm.com (e107800.emea.arm.com [10.1.26.57]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id u5FCqkuU020558; Wed, 15 Jun 2016 13:52:47 +0100 From: evan.lloyd@arm.com To: edk2-devel@ml01.01.org Date: Wed, 15 Jun 2016 13:52:42 +0100 Message-Id: <20160615125243.1376-6-evan.lloyd@arm.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160615125243.1376-1-evan.lloyd@arm.com> References: <20160615125243.1376-1-evan.lloyd@arm.com> Subject: [edk2] [PATCH v3 5/6] ArmVirtPkg/FdtPL011SerialPortLib: Set the PL011 UART clock rate X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: WoA-Tech , Laszlo Ersek , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Evan Lloyd The interface to PL011UartInitializePort has changed in ArmPlatformPkg/Drivers/PL011Uart with the title: "ArmPlatformPkg: Add support to configure PL011 UART clock" This patch updates the calls to PL011UartInitializePort(), in line with that change, adding a parameter value using the PCD previously used directly by the driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar Signed-off-by: Evan Lloyd --- Notes: pl011_v3: - Updated commit heading [Laszlo Ersek] ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf | 1 + ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf | 1 + ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.c | 8 +++++++- ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.c | 10 ++++++++-- 4 files changed, 17 insertions(+), 3 deletions(-) -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Laszlo Ersek diff --git a/ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf b/ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf index cb2766b3780c6b99555f7413058e94a0e28fbd2b..bfd7142cc5d82541448e78ff9b697fd59d7977a0 100644 --- a/ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf +++ b/ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf @@ -44,3 +44,4 @@ [FixedPcd] gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits + gArmPlatformTokenSpaceGuid.PL011UartClkInHz diff --git a/ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf b/ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf index 3bacd641f0624c4216461ed3f6a33c896363168e..0b06797293c69b9eb00522c5905e4ab51e2cb524 100644 --- a/ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf +++ b/ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf @@ -43,6 +43,7 @@ [FixedPcd] gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits + gArmPlatformTokenSpaceGuid.PL011UartClkInHz [Guids] gEarlyPL011BaseAddressGuid diff --git a/ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.c b/ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.c index 72b47652b6dd790946262755c50164fb770b95bd..c458abb622d9c25de5a9ea9dfa8ae0e52c4ac739 100644 --- a/ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.c +++ b/ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.c @@ -112,7 +112,13 @@ SerialPortGetBaseAddress ( Status = PL011UartInitializePort ( UartBase, - &BaudRate, &ReceiveFifoDepth, &Parity, &DataBits, &StopBits); + FixedPcdGet32 (PL011UartClkInHz), + &BaudRate, + &ReceiveFifoDepth, + &Parity, + &DataBits, + &StopBits + ); if (!EFI_ERROR (Status)) { return UartBase; } diff --git a/ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.c b/ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.c index b73ab8f48a9df7f0924cd9a5f7bc6e0f16f3151f..48a0530dcc2fe59a87b37d2df6eba44c1247ad84 100644 --- a/ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.c +++ b/ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.c @@ -81,8 +81,14 @@ FdtPL011SerialPortLibInitialize ( StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits); return PL011UartInitializePort ( - mSerialBaseAddress, &BaudRate, &ReceiveFifoDepth, - &Parity, &DataBits, &StopBits); + mSerialBaseAddress, + FixedPcdGet32 (PL011UartClkInHz), + &BaudRate, + &ReceiveFifoDepth, + &Parity, + &DataBits, + &StopBits + ); } /**