From patchwork Thu Sep 21 16:23:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Lloyd X-Patchwork-Id: 113833 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp2219646qgf; Thu, 21 Sep 2017 09:24:00 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBNpWTy8jxG48arKDtmT2qj1fvVW8VLlot9WBP4h1jZqhOVmETrzntt9Fu2t+pkzRCpdIap X-Received: by 10.98.60.71 with SMTP id j68mr6241102pfa.264.1506011040372; Thu, 21 Sep 2017 09:24:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506011040; cv=none; d=google.com; s=arc-20160816; b=zgOu9bOSrQieunurnVSnSC8Y6yb512FIPh5Yu4DAZ+XIESGBeKqkvjs7FX8dY6+T7P moxfPGnKSPor4aNN8e50iXmJp8OMx1/5MGquwjCWqJ0CwHzj2qE48oEUyuhlZdMhvHt+ +tSY+SidHcmbNaJK45VSUcgPjYeDTVPbooY+uttobh14n5VNHN8EVD3J5KusISqhADZr 2zZEZj/elg9bLySoTifpWAj+DbYd0jjPjsGzcYa0RdQQSAy63nlTJ+rgk5Q4NFrPzR1y 5n5cnqp8S1ucyG0U5jsP5svfhWywsKd2nmHt44qDa6D1GUvRjmwpTHkhNrZs6PCWF5sm Z3EA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:delivered-to:arc-authentication-results; bh=rkwUl7a3PabN/6bcEgn0HSmB+7QsRZqbwqMLX4MDMoo=; b=ch+ssuloMzez+LFRZx/jhiiSQ3rZKFQZbSeixQ4KKpxGWMOXYKBGTAXOZgXtTrl/lg 6yJcp/X/0Zxd5tsIc0bV9ZVilccoWXysuzUTVXErXlaYUWQZxhiipm2yL+33aCsZU74O gFP7iDvezouDrul8fnhZgfwd145wvH7tmzHs3rjhHfWdysXMwNyekPwM1uT0/RzMxEcl Tn/68JLgh59V939teG5YnInMjDPsDwGk5XNaJUNt91F7MMczgDsGWu5PCMUMRm4jXGiJ KgTydMMLgFPBraxnAZCnf9VYv/UYZcqTSJQFd7i7DBOmqZGWhH66nTnwjyfTaXWfIl1O +Dlw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id l33si1229343pld.188.2017.09.21.09.24.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Sep 2017 09:24:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C9BB821E87979; Thu, 21 Sep 2017 09:20:48 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 71AAE21D046BA for ; Thu, 21 Sep 2017 09:20:46 -0700 (PDT) Received: from E111747.Emea.Arm.com (e111747.emea.arm.com [10.1.32.12]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id v8LGNovW021123; Thu, 21 Sep 2017 17:23:50 +0100 From: evan.lloyd@arm.com To: edk2-devel@lists.01.org Date: Thu, 21 Sep 2017 17:23:42 +0100 Message-Id: <20170921162345.11724-3-evan.lloyd@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170921162345.11724-1-evan.lloyd@arm.com> References: <20170921162345.11724-1-evan.lloyd@arm.com> Subject: [edk2] [PATCH 2/4] EmbeddedPkg: Introduce HardwareInterrupt2 protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nd@arm.com, Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Ard Biesheuvel The existing HardwareInterrupt protocol lacks the means to configure the level/edge and polarity properties of an interrupt. So introduce a new protocol HardwareInterrupt2, and add some new members that allow manipulation of those properties. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Signed-off-by: Girish Pathak Signed-off-by: Evan Lloyd Tested-by: Girish Pathak Reviewed-by: Leif Lindholm --- EmbeddedPkg/EmbeddedPkg.dec | 1 + EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h | 182 ++++++++++++++++++++ 2 files changed, 183 insertions(+) -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec index 0be102ad9c767d81a004c757f40a65063aab1d7a..151b1d503dee463d529a173d2555b6c9208100e5 100644 --- a/EmbeddedPkg/EmbeddedPkg.dec +++ b/EmbeddedPkg/EmbeddedPkg.dec @@ -69,6 +69,7 @@ [Guids.common] [Protocols.common] gHardwareInterruptProtocolGuid = { 0x2890B3EA, 0x053D, 0x1643, { 0xAD, 0x0C, 0xD6, 0x48, 0x08, 0xDA, 0x3F, 0xF1 } } + gHardwareInterrupt2ProtocolGuid = { 0x32898322, 0x2da1, 0x474a, { 0xba, 0xaa, 0xf3, 0xf7, 0xcf, 0x56, 0x94, 0x70 } } gEfiDebugSupportPeriodicCallbackProtocolGuid = { 0x9546e07c, 0x2cbb, 0x4c88, { 0x98, 0x6c, 0xcd, 0x34, 0x10, 0x86, 0xf0, 0x44 } } gEfiEblAddCommandProtocolGuid = { 0xaeda2428, 0x9a22, 0x4637, { 0x9b, 0x21, 0x54, 0x5e, 0x28, 0xfb, 0xb8, 0x29 } } gEmbeddedDeviceGuid = { 0xbf4b9d10, 0x13ec, 0x43dd, { 0x88, 0x80, 0xe9, 0xb, 0x71, 0x8f, 0x27, 0xde } } diff --git a/EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h b/EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h new file mode 100644 index 0000000000000000000000000000000000000000..caa28d4b06c893d220efdbdb8814abaa1ddef1a6 --- /dev/null +++ b/EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h @@ -0,0 +1,182 @@ +/** @file + + Copyright (c) 2016-2017, Linaro Ltd. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __HARDWARE_INTERRUPT2_H__ +#define __HARDWARE_INTERRUPT2_H__ + +#include + +// 22838932-1a2d-4a47-aaba-f3f7cf569470 + +#define EFI_HARDWARE_INTERRUPT2_PROTOCOL_GUID \ + { 0x32898322, 0x2d1a, 0x474a, \ + { 0xba, 0xaa, 0xf3, 0xf7, 0xcf, 0x56, 0x94, 0x70 } } + +typedef enum { + EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_LOW, + EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH, + EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_FALLING, + EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING, +} EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE; + +typedef struct _EFI_HARDWARE_INTERRUPT2_PROTOCOL \ + EFI_HARDWARE_INTERRUPT2_PROTOCOL; + +/** + Register Handler for the specified interrupt source. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + @param Handler Callback for interrupt. NULL to unregister + + @retval EFI_SUCCESS Source was updated to support Handler. + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_REGISTER) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + IN HARDWARE_INTERRUPT_HANDLER Handler + ); + + +/** + Enable interrupt source Source. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + + @retval EFI_SUCCESS Source interrupt enabled. + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_ENABLE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source + ); + + +/** + Disable interrupt source Source. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + + @retval EFI_SUCCESS Source interrupt disabled. + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_DISABLE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source + ); + + +/** + Return current state of interrupt source Source. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + @param InterruptState TRUE: source enabled, FALSE: source disabled. + + @retval EFI_SUCCESS InterruptState is valid + @retval EFI_DEVICE_ERROR InterruptState is not valid + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_INTERRUPT_STATE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + IN BOOLEAN *InterruptState + ); + +/** + Signal to the hardware that the End Of Interrupt state + has been reached. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + + @retval EFI_SUCCESS Source interrupt EOI'ed. + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_END_OF_INTERRUPT) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source + ); + +/** + Return the configured trigger type for an interrupt source + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + @param TriggerType The configured trigger type + + @retval EFI_SUCCESS Operation successful + @retval EFI_DEVICE_ERROR Information could not be returned + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_GET_TRIGGER_TYPE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType + ); + + +/** + Configure the trigger type for an interrupt source + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + @param TriggerType The trigger type to configure + + @retval EFI_SUCCESS Operation successful + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_SET_TRIGGER_TYPE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType + ); + +struct _EFI_HARDWARE_INTERRUPT2_PROTOCOL { + HARDWARE_INTERRUPT2_REGISTER RegisterInterruptSource; + HARDWARE_INTERRUPT2_ENABLE EnableInterruptSource; + HARDWARE_INTERRUPT2_DISABLE DisableInterruptSource; + HARDWARE_INTERRUPT2_INTERRUPT_STATE GetInterruptSourceState; + HARDWARE_INTERRUPT2_END_OF_INTERRUPT EndOfInterrupt; + + // v2 members + HARDWARE_INTERRUPT2_GET_TRIGGER_TYPE GetTriggerType; + HARDWARE_INTERRUPT2_SET_TRIGGER_TYPE SetTriggerType; +}; + +extern EFI_GUID gHardwareInterrupt2ProtocolGuid; + +#endif