deleted file mode 100644
@@ -1,121 +0,0 @@
-/** @file
-* Header defining Versatile Express constants (Base addresses, sizes, flags)
-*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_VEXPRESS_H__
-#define __ARM_VEXPRESS_H__
-
-#include <Base.h>
-#include <VExpressMotherBoard.h>
-
-/***********************************************************************************
-// Platform Memory Map
-************************************************************************************/
-
-// Can be NOR0, NOR1, DRAM
-#define ARM_VE_REMAP_BASE 0x00000000
-#define ARM_VE_REMAP_SZ SIZE_64MB
-
-// Motherboard Peripheral and On-chip peripheral
-#define ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE 0x10000000
-#define ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ SIZE_256MB
-#define ARM_VE_BOARD_PERIPH_BASE 0x10000000
-#define ARM_VE_CHIP_PERIPH_BASE 0x10020000
-
-// SMC
-#define ARM_VE_SMC_BASE 0x40000000
-#define ARM_VE_SMC_SZ 0x1C000000
-
-// NOR Flash 1
-#define ARM_VE_SMB_NOR0_BASE 0x40000000
-#define ARM_VE_SMB_NOR0_SZ SIZE_64MB
-// NOR Flash 2
-#define ARM_VE_SMB_NOR1_BASE 0x44000000
-#define ARM_VE_SMB_NOR1_SZ SIZE_64MB
-// SRAM
-#define ARM_VE_SMB_SRAM_BASE 0x48000000
-#define ARM_VE_SMB_SRAM_SZ SIZE_32MB
-// USB, Ethernet, VRAM
-#define ARM_VE_SMB_PERIPH_BASE 0x4C000000
-#define PL111_CLCD_VRAM_MOTHERBOARD_BASE ARM_VE_SMB_PERIPH_BASE
-#define ARM_VE_SMB_PERIPH_SZ SIZE_64MB
-
-// DRAM
-#define ARM_VE_DRAM_BASE PcdGet64 (PcdSystemMemoryBase)
-#define ARM_VE_DRAM_SZ PcdGet64 (PcdSystemMemorySize)
-// Inside the DRAM we allocate a section for the VRAM (Video RAM)
-#define LCD_VRAM_CORE_TILE_BASE 0x64000000
-
-// External AXI between daughterboards (Logic Tile)
-#define ARM_VE_EXT_AXI_BASE 0xE0000000
-#define ARM_VE_EXT_AXI_SZ 0x20000000 /* 512 MB */
-
-
-/***********************************************************************************
- Core Tile memory-mapped Peripherals
-************************************************************************************/
-
-// PL111 Colour LCD Controller - core tile
-#define PL111_CLCD_CORE_TILE_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x20000)
-#define PL111_CLCD_SITE ARM_VE_DAUGHTERBOARD_1_SITE
-
-// PL341 Dynamic Memory Controller Base
-#define ARM_VE_DMC_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE0000)
-
-// PL354 Static Memory Controller Base
-#define ARM_VE_SMC_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE1000)
-
-// System Configuration Controller register Base addresses
-#define ARM_VE_SYS_CFG_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE2000)
-#define ARM_VE_SCC_BASE ARM_VE_SYS_CFG_CTRL_BASE
-#define ARM_VE_SYS_CFGRW0_REG (ARM_VE_BOARD_PERIPH_BASE + 0xE2000)
-#define ARM_VE_SYS_CFGRW1_REG (ARM_VE_BOARD_PERIPH_BASE + 0xE2004)
-#define ARM_VE_SYS_CFGRW2_REG (ARM_VE_BOARD_PERIPH_BASE + 0xE2008)
-
-// SP805 Watchdog on Cortex A9 core tile
-#define SP805_WDOG_CORE_TILE_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE5000)
-
-// BP147 TZPC Base Address
-#define ARM_VE_TZPC_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE6000)
-
-// PL301 Fast AXI Base Address
-#define ARM_VE_FAXI_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xE9000)
-
-// TZASC Trust Zone Address Space Controller Base Address
-#define ARM_VE_TZASC_BASE (ARM_VE_BOARD_PERIPH_BASE + 0xEC000)
-
-// PL310 L2x0 Cache Controller Base Address
-//#define ARM_VE_L2x0_CTLR_BASE 0x1E00A000
-
-/***********************************************************************************
- Peripherals' misc settings
-************************************************************************************/
-
-#define ARM_VE_CFGRW1_TZASC_EN_BIT_MASK 0x2000
-#define ARM_VE_CFGRW1_REMAP_NOR0 0
-#define ARM_VE_CFGRW1_REMAP_NOR1 (1 << 28)
-#define ARM_VE_CFGRW1_REMAP_EXT_AXI (1 << 29)
-#define ARM_VE_CFGRW1_REMAP_DRAM (1 << 30)
-
-// TZASC - Other settings
-#define ARM_VE_DECPROT_BIT_TZPC (1 << 6)
-#define ARM_VE_DECPROT_BIT_DMC_TZASC (1 << 11)
-#define ARM_VE_DECPROT_BIT_NMC_TZASC (1 << 12)
-#define ARM_VE_DECPROT_BIT_SMC_TZASC (1 << 13)
-#define ARM_VE_DECPROT_BIT_EXT_MAST_TZ (1)
-#define ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK (1 << 3)
-#define ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK (1 << 4)
-#define ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK (1 << 5)
-
-#endif
deleted file mode 100644
@@ -1,57 +0,0 @@
-#/* @file
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CTA9x4ArmVExpressLib
- FILE_GUID = b16c63a0-f417-11df-b3af-0002a5d5c51b
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- ArmTrustZoneLib
- MemoryAllocationLib
- PL341DmcLib
- PL301AxiLib
-
-[Sources.common]
- CTA9x4Helper.asm | RVCT
- CTA9x4Helper.S | GCC
- CTA9x4.c
- CTA9x4Mem.c
- CTA9x4Helper.S | GCC
- CTA9x4Helper.asm | RVCT
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
- gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
-[Ppis]
- gArmMpCoreInfoPpiGuid
deleted file mode 100644
@@ -1,54 +0,0 @@
-#/* @file
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CTA9x4ArmVExpressLibSec
- FILE_GUID = 8d25ef2c-2015-416e-b8aa-2369fecd4bda
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- ArmTrustZoneLib
- PL341DmcLib
- PL301AxiLib
- SerialPortLib
-
-[Sources.common]
- CTA9x4.c
- CTA9x4Helper.S | GCC
- CTA9x4Helper.asm | RVCT
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
- gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
-[Ppis]
- gArmMpCoreInfoPpiGuid
deleted file mode 100644
@@ -1,198 +0,0 @@
-/** @file
-*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL341Dmc.h>
-#include <Drivers/PL301Axi.h>
-#include <Drivers/SP804Timer.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-ARM_CORE_INFO mVersatileExpressMpCoreInfoCTA9x4[] = {
- {
- // Cluster 0, Core 0
- 0x0, 0x0,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 1
- 0x0, 0x1,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 2
- 0x0, 0x2,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- },
- {
- // Cluster 0, Core 3
- 0x0, 0x3,
-
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
- (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
- (UINT64)0xFFFFFFFF
- }
-};
-
-// DDR2 timings
-PL341_DMC_CONFIG DDRTimings = {
- .MaxChip = 1,
- .IsUserCfg = TRUE,
- .User0Cfg = 0x7C924924,
- .User2Cfg = (TC_UIOLHXC_VALUE << TC_UIOLHNC_SHIFT) | (TC_UIOLHXC_VALUE << TC_UIOLHPC_SHIFT) | (0x1 << TC_UIOHOCT_SHIFT) | (0x1 << TC_UIOHSTOP_SHIFT),
- .HasQos = TRUE,
- .RefreshPeriod = 0x3D0,
- .CasLatency = 0x8,
- .WriteLatency = 0x3,
- .t_mrd = 0x2,
- .t_ras = 0xA,
- .t_rc = 0xE,
- .t_rcd = 0x104,
- .t_rfc = 0x2f32,
- .t_rp = 0x14,
- .t_rrd = 0x2,
- .t_wr = 0x4,
- .t_wtr = 0x2,
- .t_xp = 0x2,
- .t_xsr = 0xC8,
- .t_esr = 0x14,
- .MemoryCfg = DMC_MEMORY_CONFIG_ACTIVE_CHIP_1 | DMC_MEMORY_CONFIG_BURST_4 |
- DMC_MEMORY_CONFIG_ROW_ADDRESS_15 | DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10,
- .MemoryCfg2 = DMC_MEMORY_CFG2_DQM_INIT | DMC_MEMORY_CFG2_CKE_INIT |
- DMC_MEMORY_CFG2_BANK_BITS_3 | DMC_MEMORY_CFG2_MEM_WIDTH_32,
- .MemoryCfg3 = 0x00000001,
- .ChipCfg0 = 0x00010000,
- .t_faw = 0x00000A0D,
- .ModeReg = DDR2_MR_BURST_LENGTH_4 | DDR2_MR_CAS_LATENCY_4 | DDR2_MR_WR_CYCLES_4,
- .ExtModeReg = DDR_EMR_RTT_50R | (DDR_EMR_ODS_VAL << DDR_EMR_ODS_MASK),
-};
-
-/**
- Return the current Boot Mode
-
- This function returns the boot reason on the platform
-
- @return Return the current Boot Mode of the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
- VOID
- )
-{
- if (MmioRead32(ARM_VE_SYS_FLAGS_NV_REG) == 0) {
- return BOOT_WITH_FULL_CONFIGURATION;
- } else {
- return BOOT_ON_S2_RESUME;
- }
-}
-
-/**
- Initialize controllers that must setup in the normal world
-
- This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
- in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
- IN UINTN MpId
- )
-{
- if (!ArmPlatformIsPrimaryCore (MpId)) {
- return RETURN_SUCCESS;
- }
-
- // Configure periodic timer (TIMER0) for 1MHz operation
- MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
- // Configure 1MHz clock
- MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
- // configure SP810 to use 1MHz clock and disable
- MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
- // Configure SP810 to use 1MHz clock and disable
- MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
-
- return RETURN_SUCCESS;
-}
-
-/**
- Initialize the system (or sometimes called permanent) memory
-
- This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
- VOID
- )
-{
- PL341DmcInit (ARM_VE_DMC_BASE, &DDRTimings);
- PL301AxiInit (ARM_VE_FAXI_BASE);
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
- OUT UINTN *CoreCount,
- OUT ARM_CORE_INFO **ArmCoreTable
- )
-{
- *CoreCount = sizeof(mVersatileExpressMpCoreInfoCTA9x4) / sizeof(ARM_CORE_INFO);
- *ArmCoreTable = mVersatileExpressMpCoreInfoCTA9x4;
-
- return EFI_SUCCESS;
-}
-
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI,
- &gArmMpCoreInfoPpiGuid,
- &mMpCoreInfoPpi
- }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
- OUT UINTN *PpiListSize,
- OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
- )
-{
- *PpiListSize = sizeof(gPlatformPpiTable);
- *PpiList = gPlatformPpiTable;
-}
-
deleted file mode 100644
@@ -1,49 +0,0 @@
-#
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-#include <AsmMacroIoLib.h>
-#include <Library/ArmLib.h>
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
- MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
- bx lr
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ASM_FUNC(ArmPlatformIsPrimaryCore)
- MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
- and r0, r0, r1
- MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore))
- cmp r0, r1
- moveq r0, #1
- movne r0, #0
- bx lr
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-ASM_FUNC(ArmPlatformGetCorePosition)
- and r0, r0, #ARM_CORE_MASK
- bx lr
-
-ASM_FUNC(ArmPlatformPeiBootAction)
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
deleted file mode 100644
@@ -1,63 +0,0 @@
-//
-// Copyright (c) 2013, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <Library/ArmLib.h>
-
-#include <AutoGen.h>
-
- INCLUDE AsmMacroIoLib.inc
-
- EXPORT ArmPlatformPeiBootAction
- EXPORT ArmPlatformIsPrimaryCore
- EXPORT ArmPlatformGetPrimaryCoreMpId
- EXPORT ArmPlatformGetCorePosition
-
- AREA CTA9x4Helper, CODE, READONLY
-
-//UINTN
-//ArmPlatformGetPrimaryCoreMpId (
-// VOID
-// );
-ArmPlatformGetPrimaryCoreMpId FUNCTION
- mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformIsPrimaryCore (
-// IN UINTN MpId
-// );
-ArmPlatformIsPrimaryCore FUNCTION
- mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
- and r0, r0, r1
- mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
- cmp r0, r1
- moveq r0, #1
- movne r0, #0
- bx lr
- ENDFUNC
-
-//UINTN
-//ArmPlatformGetCorePosition (
-// IN UINTN MpId
-// );
-ArmPlatformGetCorePosition FUNCTION
- and r0, r0, #ARM_CORE_MASK
- bx lr
- ENDFUNC
-
-ArmPlatformPeiBootAction FUNCTION
- bx lr
- ENDFUNC
-
- END
deleted file mode 100644
@@ -1,119 +0,0 @@
-/** @file
-*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-
-#include <ArmPlatform.h>
-
-// Number of Virtual Memory Map Descriptors without a Logic Tile
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6
-
-// DDR attributes
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
-
-/**
- Return the Virtual Memory Map of your platform
-
- This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
-
- @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
- Virtual Memory mapping. This array must be ended by a zero-filled
- entry
-
-**/
-VOID
-ArmPlatformGetVirtualMemoryMap (
- IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
- )
-{
- ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
- UINTN Index = 0;
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
-
- ASSERT(VirtualMemoryMap != NULL);
-
- VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
- if (VirtualMemoryTable == NULL) {
- return;
- }
-
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- CacheAttributes = DDR_ATTRIBUTES_CACHED;
- } else {
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
- }
-
- if (FeaturePcdGet(PcdNorFlashRemapping) == FALSE) {
- // ReMap (Either NOR Flash or DRAM)
- VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
- }
-
- // DDR
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // SMC CS7
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SMB CS0-CS1 - NOR Flash 1 & 2
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // SMB CS2 - SRAM
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_SRAM_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_SRAM_SZ;
- VirtualMemoryTable[Index].Attributes = CacheAttributes;
-
- // SMB CS3-CS6 - Motherboard Peripherals
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- // If a Logic Tile is connected to The ARM Versatile Express Motherboard
- if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE;
- VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
-
- ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));
- } else {
- ASSERT((Index + 1) == MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
- }
-
- // End of Table
- VirtualMemoryTable[++Index].PhysicalBase = 0;
- VirtualMemoryTable[Index].VirtualBase = 0;
- VirtualMemoryTable[Index].Length = 0;
- VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
-
- *VirtualMemoryMap = VirtualMemoryTable;
-}
ArmVExpressLibCTA9x4 is unused, and rather outdated, given that it is the last ArmPlatformLib implementation that executes both in the secure and non-secure worlds, which is a model we no longer support for ARM systems. So remove it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h | 121 ------------ ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf | 57 ------ ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf | 54 ------ ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c | 198 -------------------- ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S | 49 ----- ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm | 63 ------- ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c | 119 ------------ 7 files changed, 661 deletions(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel