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[198.145.21.10]) by mx.google.com with ESMTPS id p1-v6si3989255plb.479.2018.02.01.08.10.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 01 Feb 2018 08:10:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=MZKJN79R; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 01DEF223CCF1F; Thu, 1 Feb 2018 08:04:48 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::243; helo=mail-wm0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 695CF223CCF19 for ; Thu, 1 Feb 2018 08:04:46 -0800 (PST) Received: by mail-wm0-x243.google.com with SMTP id 141so6725590wme.3 for ; Thu, 01 Feb 2018 08:10:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wxyrtUHzhfZ3GfG8DtsvMzjIW2/gQxJp/posUUUH+bk=; b=MZKJN79RV1/my7ai+HlVU98geUyq3jlCtsBanOkopgNI2jbR89+gYiI3UVj7kpTFfU /jRpIMzbbrnpIs2eORHdTdc0+2GNmibgpgHiBeIvtMva3S1phDCV7P0ZnjPenUVOOxjP Eb48TtT3FOJevj8WD50INnTtSIGfSxhPh8/S0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wxyrtUHzhfZ3GfG8DtsvMzjIW2/gQxJp/posUUUH+bk=; b=sjgrwaUQXqUH6xhkkOKqxd9Rqess6HngHzOtcl6X/XGBj4HU40qP4reJaNAohcrPKC /i2AAmuGzfP+SW7V5g9d+4bFiD7AzyQEhkhqde5ENVBlcKIWa8WIkcpbZTOwzKgVZyEx +WEHCrp+D/UkQX4c8A4Bx38GT/34mKq7d50MxFFW0tu5ZRJxaII7fSvKKJCZ57QSiZMq Jhq17kp5HAw6UE3Ec9WJeC0tO1k9jcefl5+e5iCq4IRJC5hYiTUUM0cAKTPU9Tr7yaCj ewfGJOkE1mToloSFTEMyiam880jEil4yHTb3I38JSrJrtPFoAYfGY+IHM1nqGtGd4nVu LOTg== X-Gm-Message-State: AKwxytc23hMduSPT0HC4KLIFyC0o85s0zwX9hBaPIwpULmZU36arvbky 5tgAs3lkBsCoFYeedqCe6TJPn2nQHPc= X-Received: by 10.28.48.10 with SMTP id w10mr28572573wmw.93.1517501422126; Thu, 01 Feb 2018 08:10:22 -0800 (PST) Received: from localhost.localdomain ([160.164.249.13]) by smtp.gmail.com with ESMTPSA id 39sm8204139wrz.85.2018.02.01.08.10.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 01 Feb 2018 08:10:21 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 1 Feb 2018 16:10:06 +0000 Message-Id: <20180201161008.4037-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180201161008.4037-1-ard.biesheuvel@linaro.org> References: <20180201161008.4037-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 2/4] Platform/AMD/OverdriveBoard: cover secure firmware in capsule update X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marc.zyngier@arm.com, alan@softiron.co.uk, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add the first part of the flash device (FD) to the capsule image so we can update the secure and SCP firmware in one go along with the UEFI firmware volume (FV). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/AMD/OverdriveBoard/OverdriveBoard.fdf | 3 ++- Platform/AMD/OverdriveBoard/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 4 ++-- Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c | 12 ++++-------- Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf | 3 +-- 4 files changed, 9 insertions(+), 13 deletions(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf index 54f209571f0e..8ceee9552765 100644 --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf @@ -343,7 +343,7 @@ [FV.SystemFirmwareUpdateCargo] READ_LOCK_STATUS = TRUE FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid - FV = STYX_EFI + FD = STYX_ROM } FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid @@ -353,6 +353,7 @@ [FV.SystemFirmwareUpdateCargo] FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid Platform/AMD/OverdriveBoard/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini } + INF RuleOverride = FMP_IMAGE_DESC Platform/AMD/OverdriveBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf [FmpPayload.FmpPayloadSystemFirmwarePkcs7] IMAGE_HEADER_INIT_VERSION = 0x02 diff --git a/Platform/AMD/OverdriveBoard/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/AMD/OverdriveBoard/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini index c89e95f60fba..49b6480b4ed0 100644 --- a/Platform/AMD/OverdriveBoard/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini +++ b/Platform/AMD/OverdriveBoard/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini @@ -19,7 +19,7 @@ Update0 = StyxFvMain [StyxFvMain] FirmwareType = 0 # SystemFirmware AddressType = 0 # 0 - relative address, 1 - absolute address. -BaseAddress = 0x00200000 # Base address offset on flash -Length = 0x00260000 # Length +BaseAddress = 0x00000000 # Base address offset on flash +Length = 0x00460000 # Length ImageOffset = 0x00000000 # Image offset of this SystemFirmware image FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid diff --git a/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c index a23500dd35dc..a94373bb4b53 100644 --- a/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c +++ b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c @@ -22,9 +22,7 @@ #include -STATIC CONST UINT64 mFlashOffset = FixedPcdGet64 (PcdFvBaseAddress) - - FixedPcdGet64 (PcdFdBaseAddress); -STATIC CONST UINT64 mFlashMaxSize = FixedPcdGet64 (PcdFvSize); +STATIC CONST UINT64 mFlashMaxSize = FixedPcdGet64 (PcdFdSize); STATIC CONST UINTN mBlockSize = SIZE_64KB; @@ -77,12 +75,10 @@ PerformFlashWrite ( return EFI_INVALID_PARAMETER; } - if (FlashAddress < mFlashOffset || - (FlashAddress + Length) > (mFlashOffset + mFlashMaxSize)) { + if ((FlashAddress + Length) > mFlashMaxSize) { DEBUG ((DEBUG_ERROR, - "%a: updated region [0x%lx, 0x%lx) outside of FV region [0x%lx, 0x%lx)\n", - __FUNCTION__, FlashAddress, FlashAddress + Length, mFlashOffset, - mFlashOffset + mFlashMaxSize)); + "%a: updated region [0x%lx, 0x%lx) outside of FV region [0x0, 0x%lx)\n", + __FUNCTION__, FlashAddress, FlashAddress + Length, mFlashMaxSize)); return EFI_INVALID_PARAMETER; } diff --git a/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf index 411173f1f3c5..b54a2e90ff02 100644 --- a/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf +++ b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.inf @@ -40,8 +40,7 @@ [Protocols] [FixedPcd] gArmTokenSpaceGuid.PcdFdBaseAddress - gArmTokenSpaceGuid.PcdFvBaseAddress - gArmTokenSpaceGuid.PcdFvSize + gArmTokenSpaceGuid.PcdFdSize [Depex] gAmdIscpDxeProtocolGuid