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[91.69.153.33]) by smtp.gmail.com with ESMTPSA id x79sm16469106wmd.42.2018.11.23.04.14.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 04:14:44 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 23 Nov 2018 13:14:27 +0100 Message-Id: <20181123121431.22353-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181123121431.22353-1-ard.biesheuvel@linaro.org> References: <20181123121431.22353-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 1/5] ArmPkg/ArmLib: add support for reading the max physical address space size X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Laszlo Ersek , Eric Auger MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add a helper function that returns the maximum physical address space size as supported by the current CPU. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPkg/Include/Library/ArmLib.h | 6 ++++++ ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 16 ++++++++++++++++ ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S | 8 ++++++++ 3 files changed, 30 insertions(+) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Philippe Mathieu-Daudé diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index ffda50e9d767..9a804c15fdb6 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -733,4 +733,10 @@ ArmWriteCntvOff ( UINT64 Val ); +UINTN +EFIAPI +ArmGetPhysicalAddressBits ( + VOID + ); + #endif // __ARM_LIB__ diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S index 1ef2f61f5979..75ab8dade485 100644 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S @@ -196,4 +196,20 @@ ASM_FUNC(ArmWriteSctlr) 3:msr sctlr_el3, x0 4:ret +ASM_FUNC(ArmGetPhysicalAddressBits) + mrs x0, id_aa64mmfr0_el1 + adr x1, .LPARanges + and x0, x0, #7 + ldrb w0, [x1, x0] + ret + +// +// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the +// physical address space support on this CPU: +// 0 == 32 bits, 1 == 36 bits, etc etc +// 6 and 7 are reserved +// +.LPARanges: + .byte 32, 36, 40, 42, 44, 48, -1, -1 + ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S index f2a517671f0a..f2f3c9a25991 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S @@ -165,4 +165,12 @@ ASM_FUNC(ArmWriteCpuActlr) isb bx lr +ASM_FUNC (ArmGetPhysicalAddressBits) + mrc p15, 0, r0, c0, c1, 4 // MMFR0 + and r0, r0, #0xf // VMSA [3:0] + cmp r0, #5 // >5 implies LPAE support + movlt r0, #32 // 32 bits if no LPAE + movge r0, #40 // 40 bits if LPAE + bx lr + ASM_FUNCTION_REMOVE_IF_UNREFERENCED