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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id o3si16514684pll.201.2018.12.19.12.40.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 19 Dec 2018 12:40:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=k3dTF434; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 5AB5B211A2D84; Wed, 19 Dec 2018 12:40:39 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::343; helo=mail-wm1-x343.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [IPv6:2a00:1450:4864:20::343]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 50B29211A2099 for ; Wed, 19 Dec 2018 12:40:36 -0800 (PST) Received: by mail-wm1-x343.google.com with SMTP id a62so7385654wmh.4 for ; Wed, 19 Dec 2018 12:40:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=w4K3qfvI+jUTnTQSAKtVMlbhWvEpnmcmuOSsW7x4jYM=; b=k3dTF434q+/2c6ZpZrthKHnZ58xa2dyV+qyZiUobsXswtZ4zOZo9HewPhuwxk7TOTF gotHdtL1PqQvu0Gq+K5mbti+phJGMcNG9Owl7mu+o+WC6znWUE++WWR3+12wAX0lNV3i Dq37HQBtBlI3sIHnKkzm1HaqqHw1e8cTofv/E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=w4K3qfvI+jUTnTQSAKtVMlbhWvEpnmcmuOSsW7x4jYM=; b=bldH+Ob8Gel+pm2/a3gcvXghRQGi1bY7DK+9CWVZNUgOciOWR5qTrVu1nGjuQ7cj9X 1zjHve04DYd7I5587FrFL2gEbVzKcJVXeexmSp3kI8lPioZ5Xw2CTP4pV486u+gx7uB3 YXq1frV9GQpShpW7aidiE+VyKQpN/GJdBL5VMxg88tj72z2YNWpsr+o+7DGwYSwIlx/a krtj02ETHr2TwLbUJrTf7uO2vDxoZuYETHGFSRRuGzhovynBjMg9YmEfqcikgNLm/4WT ZFT5kriUiMW92bg2DrDSNdlmNvK9nH8DFCjyp5a3CxOoU2wpBYJa4Or/ZfkeEKI1KdRf LJRw== X-Gm-Message-State: AA+aEWZQviZnAYVypGjLhx8n1vYkY/lW0SxASLqTnt0t3MIXh2P5lGUj Lu3gz+4pQXBOm7WR8Du/WQBVOJ8+15cUjw== X-Received: by 2002:a1c:dc02:: with SMTP id t2mr8334448wmg.78.1545252034265; Wed, 19 Dec 2018 12:40:34 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:e5c9:6e00:25cb:e32e]) by smtp.gmail.com with ESMTPSA id h16sm13738439wrb.62.2018.12.19.12.40.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 19 Dec 2018 12:40:33 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 19 Dec 2018 21:40:20 +0100 Message-Id: <20181219204023.6317-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181219204023.6317-1-ard.biesheuvel@linaro.org> References: <20181219204023.6317-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [edk2] [PATCH v2 1/4] ArmPlatformPkg/SP805WatchdogDxe: cosmetic cleanup X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Before fixing the SP805 driver, let's clean it up a bit. No functional changes. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf | 11 +-- ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c | 97 ++++++++++---------- 2 files changed, 52 insertions(+), 56 deletions(-) -- 2.19.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf index 37924f2e3cd2..c3971fb035d3 100644 --- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf +++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf @@ -1,6 +1,7 @@ /** @file * * Copyright (c) 2011-2012, ARM Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -18,35 +19,29 @@ [Defines] FILE_GUID = ebd705fb-fa92-46a7-b32b-7f566d944614 MODULE_TYPE = DXE_DRIVER VERSION_STRING = 1.0 - ENTRY_POINT = SP805Initialize [Sources.common] SP805Watchdog.c [Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec ArmPkg/ArmPkg.dec ArmPlatformPkg/ArmPlatformPkg.dec + MdePkg/MdePkg.dec [LibraryClasses] BaseLib - BaseMemoryLib DebugLib IoLib - PcdLib - UefiLib UefiBootServicesTableLib UefiDriverEntryPoint - UefiRuntimeServicesTableLib [Pcd] gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz [Protocols] - gEfiWatchdogTimerArchProtocolGuid + gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES [Depex] TRUE diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c index 0a9f64095bf8..12c2f0a1fe49 100644 --- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c +++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c @@ -1,6 +1,7 @@ /** @file * * Copyright (c) 2011-2013, ARM Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -19,16 +20,13 @@ #include #include #include -#include #include -#include -#include #include #include "SP805Watchdog.h" -EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; +STATIC EFI_EVENT mEfiExitBootServicesEvent; /** Make sure the SP805 registers are unlocked for writing. @@ -43,8 +41,8 @@ SP805Unlock ( VOID ) { - if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) { - MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE); + if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED) { + MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE); } } @@ -61,9 +59,9 @@ SP805Lock ( VOID ) { - if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) { + if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED) { // To lock it, just write in any number (except the special unlock code). - MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED); + MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED); } } @@ -77,8 +75,8 @@ SP805Stop ( ) { // Disable interrupts - if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) { - MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN); + if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0) { + MmioAnd32 (SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN); } } @@ -94,8 +92,8 @@ SP805Start ( ) { // Enable interrupts - if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) { - MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN); + if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0) { + MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN); } } @@ -103,6 +101,7 @@ SP805Start ( On exiting boot services we must make sure the SP805 Watchdog Timer is stopped. **/ +STATIC VOID EFIAPI ExitBootServicesEvent ( @@ -110,9 +109,9 @@ ExitBootServicesEvent ( IN VOID *Context ) { - SP805Unlock(); - SP805Stop(); - SP805Lock(); + SP805Unlock (); + SP805Stop (); + SP805Lock (); } /** @@ -142,10 +141,11 @@ ExitBootServicesEvent ( previously registered. **/ +STATIC EFI_STATUS EFIAPI SP805RegisterHandler ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction ) { @@ -182,22 +182,24 @@ SP805RegisterHandler ( @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. **/ +STATIC EFI_STATUS EFIAPI SP805SetTimerPeriod ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, IN UINT64 TimerPeriod // In 100ns units ) { - EFI_STATUS Status = EFI_SUCCESS; + EFI_STATUS Status; UINT64 Ticks64bit; - SP805Unlock(); + SP805Unlock (); - if( TimerPeriod == 0 ) { + Status = EFI_SUCCESS; + + if (TimerPeriod == 0) { // This is a watchdog stop request - SP805Stop(); - goto EXIT; + SP805Stop (); } else { // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds // The SP805 will count down to ZERO once, generate an interrupt and @@ -211,10 +213,11 @@ SP805SetTimerPeriod ( // // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ; - Ticks64bit = DivU64x32(MultU64x32(TimerPeriod, (UINTN)PcdGet32(PcdSP805WatchdogClockFrequencyInHz)), 20000000); + Ticks64bit = MultU64x32 (TimerPeriod, PcdGet32 (PcdSP805WatchdogClockFrequencyInHz)); + Ticks64bit = DivU64x32 (Ticks64bit, 20000000); // The registers in the SP805 are only 32 bits - if(Ticks64bit > (UINT64)0xFFFFFFFF) { + if (Ticks64bit > MAX_UINT32) { // We could load the watchdog with the maximum supported value but // if a smaller value was requested, this could have the watchdog // triggering before it was intended. @@ -224,15 +227,15 @@ SP805SetTimerPeriod ( } // Update the watchdog with a 32-bit value. - MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit); + MmioWrite32 (SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit); // Start the watchdog - SP805Start(); + SP805Start (); } - EXIT: +EXIT: // Ensure the watchdog is locked before exiting. - SP805Lock(); + SP805Lock (); return Status; } @@ -251,14 +254,14 @@ SP805SetTimerPeriod ( @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. **/ +STATIC EFI_STATUS EFIAPI SP805GetTimerPeriod ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, + IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, OUT UINT64 *TimerPeriod ) { - EFI_STATUS Status = EFI_SUCCESS; UINT64 ReturnValue; if (TimerPeriod == NULL) { @@ -266,19 +269,19 @@ SP805GetTimerPeriod ( } // Check if the watchdog is stopped - if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) { + if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0) { // It is stopped, so return zero. ReturnValue = 0; } else { // Convert the Watchdog ticks into TimerPeriod // Ensure 64bit arithmetic throughout because the Watchdog ticks may already // be at the maximum 32 bit value and we still need to multiply that by 600. - ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 ); + ReturnValue = MultU64x32 (MmioRead32 (SP805_WDOG_LOAD_REG), 600); } *TimerPeriod = ReturnValue; - return Status; + return EFI_SUCCESS; } /** @@ -313,10 +316,10 @@ SP805GetTimerPeriod ( Retrieves the period of the timer interrupt in 100 nS units. **/ -EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = { - (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) SP805RegisterHandler, - (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) SP805SetTimerPeriod, - (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) SP805GetTimerPeriod +STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = { + SP805RegisterHandler, + SP805SetTimerPeriod, + SP805GetTimerPeriod }; /** @@ -347,12 +350,12 @@ SP805Initialize ( SP805Stop (); // Set the watchdog to reset the board when triggered - if ((MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) { + if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) { MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN); } // Prohibit any rogue access to SP805 registers - SP805Lock(); + SP805Lock (); // // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet. @@ -361,28 +364,26 @@ SP805Initialize ( ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid); // Register for an ExitBootServicesEvent - Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); - if (EFI_ERROR(Status)) { + Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, + ExitBootServicesEvent, NULL, &mEfiExitBootServicesEvent); + if (EFI_ERROR (Status)) { Status = EFI_OUT_OF_RESOURCES; goto EXIT; } // Install the Timer Architectural Protocol onto a new handle Handle = NULL; - Status = gBS->InstallMultipleProtocolInterfaces( + Status = gBS->InstallMultipleProtocolInterfaces ( &Handle, - &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer, + &gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer, NULL ); - if (EFI_ERROR(Status)) { + if (EFI_ERROR (Status)) { Status = EFI_OUT_OF_RESOURCES; goto EXIT; } EXIT: - if(EFI_ERROR(Status)) { - // The watchdog failed to initialize - ASSERT(FALSE); - } + ASSERT_EFI_ERROR (Status); return Status; }