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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id e23sm1484525ioc.34.2021.02.10.14.33.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Feb 2021 14:33:24 -0800 (PST) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: elder@kernel.org, evgreen@chromium.org, bjorn.andersson@linaro.org, cpratapa@codeaurora.org, subashab@codeaurora.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/5] net: ipa: use a separate pointer for adjusted GSI memory Date: Wed, 10 Feb 2021 16:33:16 -0600 Message-Id: <20210210223320.11269-2-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210210223320.11269-1-elder@linaro.org> References: <20210210223320.11269-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch actually fixes a bug, though it doesn't affect the two platforms supported currently. The fix implements GSI memory pointers a bit differently. For IPA version 4.5 and above, the address space for almost all GSI registers is adjusted downward by a fixed amount. This is currently handled by adjusting the I/O virtual address pointer after it has been mapped. The bug is that the pointer is not "de-adjusted" as it should be when it's unmapped. This patch fixes that error, but it does so by maintaining one "raw" pointer for the mapped memory range. This is assigned when the memory is mapped and used to unmap the memory. This pointer is also used to access the two registers that do *not* sit in the "adjusted" memory space. Rather than adjusting *that* pointer, we maintain a separate pointer that's an adjusted copy of the "raw" pointer, and that is used for most GSI register accesses. Signed-off-by: Alex Elder --- drivers/net/ipa/gsi.c | 26 +++++++++++--------------- drivers/net/ipa/gsi.h | 3 ++- drivers/net/ipa/gsi_reg.h | 19 ++++++++++++------- 3 files changed, 25 insertions(+), 23 deletions(-) -- 2.20.1 diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index 511c94f66036c..d33686da15420 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -195,8 +195,6 @@ static void gsi_irq_type_disable(struct gsi *gsi, enum gsi_irq_type_id type_id) /* Turn off all GSI interrupts initially */ static void gsi_irq_setup(struct gsi *gsi) { - u32 adjust; - /* Disable all interrupt types */ gsi_irq_type_update(gsi, 0); @@ -206,10 +204,9 @@ static void gsi_irq_setup(struct gsi *gsi) iowrite32(0, gsi->virt + GSI_CNTXT_GLOB_IRQ_EN_OFFSET); iowrite32(0, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET); - /* Reverse the offset adjustment for inter-EE register offsets */ - adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST; - iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_CH_IRQ_OFFSET); - iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET); + /* The inter-EE registers are in the non-adjusted address range */ + iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_CH_IRQ_OFFSET); + iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET); iowrite32(0, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET); } @@ -2180,9 +2177,8 @@ int gsi_init(struct gsi *gsi, struct platform_device *pdev, gsi->dev = dev; gsi->version = version; - /* The GSI layer performs NAPI on all endpoints. NAPI requires a - * network device structure, but the GSI layer does not have one, - * so we must create a dummy network device for this purpose. + /* GSI uses NAPI on all channels. Create a dummy network device + * for the channel NAPI contexts to be associated with. */ init_dummy_netdev(&gsi->dummy_dev); @@ -2207,13 +2203,13 @@ int gsi_init(struct gsi *gsi, struct platform_device *pdev, return -EINVAL; } - gsi->virt = ioremap(res->start, size); - if (!gsi->virt) { + gsi->virt_raw = ioremap(res->start, size); + if (!gsi->virt_raw) { dev_err(dev, "unable to remap \"gsi\" memory\n"); return -ENOMEM; } - /* Adjust register range pointer downward for newer IPA versions */ - gsi->virt -= adjust; + /* Most registers are accessed using an adjusted register range */ + gsi->virt = gsi->virt_raw - adjust; init_completion(&gsi->completion); @@ -2232,7 +2228,7 @@ int gsi_init(struct gsi *gsi, struct platform_device *pdev, err_irq_exit: gsi_irq_exit(gsi); err_iounmap: - iounmap(gsi->virt); + iounmap(gsi->virt_raw); return ret; } @@ -2243,7 +2239,7 @@ void gsi_exit(struct gsi *gsi) mutex_destroy(&gsi->mutex); gsi_channel_exit(gsi); gsi_irq_exit(gsi); - iounmap(gsi->virt); + iounmap(gsi->virt_raw); } /* The maximum number of outstanding TREs on a channel. This limits diff --git a/drivers/net/ipa/gsi.h b/drivers/net/ipa/gsi.h index d674db0ba4eb0..088860d5c3104 100644 --- a/drivers/net/ipa/gsi.h +++ b/drivers/net/ipa/gsi.h @@ -149,7 +149,8 @@ struct gsi { struct device *dev; /* Same as IPA device */ enum ipa_version version; struct net_device dummy_dev; /* needed for NAPI */ - void __iomem *virt; + void __iomem *virt_raw; /* I/O mapped address range */ + void __iomem *virt; /* Adjusted for most registers */ u32 irq; u32 channel_count; u32 evt_ring_count; diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h index 299456e70f286..00100afa8ec35 100644 --- a/drivers/net/ipa/gsi_reg.h +++ b/drivers/net/ipa/gsi_reg.h @@ -38,17 +38,21 @@ * (though the actual limit is hardware-dependent). */ -/* GSI EE registers as a group are shifted downward by a fixed - * constant amount for IPA versions 4.5 and beyond. This applies - * to all GSI registers we use *except* the ones that disable - * inter-EE interrupts for channels and event channels. +/* GSI EE registers as a group are shifted downward by a fixed constant amount + * for IPA versions 4.5 and beyond. This applies to all GSI registers we use + * *except* the ones that disable inter-EE interrupts for channels and event + * channels. * - * We handle this by adjusting the pointer to the mapped GSI memory - * region downward. Then in the one place we use them (gsi_irq_setup()) - * we undo that adjustment for the inter-EE interrupt registers. + * The "raw" (not adjusted) GSI register range is mapped, and a pointer to + * the mapped range is held in gsi->virt_raw. The inter-EE interrupt + * registers are accessed using that pointer. + * + * Most registers are accessed using gsi->virt, which is a copy of the "raw" + * pointer, adjusted downward by the fixed amount. */ #define GSI_EE_REG_ADJUST 0x0000d000 /* IPA v4.5+ */ +/* The two inter-EE IRQ register offsets are relative to gsi->virt_raw */ #define GSI_INTER_EE_SRC_CH_IRQ_OFFSET \ GSI_INTER_EE_N_SRC_CH_IRQ_OFFSET(GSI_EE_AP) #define GSI_INTER_EE_N_SRC_CH_IRQ_OFFSET(ee) \ @@ -59,6 +63,7 @@ #define GSI_INTER_EE_N_SRC_EV_CH_IRQ_OFFSET(ee) \ (0x0000c01c + 0x1000 * (ee)) +/* All other register offsets are relative to gsi->virt */ #define GSI_CH_C_CNTXT_0_OFFSET(ch) \ GSI_EE_N_CH_C_CNTXT_0_OFFSET((ch), GSI_EE_AP) #define GSI_EE_N_CH_C_CNTXT_0_OFFSET(ch, ee) \ From patchwork Wed Feb 10 22:33:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 380253 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp1567220jah; Wed, 10 Feb 2021 14:35:06 -0800 (PST) X-Google-Smtp-Source: ABdhPJzgEhMPgx1fMrPxdIpvFNOsKmNz9+EpHmSRAzoD7wqk4EtVBfRx8C3nujfV6jG7C/KbaT1s X-Received: by 2002:a17:906:2353:: with SMTP id m19mr5314581eja.13.1612996506056; Wed, 10 Feb 2021 14:35:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612996506; cv=none; d=google.com; s=arc-20160816; b=l83kHwI96hx9SE8CNBCxO0l5SvxK1Pwqrj45Jwwp8V1x8mJ0x/4CnzumrwR7OLAWG+ 7g8UQiafH1TzCF5Jn0cIIysJCQM6RzCInWcXCq1jDVaRsLMwtuIZJqbQRXdmYxx8KP3W niW9EAmMg2AE0PPVhV0j2S+WS7iP+RdkGBdIKRD5oa3PYV/YumuseqKv2SSuRUEysmah BPDqFZCCr3bLqinj5gwl1PD+n/Spe23/55zcPWeebi0fKLgAFn9Ot4OMzGGtCE7K8AMg jl91iCCwdg+hhACKmtk/2LMX9qE9ddx6V2RLSg1ImCjpvakrk1onOlEiQvS/LeMrSdgU Kqug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=kS/gU6f8FHhPHE8VvojwVRld2jg6RFS0NvtZfg95Sy4=; b=oTpLKZmqqHNlnckleczreAAWEs4cHzQ0t5RKxp1wNtO9mUPUANp05urGPKsj6gXr1K +WnnQfDWxWXnrfxAoW6a1INVG1HdsxRC3IZHhxVJ960dVUxUmDcfi4ARRVjy+5nprQyO NgCMeDx5sIWWl1OrsLRS1Fk3Ca7mysCMs1gZEbvYyMMGYtNkzBSdIKBre1b4Lu72KRT+ vw+QNH8hK+ibDw5RQF6pHtvyMhxM7E+u/dVdYVrGG3kDQc4ed4vSXDgm0NIg2Lompk1n YPv9K1u+qcUWpdbVmE9CIXOirF6gaOGeHmZx3kBcA3JvYTXt4gdfAOT2dL9y/0hctAs1 V6FQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ybH66RtL; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id e23sm1484525ioc.34.2021.02.10.14.33.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Feb 2021 14:33:25 -0800 (PST) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: elder@kernel.org, evgreen@chromium.org, bjorn.andersson@linaro.org, cpratapa@codeaurora.org, subashab@codeaurora.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/5] net: ipa: don't report EPROBE_DEFER error Date: Wed, 10 Feb 2021 16:33:17 -0600 Message-Id: <20210210223320.11269-3-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210210223320.11269-1-elder@linaro.org> References: <20210210223320.11269-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org When initializing the IPA core clock and interconnects, it's possible we'll get an EPROBE_DEFER error. This isn't really an error, it's just means we need to be re-probed later. Check the return code when initializing these, and if it's EPROBE_DEFER, skip printing the error message. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_clock.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) -- 2.20.1 diff --git a/drivers/net/ipa/ipa_clock.c b/drivers/net/ipa/ipa_clock.c index 354675a643db5..9c845f9bb318e 100644 --- a/drivers/net/ipa/ipa_clock.c +++ b/drivers/net/ipa/ipa_clock.c @@ -68,8 +68,9 @@ static int ipa_interconnect_init_one(struct device *dev, if (IS_ERR(path)) { int ret = PTR_ERR(path); - dev_err(dev, "error %d getting %s interconnect\n", ret, - data->name); + if (ret != -EPROBE_DEFER) + dev_err(dev, "error %d getting %s interconnect\n", ret, + data->name); return ret; } @@ -281,7 +282,10 @@ ipa_clock_init(struct device *dev, const struct ipa_clock_data *data) clk = clk_get(dev, "core"); if (IS_ERR(clk)) { - dev_err(dev, "error %ld getting core clock\n", PTR_ERR(clk)); + ret = PTR_ERR(clk); + if (ret != -EPROBE_DEFER) + dev_err(dev, "error %d getting core clock\n", ret); + return ERR_CAST(clk); } From patchwork Wed Feb 10 22:33:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 380254 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp1567238jah; Wed, 10 Feb 2021 14:35:07 -0800 (PST) X-Google-Smtp-Source: ABdhPJxwnrV4kNrVf9Pzel4jerVFNE7KJoTjkgJfU1a/S2VVboCg8eT0zGPbEoG99Vlg8KTq/YjO X-Received: by 2002:a05:6402:501:: with SMTP id m1mr5337435edv.58.1612996506879; Wed, 10 Feb 2021 14:35:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612996506; cv=none; d=google.com; s=arc-20160816; b=Bi2AidC0sGNc37MEVTRa4XaKX4W5tvEV4ZddiQkqe9/Bl8BMBrekjSmq/3rYewQRd5 BD35eqiZPi33oaqHuxYLEuaKKjiUme5a3X25cXlTUfnAXY6JCQazbFSQNmUna8tCKbAc F069dEWP9wCf2Dwicc8/jBanyBQzwhy+MSYftUbkh4j9kmVlO8XsRH1K5rW2UGGfAIim vq6es8uzPddLmEyOkTheQdPcI1Np4CwbJsR5+XS2nBVljg0X8lfkBwxep54q7KdtE274 4PXVuq3NMFkht6i+54HtuNqlzMZqgIKSLc86K8TFHZPLZKpoq+4kDc7zs248JEt58LNU /U/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ebGMA32A3lz4dOPF3atpHHf9aQxnDO22teaa/gzKf7E=; b=B+t7gkRRGzQqDtuYEfWLELAK1G1UkanabEB/83E39AUGgrk7psZ3X/WvSchzj6+M1E N/+zzHfUwNhAjE1xYu6YJ/vFscQL3QyMSvq5O2Pd+XoA4Zl1BTJ1t/MpMLyxvkpIHGv3 F+1qnyOdPuSNZ9BEGMajmGbeai+1Jt6yVtYPzcUk+bvjFM7RGhAwnbz0Uca2Od2fgAst xyr5kO8RtZmIa0jBNa11bQUJuZVZpJe2nJtM9ehZHo2JRiuRAJJuklJApNy+1kMKagNZ vPF+xXswfhZX4l7MUkx88D9LGOuHtsKWFL4Vp7npPPYr6vN2vvAnElBLuoF5u6/Sn7sU PUHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TRkL8rpb; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id e23sm1484525ioc.34.2021.02.10.14.33.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Feb 2021 14:33:26 -0800 (PST) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: elder@kernel.org, evgreen@chromium.org, bjorn.andersson@linaro.org, cpratapa@codeaurora.org, subashab@codeaurora.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 3/5] net: ipa: fix register write command validation Date: Wed, 10 Feb 2021 16:33:18 -0600 Message-Id: <20210210223320.11269-4-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210210223320.11269-1-elder@linaro.org> References: <20210210223320.11269-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org In ipa_cmd_register_write_valid() we verify that values we will supply to a REGISTER_WRITE IPA immediate command will fit in the fields that need to hold them. This patch fixes some issues in that function and ipa_cmd_register_write_offset_valid(). The dev_err() call in ipa_cmd_register_write_offset_valid() has some printf format errors: - The name of the register (corresponding to the string format specifier) was not supplied. - The IPA base offset and offset need to be supplied separately to match the other format specifiers. Also make the ~0 constant used there to compute the maximum supported offset value explicitly unsigned. There are two other issues in ipa_cmd_register_write_valid(): - There's no need to check the hash flush register for platforms (like IPA v4.2) that do not support hashed tables - The highest possible endpoint number, whose status register offset is computed, is COUNT - 1, not COUNT. Fix these problems, and add some additional commentary. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_cmd.c | 30 +++++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-) -- 2.20.1 diff --git a/drivers/net/ipa/ipa_cmd.c b/drivers/net/ipa/ipa_cmd.c index 97b50fee60089..8c832bf2637ab 100644 --- a/drivers/net/ipa/ipa_cmd.c +++ b/drivers/net/ipa/ipa_cmd.c @@ -244,11 +244,15 @@ static bool ipa_cmd_register_write_offset_valid(struct ipa *ipa, if (ipa->version != IPA_VERSION_3_5_1) bit_count += hweight32(REGISTER_WRITE_FLAGS_OFFSET_HIGH_FMASK); BUILD_BUG_ON(bit_count > 32); - offset_max = ~0 >> (32 - bit_count); + offset_max = ~0U >> (32 - bit_count); + /* Make sure the offset can be represented by the field(s) + * that holds it. Also make sure the offset is not outside + * the overall IPA memory range. + */ if (offset > offset_max || ipa->mem_offset > offset_max - offset) { dev_err(dev, "%s offset too large 0x%04x + 0x%04x > 0x%04x)\n", - ipa->mem_offset + offset, offset_max); + name, ipa->mem_offset, offset, offset_max); return false; } @@ -261,12 +265,24 @@ static bool ipa_cmd_register_write_valid(struct ipa *ipa) const char *name; u32 offset; - offset = ipa_reg_filt_rout_hash_flush_offset(ipa->version); - name = "filter/route hash flush"; - if (!ipa_cmd_register_write_offset_valid(ipa, name, offset)) - return false; + /* If hashed tables are supported, ensure the hash flush register + * offset will fit in a register write IPA immediate command. + */ + if (ipa->version != IPA_VERSION_4_2) { + offset = ipa_reg_filt_rout_hash_flush_offset(ipa->version); + name = "filter/route hash flush"; + if (!ipa_cmd_register_write_offset_valid(ipa, name, offset)) + return false; + } - offset = IPA_REG_ENDP_STATUS_N_OFFSET(IPA_ENDPOINT_COUNT); + /* Each endpoint can have a status endpoint associated with it, + * and this is recorded in an endpoint register. If the modem + * crashes, we reset the status endpoint for all modem endpoints + * using a register write IPA immediate command. Make sure the + * worst case (highest endpoint number) offset of that endpoint + * fits in the register write command field(s) that must hold it. + */ + offset = IPA_REG_ENDP_STATUS_N_OFFSET(IPA_ENDPOINT_COUNT - 1); name = "maximal endpoint status"; if (!ipa_cmd_register_write_offset_valid(ipa, name, offset)) return false; From patchwork Wed Feb 10 22:33:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 380257 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp1568238jah; Wed, 10 Feb 2021 14:36:43 -0800 (PST) X-Google-Smtp-Source: ABdhPJzI6QtSvcYEVeVg+nNCPXoqupM4Hz5tRukcbnS0Q9MPTRmXB4Eox3XzX8tTp4DTn7lun9ta X-Received: by 2002:a17:906:cc5d:: with SMTP id mm29mr5311333ejb.183.1612996603290; Wed, 10 Feb 2021 14:36:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612996603; cv=none; d=google.com; s=arc-20160816; b=sbP9qBqdI/ZED2VDBy9BuMrx/xZfazdG7kKpW6AAf4EiL9T5Of0ujC1IwO2gWLISlr eU9RkHksmGUPCZf8i/IQOGeBQykePHr3JEHvo/AXJzc9D5UvzeF1Og2jl+aYrHjeO6C7 mW1iqn1l7S83zb8FizvMA6KDGJleos1WVTgz8iU616MlkL1g20MA3Or5izAsfwlboueJ DpXUjA68uPYOhfw1t1TIqNrBIUnuaE/MGFoR1IMmwBuZAxwA334dOdSL4S7usleywMJ5 6c7Gvm9sBwKBYClA5k7nQvc28nln/qI/UzNLt8CTtqZsyW8TtE7F5OFKdaBmR+oB6SnU 6dAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=t6ANzS3+2tsE4t3VkmY2+dGn199wA0IEauFrqe8OQ8I=; b=FdUJ+a3Ei3HAUcry3Pe7CadeBDH6nivLnOTb6dmHL2n4D3H7xse3yzIinWzwc9/td5 yMamJy0wtVYJmbWnED84ZOCM5na9L3habcdImzIxmBnhB407/7qpwKI5irni44VbqSRQ ITD8UjtC1HGZoM0qKuO9gXViqsOWKAi2pZhDRjoKKp6pqYTio91rYzB7zGqyp8WOiMMD anCL7N+1sjZ3619kVIL1NZxFtY2jUidjPlxSqNXWqF/SHX4tY55INczcu0ruheetF+8k MsY2tK9BQ/Hh5zKmNh/3sLi3lRvu/UBHdsWqxwsxgfOfUlW/u7DQ2g4Zo+doVNWbUXwl F7HA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rx1gHAS3; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id e23sm1484525ioc.34.2021.02.10.14.33.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Feb 2021 14:33:27 -0800 (PST) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: elder@kernel.org, evgreen@chromium.org, bjorn.andersson@linaro.org, cpratapa@codeaurora.org, subashab@codeaurora.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 4/5] net: ipa: introduce ipa_table_hash_support() Date: Wed, 10 Feb 2021 16:33:19 -0600 Message-Id: <20210210223320.11269-5-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210210223320.11269-1-elder@linaro.org> References: <20210210223320.11269-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Introduce a new function to abstract the knowledge of whether hashed routing and filter tables are supported for a given IPA instance. IPA v4.2 is the only one that doesn't support hashed tables (now and for the foreseeable future), but the name of the helper function is better for explaining what's going on. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_cmd.c | 2 +- drivers/net/ipa/ipa_table.c | 14 ++++++++------ drivers/net/ipa/ipa_table.h | 6 ++++++ 3 files changed, 15 insertions(+), 7 deletions(-) -- 2.20.1 diff --git a/drivers/net/ipa/ipa_cmd.c b/drivers/net/ipa/ipa_cmd.c index 8c832bf2637ab..6a698ac9e6987 100644 --- a/drivers/net/ipa/ipa_cmd.c +++ b/drivers/net/ipa/ipa_cmd.c @@ -268,7 +268,7 @@ static bool ipa_cmd_register_write_valid(struct ipa *ipa) /* If hashed tables are supported, ensure the hash flush register * offset will fit in a register write IPA immediate command. */ - if (ipa->version != IPA_VERSION_4_2) { + if (ipa_table_hash_support(ipa)) { offset = ipa_reg_filt_rout_hash_flush_offset(ipa->version); name = "filter/route hash flush"; if (!ipa_cmd_register_write_offset_valid(ipa, name, offset)) diff --git a/drivers/net/ipa/ipa_table.c b/drivers/net/ipa/ipa_table.c index 32e2d3e052d55..5e069f0f5d706 100644 --- a/drivers/net/ipa/ipa_table.c +++ b/drivers/net/ipa/ipa_table.c @@ -239,6 +239,11 @@ static void ipa_table_validate_build(void) #endif /* !IPA_VALIDATE */ +bool ipa_table_hash_support(struct ipa *ipa) +{ + return ipa->version != IPA_VERSION_4_2; +} + /* Zero entry count means no table, so just return a 0 address */ static dma_addr_t ipa_table_addr(struct ipa *ipa, bool filter_mask, u16 count) { @@ -412,8 +417,7 @@ int ipa_table_hash_flush(struct ipa *ipa) struct gsi_trans *trans; u32 val; - /* IPA version 4.2 does not support hashed tables */ - if (ipa->version == IPA_VERSION_4_2) + if (!ipa_table_hash_support(ipa)) return 0; trans = ipa_cmd_trans_alloc(ipa, 1); @@ -531,8 +535,7 @@ static void ipa_filter_config(struct ipa *ipa, bool modem) enum gsi_ee_id ee_id = modem ? GSI_EE_MODEM : GSI_EE_AP; u32 ep_mask = ipa->filter_map; - /* IPA version 4.2 has no hashed route tables */ - if (ipa->version == IPA_VERSION_4_2) + if (!ipa_table_hash_support(ipa)) return; while (ep_mask) { @@ -582,8 +585,7 @@ static void ipa_route_config(struct ipa *ipa, bool modem) { u32 route_id; - /* IPA version 4.2 has no hashed route tables */ - if (ipa->version == IPA_VERSION_4_2) + if (!ipa_table_hash_support(ipa)) return; for (route_id = 0; route_id < IPA_ROUTE_COUNT_MAX; route_id++) diff --git a/drivers/net/ipa/ipa_table.h b/drivers/net/ipa/ipa_table.h index 78038d14fcea9..c14fbe64d360e 100644 --- a/drivers/net/ipa/ipa_table.h +++ b/drivers/net/ipa/ipa_table.h @@ -51,6 +51,12 @@ static inline bool ipa_filter_map_valid(struct ipa *ipa, u32 filter_mask) #endif /* !IPA_VALIDATE */ +/** + * ipa_table_hash_support() - Return true if hashed tables are supported + * @ipa: IPA pointer + */ +bool ipa_table_hash_support(struct ipa *ipa); + /** * ipa_table_reset() - Reset filter and route tables entries to "none" * @ipa: IPA pointer From patchwork Wed Feb 10 22:33:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 380258 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp1568251jah; Wed, 10 Feb 2021 14:36:44 -0800 (PST) X-Google-Smtp-Source: ABdhPJwCZ5LpxOBLDVt2YvPH/sKGNaG0U2RKxWdY+epPcsPLRegKx5pFbxaFasENlKgtI7ciLSAv X-Received: by 2002:a05:6402:50c6:: with SMTP id h6mr5326346edb.117.1612996604730; Wed, 10 Feb 2021 14:36:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612996604; cv=none; d=google.com; s=arc-20160816; b=w6cyBbPISPqkhp7R/NBjl4rto1b/5bcwrug5guM/s+5mprjXAb8votDXraykyfY11S 1fGYfehMfzlukIaWfvBB2/sCv6YFgDtI9VFHPxuhTLwZpcDYNKfwC133WEEtB6d11Sks BqdahnY+fV86PNB7RkxpGrRc8gM/8Lze1vyRQ8Ol61YQwQKZeN8DNQSDQTWnOghNOaUH 6YQZFH7n2EsnFQ0ZCinIeLiPlvJNzHkIsak9LxNxBiICWtKHOHqkIiXIBRr5CIRUV5HJ EaFJ0Z8PNF8KpqEumjCFu9AkRHwYx72MG8zGdxQP7sx2m2stBWFm8W9XigNU1AJm+DeM lJsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7FCuQIhoM4UnSeDf+V9T1zVw5r1nx3mRIbuQj9L1BYA=; b=pTwG3/PBlnfesz0E0am+roFGZDBeTlXIXbvALvguxpLna5hTn7YtYEsdiFKWFU4/xq bmYcwcubQfk6y00vZRrr6TkxUjn72oZFDe0hGrqpcPoGB9kRfjRMFEmYixXqxeSedUje Sq+TUTdJwW4pC6R0PEyJdZkx8AZAUvy8Pk7nU8Dhh68x/Sxln6INfsreIAx7YW1MzpMC frG9eKHRaCyDoARNgUb2xYZ2yt6CzPHeXW5XW0Db6feNKFF8e1EFg7rnfR6h88ugKJBg GmyOrZ/mcMFgnJkWviFMCVcmWe9fjNX+cwa8sO9FBqADROJOjmaCBL+VG+wuYBG92S9C 1msA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Rd/yJmUW"; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id e23sm1484525ioc.34.2021.02.10.14.33.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Feb 2021 14:33:28 -0800 (PST) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: elder@kernel.org, evgreen@chromium.org, bjorn.andersson@linaro.org, cpratapa@codeaurora.org, subashab@codeaurora.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 5/5] net: ipa: introduce gsi_channel_initialized() Date: Wed, 10 Feb 2021 16:33:20 -0600 Message-Id: <20210210223320.11269-6-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210210223320.11269-1-elder@linaro.org> References: <20210210223320.11269-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Create a simple helper function that indicates whether a channel has been initialized. This abstacts/hides the details of how this is determined. Signed-off-by: Alex Elder --- drivers/net/ipa/gsi.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) -- 2.20.1 diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index d33686da15420..2406363bba2e8 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -175,6 +175,12 @@ static u32 gsi_channel_id(struct gsi_channel *channel) return channel - &channel->gsi->channel[0]; } +/* An initialized channel has a non-null GSI pointer */ +static bool gsi_channel_initialized(struct gsi_channel *channel) +{ + return !!channel->gsi; +} + /* Update the GSI IRQ type register with the cached value */ static void gsi_irq_type_update(struct gsi *gsi, u32 val) { @@ -1638,8 +1644,8 @@ static int gsi_channel_setup_one(struct gsi *gsi, u32 channel_id) u32 evt_ring_id = channel->evt_ring_id; int ret; - if (!channel->gsi) - return 0; /* Ignore uninitialized channels */ + if (!gsi_channel_initialized(channel)) + return 0; ret = gsi_evt_ring_alloc_command(gsi, evt_ring_id); if (ret) @@ -1675,8 +1681,8 @@ static void gsi_channel_teardown_one(struct gsi *gsi, u32 channel_id) struct gsi_channel *channel = &gsi->channel[channel_id]; u32 evt_ring_id = channel->evt_ring_id; - if (!channel->gsi) - return; /* Ignore uninitialized channels */ + if (!gsi_channel_initialized(channel)) + return; netif_napi_del(&channel->napi); @@ -1770,8 +1776,8 @@ static int gsi_channel_setup(struct gsi *gsi) while (channel_id < GSI_CHANNEL_COUNT_MAX) { struct gsi_channel *channel = &gsi->channel[channel_id++]; - if (!channel->gsi) - continue; /* Ignore uninitialized channels */ + if (!gsi_channel_initialized(channel)) + continue; dev_err(gsi->dev, "channel %u not supported by hardware\n", channel_id - 1); @@ -2088,8 +2094,8 @@ static int gsi_channel_init_one(struct gsi *gsi, /* Inverse of gsi_channel_init_one() */ static void gsi_channel_exit_one(struct gsi_channel *channel) { - if (!channel->gsi) - return; /* Ignore uninitialized channels */ + if (!gsi_channel_initialized(channel)) + return; if (channel->command) ipa_cmd_pool_exit(channel);