From patchwork Mon Mar 19 01:03:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 131990 Delivered-To: patch@linaro.org Received: by 10.46.84.17 with SMTP id i17csp2147473ljb; Sun, 18 Mar 2018 18:03:50 -0700 (PDT) X-Google-Smtp-Source: AG47ELsAKk5KxdAqGbhRuGXXLzqgGadMUq63XuWJB11bwoxbpfYl9zsOs4kGzlMiKGTBrTIFYwA7 X-Received: by 10.223.164.140 with SMTP id g12mr4367998wrb.270.1521421430506; Sun, 18 Mar 2018 18:03:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521421430; cv=none; d=google.com; s=arc-20160816; b=TuB0RD6HNE/BrJMjyo7ptj2kY2vy9Suo6SLalYNoQ2xs2Eb7A9+N3qZViChwtx6qHc R12SOTF6vquSsOgWxQ7Uo8LoiKi8jVsOX39uWdUj/3ix3Ki9RSXxzh+IJHD4A9zGGE5T G4mH42vQQq82l0knmCi20jPka1ahmXOhXa1sFu+M4jVmboGbMJw2d92dZUlxbUZRmxQM aBuRLcNDwEa7ciBvUn+nIyOvO79bpGLwM0lO8BmhB+wtbZOLAjDg3tHb7vycqGTYgFN3 KEl7xqUTg7cskyEF0SYBFriB6gFdMEO3F/nvqbK4kwBSDXMiMUJW23PX25caLnx9OnJt 0YKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:date:message-id:in-reply-to:to:from :dkim-signature:delivered-to:arc-authentication-results; bh=a/N3ly4GYl8I39ZURxGBRMC9Om47v4n8DsDzIHH/Tgk=; b=UHS0JmeGfJq6n39CdbCvk0wU9xk5F6H+lOYZyUvQ/hPOYUlR32QtDBFL8wZAh+513N qVlCVfwpGNVzCr+Do7VwLFhhXq5tGMxg3GgtiT5+tTuRk2BSgMCRVpCzMi8T7cZIN4WE iRa45LQoa6beLWTHtghC+fURyRCtxge0z6vLYdK9oqrP5DYGb6Fud2G2zlrT/a/pZNjQ Ylvlud1XL4aHDBPWceXp+ckK2kQD8/zLbJ/wO1wyt3eyaoLpNtj9iirPNxsmR7uhxKAA l43V5h+m+UJGCf8dDK6w5lBt0BavKhuJ1wiW8jO7x4P+hYGmUZkqxXDtTceh+0AsQcP6 i9/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=gBch4qIX; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Return-Path: Received: from alsa0.perex.cz (alsa0.perex.cz. [77.48.224.243]) by mx.google.com with ESMTP id t69si383708wrc.36.2018.03.18.18.03.50; Sun, 18 Mar 2018 18:03:50 -0700 (PDT) Received-SPF: pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) client-ip=77.48.224.243; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=gBch4qIX; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 08218267344; Mon, 19 Mar 2018 02:03:37 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 10A65267344; Mon, 19 Mar 2018 02:03:35 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail1.perex.cz X-Spam-Level: X-Spam-Status: No, score=0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, SPF_PASS, T_RP_MATCHES_RCVD autolearn=disabled version=3.4.0 Received: from heliosphere.sirena.org.uk (heliosphere.sirena.org.uk [172.104.155.198]) by alsa0.perex.cz (Postfix) with ESMTP id 346452672A7 for ; Mon, 19 Mar 2018 02:03:32 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=eEd0vjF844K3ekvGP4moogtiLujpfUx0XJmrqBE4k3g=; b=gBch4qIXMZEn Q5r61Rk0LxCrtNddAxhbM7QlJC6atGBnXPXhj1qQ/F2pNyIMvIe4eO/G/ICHj59CVmYR7u8MPQGDn 5f4sU05TalQcn4vd9oUiu3xRInkcVwixfFoZwpJeH6b//z0mtZ/PEiotTvOqqda4HNPvOZil18amq 0Q+z4=; Received: from [218.255.99.6] (helo=finisterre.ee.mobilebroadband) by heliosphere.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1exjD1-000670-KC; Mon, 19 Mar 2018 01:03:31 +0000 Received: by finisterre.ee.mobilebroadband (Postfix, from userid 1000) id 17912440079; Mon, 19 Mar 2018 01:03:29 +0000 (GMT) From: Mark Brown To: Katsuhiro Suzuki In-Reply-To: <20180316070813.17969-3-suzuki.katsuhiro@socionext.com> Message-Id: <20180319010329.17912440079@finisterre.ee.mobilebroadband> Date: Mon, 19 Mar 2018 01:03:29 +0000 (GMT) Cc: alsa-devel@alsa-project.org, Masami Hiramatsu , linux-kernel@vger.kernel.org, Rob Herring , Jassi Brar , Mark Brown , linux-arm-kernel@lists.infradead.org Subject: [alsa-devel] Applied "ASoC: uniphier: add syscon property for UniPhier sound system" to the asoc tree X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org The patch ASoC: uniphier: add syscon property for UniPhier sound system has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 7c3c20f2bec1e8bdaadd551a4b75f1834a7cb974 Mon Sep 17 00:00:00 2001 From: Katsuhiro Suzuki Date: Fri, 16 Mar 2018 16:08:13 +0900 Subject: [PATCH] ASoC: uniphier: add syscon property for UniPhier sound system This patch adds syscon property for specifying soc-glue core. Currently, soc-glue core is used for changing the state of S/PDIF signal output pin to signal output state or Hi-Z state. After resetting of SoC Hi-Z state is selected. This driver set to signal output state when syscon property is available. Signed-off-by: Katsuhiro Suzuki Signed-off-by: Mark Brown --- sound/soc/uniphier/aio-core.c | 21 +++++++++++++++++++++ sound/soc/uniphier/aio-cpu.c | 11 +++++++++++ sound/soc/uniphier/aio-reg.h | 3 +++ sound/soc/uniphier/aio.h | 2 ++ 4 files changed, 37 insertions(+) -- 2.16.2 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel diff --git a/sound/soc/uniphier/aio-core.c b/sound/soc/uniphier/aio-core.c index 1711361fc0c2..6d50042a4571 100644 --- a/sound/soc/uniphier/aio-core.c +++ b/sound/soc/uniphier/aio-core.c @@ -83,6 +83,27 @@ u64 aio_rb_space_to_end(struct uniphier_aio_sub *sub) return rb_space_to_end(sub->wr_offs, sub->rd_offs, sub->compr_bytes); } +/** + * aio_iecout_set_enable - setup IEC output via SoC glue + * @chip: the AIO chip pointer + * @enable: false to stop the output, true to start + * + * Set enabled or disabled S/PDIF signal output to out of SoC via AOnIEC pins. + * This function need to call at driver startup. + * + * The regmap of SoC glue is specified by 'socionext,syscon' optional property + * of DT. This function has no effect if no property. + */ +void aio_iecout_set_enable(struct uniphier_aio_chip *chip, bool enable) +{ + struct regmap *r = chip->regmap_sg; + + if (!r) + return; + + regmap_write(r, SG_AOUTEN, (enable) ? ~0 : 0); +} + /** * aio_chip_set_pll - set frequency to audio PLL * @chip : the AIO chip pointer diff --git a/sound/soc/uniphier/aio-cpu.c b/sound/soc/uniphier/aio-cpu.c index 7cf2316c69a2..1e5eb8e6f8c7 100644 --- a/sound/soc/uniphier/aio-cpu.c +++ b/sound/soc/uniphier/aio-cpu.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -387,6 +388,7 @@ int uniphier_aio_dai_probe(struct snd_soc_dai *dai) sub->spec = spec; } + aio_iecout_set_enable(aio->chip, true); aio_chip_init(aio->chip); aio->chip->active = 1; @@ -431,6 +433,7 @@ int uniphier_aio_dai_resume(struct snd_soc_dai *dai) if (ret) goto err_out_clock; + aio_iecout_set_enable(aio->chip, true); aio_chip_init(aio->chip); for (i = 0; i < ARRAY_SIZE(aio->sub); i++) { @@ -477,6 +480,14 @@ int uniphier_aio_probe(struct platform_device *pdev) if (!chip->chip_spec) return -EINVAL; + chip->regmap_sg = syscon_regmap_lookup_by_phandle(dev->of_node, + "socionext,syscon"); + if (IS_ERR(chip->regmap_sg)) { + if (PTR_ERR(chip->regmap_sg) == -EPROBE_DEFER) + return -EPROBE_DEFER; + chip->regmap_sg = NULL; + } + chip->clk = devm_clk_get(dev, "aio"); if (IS_ERR(chip->clk)) return PTR_ERR(chip->clk); diff --git a/sound/soc/uniphier/aio-reg.h b/sound/soc/uniphier/aio-reg.h index eaf2c65acf14..136d3563cf44 100644 --- a/sound/soc/uniphier/aio-reg.h +++ b/sound/soc/uniphier/aio-reg.h @@ -23,6 +23,9 @@ #include +/* soc-glue */ +#define SG_AOUTEN 0x1c04 + /* SW view */ #define A2CHNMAPCTR0(n) (0x00000 + 0x40 * (n)) #define A2RBNMAPCTR0(n) (0x01000 + 0x40 * (n)) diff --git a/sound/soc/uniphier/aio.h b/sound/soc/uniphier/aio.h index 793334675cb3..8cab4a553a97 100644 --- a/sound/soc/uniphier/aio.h +++ b/sound/soc/uniphier/aio.h @@ -296,6 +296,7 @@ struct uniphier_aio_chip { struct clk *clk; struct reset_control *rst; struct regmap *regmap; + struct regmap *regmap_sg; int active; }; @@ -323,6 +324,7 @@ u64 aio_rbt_cnt_to_end(struct uniphier_aio_sub *sub); u64 aio_rb_space(struct uniphier_aio_sub *sub); u64 aio_rb_space_to_end(struct uniphier_aio_sub *sub); +void aio_iecout_set_enable(struct uniphier_aio_chip *chip, bool enable); int aio_chip_set_pll(struct uniphier_aio_chip *chip, int pll_id, unsigned int freq); void aio_chip_init(struct uniphier_aio_chip *chip);