From patchwork Thu Mar 22 14:28:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 132292 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp922518ljb; Thu, 22 Mar 2018 07:32:41 -0700 (PDT) X-Google-Smtp-Source: AG47ELs1g3TcA4OVdpMpIhKIUcbJPCDY1Q9SVyDkQ+wJO88oZ1MsSNhArv+oZOfo4lbwIEyC5j/z X-Received: by 2002:a17:902:6b0c:: with SMTP id o12-v6mr25893943plk.295.1521729161149; Thu, 22 Mar 2018 07:32:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521729161; cv=none; d=google.com; s=arc-20160816; b=VMuKJtpNgpV6ZtYllLk1SfVsDDAho8xlvzOaobW4mDzryQd61c2NiGdGvHfwZ3Xsy2 PHWD9CBlfzFepzxrRvHj0LM5KhyKqC5VZl00wAP0rMB8WcPSVzUyX7HZ9eMB5HUU1QFg RIt5zL4an5kepUx9yF1u95mTMj/3TfsstScp/Z5ZxsNpQpUy5sadLwmGjVK52PCGeQm0 tjPuoL6XwUbvAzL7Mh10jwjC8ORJIO5cGIJPr0iyVwITB26aS20s19GRCeFDEtolTSVz xIk+zAwREYbYKadDgnQGCWCoYhnbO5EvEfTNysybvv3ujqcLCBndfuG4TA45tYJYThDQ 0kHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=B3ALlu8UDUCIW63PG3s/tlxmT665uEkwwF7ZpshBa8U=; b=WgwO6MMiUr0GrMty8rGlBCKfdqOM2IZX+5cvwSnCcjsBh/AoChm+6oRVzwdZctVJGb apoluLJCTUj2c5ctfBJj69U+weBy9k/rZ5z4gX2lzJHCSEGcmZ0IC3X4mYKspwldpDaG d/UdoFLFZzlgim+7vv9ju/JHNLCzC0QXQ4vdqdGOFf2Qg8oIFqO2DhvAvjCQpnHYRZ1m eKwMr2UrvGDoRvi1e9RgxTgMhB+yqOeStnPlzkRxOUEV7FZzv5y3iu7B96faSOH+b4ec RtTbIHoshIYa9gdbMOiP8P+6VGIr6U61PNBoTTW0WYhQUQvrtWxuYUM7QL5yeUNW+6S1 cB9g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q1-v6si3980832plr.679.2018.03.22.07.32.40; Thu, 22 Mar 2018 07:32:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755553AbeCVOch (ORCPT + 28 others); Thu, 22 Mar 2018 10:32:37 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:6258 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754358AbeCVOaH (ORCPT ); Thu, 22 Mar 2018 10:30:07 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id EE9172BDF5AFC; Thu, 22 Mar 2018 22:29:51 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.202.226.47) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.361.1; Thu, 22 Mar 2018 22:29:45 +0800 From: Salil Mehta To: CC: , , , , , Subject: [PATCH net-next 1/9] net: hns3: Changes to make enet watchdog timeout func common for PF/VF Date: Thu, 22 Mar 2018 14:28:52 +0000 Message-ID: <20180322142900.22860-2-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20180322142900.22860-1-salil.mehta@huawei.com> References: <20180322142900.22860-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.226.47] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org HNS3 drivers enet layer, used for the ring management and stack interaction, is common to both VF and PF. PF already supports reset functionality to handle the network stack watchdog timeout trigger but the existing code is not generic enough to be used to support VF reset as well. This patch does following: 1. Makes the existing watchdog timeout handler in enet layer generic i.e. suitable for both VF and PF and 2. Introduces the new reset event handler for the VF code. 3. Changes existing reset event handler of PF code to initialize the reset level Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 7 +++-- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 30 +++++------------- drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | 2 -- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 36 ++++++++++++---------- .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 14 +++++++++ 5 files changed, 46 insertions(+), 43 deletions(-) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 9daa88d..56f9e650 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -118,6 +118,7 @@ enum hnae3_reset_notify_type { }; enum hnae3_reset_type { + HNAE3_VF_RESET, HNAE3_FUNC_RESET, HNAE3_CORE_RESET, HNAE3_GLOBAL_RESET, @@ -400,8 +401,7 @@ struct hnae3_ae_ops { int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid, u16 vlan, u8 qos, __be16 proto); int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable); - void (*reset_event)(struct hnae3_handle *handle, - enum hnae3_reset_type reset); + void (*reset_event)(struct hnae3_handle *handle); void (*get_channels)(struct hnae3_handle *handle, struct ethtool_channels *ch); void (*get_tqps_and_rss_info)(struct hnae3_handle *h, @@ -495,6 +495,9 @@ struct hnae3_handle { struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */ u64 flags; /* Indicate the capabilities for this handle*/ + unsigned long last_reset_time; + enum hnae3_reset_type reset_level; + union { struct net_device *netdev; /* first member */ struct hnae3_knic_private_info kinfo; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 0b4a676..40a3eb7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -320,7 +320,7 @@ static int hns3_nic_net_open(struct net_device *netdev) return ret; } - priv->last_reset_time = jiffies; + priv->ae_handle->last_reset_time = jiffies; return 0; } @@ -1543,7 +1543,6 @@ static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev) static void hns3_nic_net_timeout(struct net_device *ndev) { struct hns3_nic_priv *priv = netdev_priv(ndev); - unsigned long last_reset_time = priv->last_reset_time; struct hnae3_handle *h = priv->ae_handle; if (!hns3_get_tx_timeo_queue_info(ndev)) @@ -1551,24 +1550,12 @@ static void hns3_nic_net_timeout(struct net_device *ndev) priv->tx_timeout_count++; - /* This timeout is far away enough from last timeout, - * if timeout again,set the reset type to PF reset - */ - if (time_after(jiffies, (last_reset_time + 20 * HZ))) - priv->reset_level = HNAE3_FUNC_RESET; - - /* Don't do any new action before the next timeout */ - else if (time_before(jiffies, (last_reset_time + ndev->watchdog_timeo))) + if (time_before(jiffies, (h->last_reset_time + ndev->watchdog_timeo))) return; - priv->last_reset_time = jiffies; - + /* request the reset */ if (h->ae_algo->ops->reset_event) - h->ae_algo->ops->reset_event(h, priv->reset_level); - - priv->reset_level++; - if (priv->reset_level > HNAE3_GLOBAL_RESET) - priv->reset_level = HNAE3_GLOBAL_RESET; + h->ae_algo->ops->reset_event(h); } static const struct net_device_ops hns3_nic_netdev_ops = { @@ -3122,8 +3109,8 @@ static int hns3_client_init(struct hnae3_handle *handle) priv->dev = &pdev->dev; priv->netdev = netdev; priv->ae_handle = handle; - priv->last_reset_time = jiffies; - priv->reset_level = HNAE3_FUNC_RESET; + priv->ae_handle->reset_level = HNAE3_NONE_RESET; + priv->ae_handle->last_reset_time = jiffies; priv->tx_timeout_count = 0; handle->kinfo.netdev = netdev; @@ -3355,7 +3342,6 @@ static int hns3_reset_notify_down_enet(struct hnae3_handle *handle) static int hns3_reset_notify_up_enet(struct hnae3_handle *handle) { struct hnae3_knic_private_info *kinfo = &handle->kinfo; - struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev); int ret = 0; if (netif_running(kinfo->netdev)) { @@ -3365,8 +3351,7 @@ static int hns3_reset_notify_up_enet(struct hnae3_handle *handle) "hns net up fail, ret=%d!\n", ret); return ret; } - - priv->last_reset_time = jiffies; + handle->last_reset_time = jiffies; } return ret; @@ -3378,7 +3363,6 @@ static int hns3_reset_notify_init_enet(struct hnae3_handle *handle) struct hns3_nic_priv *priv = netdev_priv(netdev); int ret; - priv->reset_level = 1; hns3_init_mac_addr(netdev); hns3_nic_set_rx_mode(netdev); hns3_recover_hw_addr(netdev); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h index 39daa01..9e4cfbb 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h @@ -532,8 +532,6 @@ struct hns3_nic_priv { /* The most recently read link state */ int link; u64 tx_timeout_count; - enum hnae3_reset_type reset_level; - unsigned long last_reset_time; unsigned long state; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 31e90b5..a3e00da 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -2845,27 +2845,31 @@ static void hclge_reset(struct hclge_dev *hdev) hclge_notify_client(hdev, HNAE3_UP_CLIENT); } -static void hclge_reset_event(struct hnae3_handle *handle, - enum hnae3_reset_type reset) +static void hclge_reset_event(struct hnae3_handle *handle) { struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_dev *hdev = vport->back; - dev_info(&hdev->pdev->dev, - "Receive reset event , reset_type is %d", reset); + /* check if this is a new reset request and we are not here just because + * last reset attempt did not succeed and watchdog hit us again. We will + * know this if last reset request did not occur very recently (watchdog + * timer = 5*HZ, let us check after sufficiently large time, say 4*5*Hz) + * In case of new request we reset the "reset level" to PF reset. + */ + if (time_after(jiffies, (handle->last_reset_time + 4 * 5 * HZ))) + handle->reset_level = HNAE3_FUNC_RESET; - switch (reset) { - case HNAE3_FUNC_RESET: - case HNAE3_CORE_RESET: - case HNAE3_GLOBAL_RESET: - /* request reset & schedule reset task */ - set_bit(reset, &hdev->reset_request); - hclge_reset_task_schedule(hdev); - break; - default: - dev_warn(&hdev->pdev->dev, "Unsupported reset event:%d", reset); - break; - } + dev_info(&hdev->pdev->dev, "received reset event , reset type is %d", + handle->reset_level); + + /* request reset & schedule reset task */ + set_bit(handle->reset_level, &hdev->reset_request); + hclge_reset_task_schedule(hdev); + + if (handle->reset_level < HNAE3_GLOBAL_RESET) + handle->reset_level++; + + handle->last_reset_time = jiffies; } static void hclge_reset_subtask(struct hclge_dev *hdev) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index 906dfa3..6c3881d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -832,6 +832,19 @@ static void hclgevf_reset_tqp(struct hnae3_handle *handle, u16 queue_id) 2, true, NULL, 0); } +static void hclgevf_reset_event(struct hnae3_handle *handle) +{ + struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); + + dev_info(&hdev->pdev->dev, "received reset request from VF enet\n"); + + handle->reset_level = HNAE3_VF_RESET; + + /* request VF reset here. Code added later */ + + handle->last_reset_time = jiffies; +} + static u32 hclgevf_get_fw_version(struct hnae3_handle *handle) { struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); @@ -1526,6 +1539,7 @@ static const struct hnae3_ae_ops hclgevf_ops = { .get_tc_size = hclgevf_get_tc_size, .get_fw_version = hclgevf_get_fw_version, .set_vlan_filter = hclgevf_set_vlan_filter, + .reset_event = hclgevf_reset_event, .get_channels = hclgevf_get_channels, .get_tqps_and_rss_info = hclgevf_get_tqps_and_rss_info, .get_status = hclgevf_get_status, From patchwork Thu Mar 22 14:28:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 132290 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp921806ljb; Thu, 22 Mar 2018 07:32:08 -0700 (PDT) X-Google-Smtp-Source: AG47ELtYf71ivW3ohL6wjr9VXSGGyDGP5PL9PY7a0jqIXHJFcVFYqfIDsDVdYkxL9tmXBEIlz+Pz X-Received: by 10.98.214.218 with SMTP id a87mr12486482pfl.124.1521729127988; Thu, 22 Mar 2018 07:32:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521729127; cv=none; d=google.com; s=arc-20160816; b=yCLfmpfYHwYmJMzJYD1FOAbnW0LoOrvu2aiXZ7yB9eylWP8QVvVvFrvr3ELABuz2Cu 2VpbLmiBkHUgmhiVEW2OXjkxzDEU2Ikjwdrp9Var871YxfGrqbpdagAsPrMyx9K8SJ0L BY628KJt0Yu4Ja+53NpG6Ou2jj3KJvECmMMVF38sDB/C4ofHsRsB4HnkzmdqrVV67L2r CUck/kgolPVP77asPCyLHLZmUGL8HC6p5FhNg007RV1dK83KFCxwXQYJBDlhw6TzVn08 sOxrjPLrUqJURS6Z7KsKqYYIf+DmtsoubX4dNRgyvgaLNpKOX3eQZV5jrVP/DiR6R8u9 OTcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=rW3JhBSSRJ4SSYR0FDoKh7XPLon/SPk4tuDSL7ZZHdY=; b=tVTGOHcaAVC0Y1YJSYM5okLtwEEkWy4TQShYT47hqzNXBQVYSq33eI66vK/m65WC6v JWUhWp9sTQunRK6BN8LnmgiPdeGZgQj64SfjWQfiBiRB9waOviOVUnnQz5PX6rce99HA /vGpjfUSah5rccWkGj39El14uqYKSdVBpfVQOSuSsYOepAU9J+smfjwSfTJYbZMvriuM rkA0OlvFU2wW+fcTQpTqL14FjdYMorXlXSd65CY6f208mhx10FXOqqJP4JohMkVgkYwz RIo33ELo19awsu91vgjbV6hYINTwIHtKqmIXHEK31i5qZY+i8xQqtcSPvxcq6AP6dCLB FdLQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z10-v6si5666545plk.692.2018.03.22.07.32.07; Thu, 22 Mar 2018 07:32:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755371AbeCVObs (ORCPT + 28 others); Thu, 22 Mar 2018 10:31:48 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:42394 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754591AbeCVOaM (ORCPT ); Thu, 22 Mar 2018 10:30:12 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 786C62A9A9B63; Thu, 22 Mar 2018 22:29:57 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.202.226.47) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.361.1; Thu, 22 Mar 2018 22:29:50 +0800 From: Salil Mehta To: CC: , , , , , Subject: [PATCH net-next 3/9] net: hns3: Add VF Reset device state and its handling Date: Thu, 22 Mar 2018 14:28:54 +0000 Message-ID: <20180322142900.22860-4-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20180322142900.22860-1-salil.mehta@huawei.com> References: <20180322142900.22860-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.226.47] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This introduces the hclge device reset states of "requested" and "pending" and also its handling in context to Reset Service Task. Device gets into requested state because of any VF reset request asserted from upper layers, for example due to watchdog timeout expiration. Requested state would result in eventually forwarding the VF reset request to PF which would actually reset the VF. Device will get into pending state if: 1. VF receives the acknowledgement from PF for the VF reset request it originally sent to PF. 2. Reset Service Task detects that after asserting VF reset for certain times the data-path is not working and device then decides to assert full VF reset(this means also resetting the PCIe interface). 3. PF intimates the VF that it has undergone reset. Pending state would result in VF to poll for hardware reset completion status and then resetting the stack/enet layer, which in turn means reinitializing the ring management/enet layer. Note: we would be adding support of 3. later as a separate patch. This decision should not affect VF reset as its event handling is generic in nature. Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 67 ++++++++++++++++++++-- .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h | 5 ++ 3 files changed, 68 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 56f9e650..37ec1b3 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -119,6 +119,7 @@ enum hnae3_reset_notify_type { enum hnae3_reset_type { HNAE3_VF_RESET, + HNAE3_VF_FULL_RESET, HNAE3_FUNC_RESET, HNAE3_CORE_RESET, HNAE3_GLOBAL_RESET, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index cdb6e7a..0d204e2 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -840,7 +840,9 @@ static void hclgevf_reset_event(struct hnae3_handle *handle) handle->reset_level = HNAE3_VF_RESET; - /* request VF reset here. Code added later */ + /* reset of this VF requested */ + set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state); + hclgevf_reset_task_schedule(hdev); handle->last_reset_time = jiffies; } @@ -889,6 +891,12 @@ static void hclgevf_task_schedule(struct hclgevf_dev *hdev) schedule_work(&hdev->service_task); } +static void hclgevf_deferred_task_schedule(struct hclgevf_dev *hdev) +{ + if (test_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state)) + hclgevf_reset_task_schedule(hdev); +} + static void hclgevf_service_timer(struct timer_list *t) { struct hclgevf_dev *hdev = from_timer(hdev, t, service_timer); @@ -908,10 +916,57 @@ static void hclgevf_reset_service_task(struct work_struct *work) clear_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state); - /* body of the reset service task will constitute of hclge device - * reset state handling. This code shall be added subsequently in - * next patches. - */ + if (test_and_clear_bit(HCLGEVF_RESET_PENDING, + &hdev->reset_state)) { + /* PF has initmated that it is about to reset the hardware. + * We now have to poll & check if harware has actually completed + * the reset sequence. On hardware reset completion, VF needs to + * reset the client and ae device. + */ + hdev->reset_attempts = 0; + + /* code to check/wait for hardware reset completion and the + * further initiating software stack reset would be added here + */ + + } else if (test_and_clear_bit(HCLGEVF_RESET_REQUESTED, + &hdev->reset_state)) { + /* we could be here when either of below happens: + * 1. reset was initiated due to watchdog timeout due to + * a. IMP was earlier reset and our TX got choked down and + * which resulted in watchdog reacting and inducing VF + * reset. This also means our cmdq would be unreliable. + * b. problem in TX due to other lower layer(example link + * layer not functioning properly etc.) + * 2. VF reset might have been initiated due to some config + * change. + * + * NOTE: Theres no clear way to detect above cases than to react + * to the response of PF for this reset request. PF will ack the + * 1b and 2. cases but we will not get any intimation about 1a + * from PF as cmdq would be in unreliable state i.e. mailbox + * communication between PF and VF would be broken. + */ + + /* if we are never geting into pending state it means either: + * 1. PF is not receiving our request which could be due to IMP + * reset + * 2. PF is screwed + * We cannot do much for 2. but to check first we can try reset + * our PCIe + stack and see if it alleviates the problem. + */ + if (hdev->reset_attempts > 3) { + /* prepare for full reset of stack + pcie interface */ + hdev->nic.reset_level = HNAE3_VF_FULL_RESET; + + /* "defer" schedule the reset task again */ + set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); + } else { + hdev->reset_attempts++; + + /* request PF for resetting this VF via mailbox */ + } + } clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); } @@ -943,6 +998,8 @@ static void hclgevf_service_task(struct work_struct *work) */ hclgevf_request_link_info(hdev); + hclgevf_deferred_task_schedule(hdev); + clear_bit(HCLGEVF_STATE_SERVICE_SCHED, &hdev->state); } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h index 8b5fa67..1c9cf87 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h @@ -124,6 +124,11 @@ struct hclgevf_dev { struct hclgevf_rss_cfg rss_cfg; unsigned long state; +#define HCLGEVF_RESET_REQUESTED 0 +#define HCLGEVF_RESET_PENDING 1 + unsigned long reset_state; /* requested, pending */ + u32 reset_attempts; + u32 fw_version; u16 num_tqps; /* num task queue pairs of this PF */ From patchwork Thu Mar 22 14:28:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 132285 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp919557ljb; Thu, 22 Mar 2018 07:30:24 -0700 (PDT) X-Google-Smtp-Source: AG47ELspWDb/kiJflALLTLRmRTmxG+c8mNV1FpidGV6PQKieJGvbQO0YypR99AJjc10uSciITQSB X-Received: by 10.98.104.71 with SMTP id d68mr11310783pfc.116.1521729024763; Thu, 22 Mar 2018 07:30:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521729024; cv=none; d=google.com; s=arc-20160816; b=y01+7uj8F9kO3o3VqtY8teLPhnyp5tuz+bqpbPu/SABjPJuiI6H0fgTaLD3Nnl8cNf wz8fBvZYRdc+WIAo1KYXosHbiIDCUBY8TKfsArDCToQxmbcfBtgnITSVZx8xKjVwBdaK mEvf/6Gk7mmfLH7ShOfsAmnvrdTpKDRG3Y/8nqaU+qZbQfI23yzbegc2KzQppZ0Mym28 OCpc8R/5mwDChYBNfTanD3SmTBfx6EiMdnHQnQeANYDOIukC4ttcDnT3Z3+OBykL0fEe 1VjB3fjawVX6xMUOb967DdBJaBWoTLexmVITnTcn6ne9xWJEb0cuQ5qagRHwbzVirkLh CzaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=FIoyOErJ9OYOCEni8E9FG5YKiFlB276NaL4ZoI47Kyc=; b=d1flu/DmgB8ICPexmisMHbLTiFq8QcEgCbJNzdOM3y14kHDjGQCIY0rppexqxwe5oj mDu27S9K1RCFLs/CiCpQ8o8Dmi2HNJXmLSTAUNVRHPRMhpam39QLPnD/PLWuLR8Fc6T5 n8YGPxvd6C3IGfit3fsyFyNIAvdR6ez0KRyFa8dmoeFsUE5qU4/CJuuzzIhhxbny54AD GWJrITxuw0OPa8JDCopLSp2jl8w0P5RvZsMkN2xdXZh2pq+BGRiTsXqU8ye5nLYRITHP 8WHESOFhjH0hTef32THlaVN7YyZu1GBMlIO9+5ep5hqwTlZMEkiWIKkXmi0AuH0PUTY5 hZ5w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z61-v6si3565224plb.200.2018.03.22.07.30.24; Thu, 22 Mar 2018 07:30:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756048AbeCVOaW (ORCPT + 28 others); Thu, 22 Mar 2018 10:30:22 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:45602 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754649AbeCVOaR (ORCPT ); Thu, 22 Mar 2018 10:30:17 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 835301BC9712D; Thu, 22 Mar 2018 22:30:02 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.202.226.47) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.361.1; Thu, 22 Mar 2018 22:29:52 +0800 From: Salil Mehta To: CC: , , , , , Subject: [PATCH net-next 4/9] net: hns3: Add support to request VF Reset to PF Date: Thu, 22 Mar 2018 14:28:55 +0000 Message-ID: <20180322142900.22860-5-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20180322142900.22860-1-salil.mehta@huawei.com> References: <20180322142900.22860-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.226.47] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org VF driver depends upon PF to eventually reset the hardware. This request is made using the mailbox command. This patch adds the required function to acheive above. Signed-off-by: Salil Mehta --- .../net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index 0d204e2..b648311 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -832,6 +832,20 @@ static void hclgevf_reset_tqp(struct hnae3_handle *handle, u16 queue_id) 2, true, NULL, 0); } +static int hclgevf_do_reset(struct hclgevf_dev *hdev) +{ + int status; + u8 respmsg; + + status = hclgevf_send_mbx_msg(hdev, HCLGE_MBX_RESET, 0, NULL, + 0, false, &respmsg, sizeof(u8)); + if (status) + dev_err(&hdev->pdev->dev, + "VF reset request to PF failed(=%d)\n", status); + + return status; +} + static void hclgevf_reset_event(struct hnae3_handle *handle) { struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); @@ -910,6 +924,7 @@ static void hclgevf_reset_service_task(struct work_struct *work) { struct hclgevf_dev *hdev = container_of(work, struct hclgevf_dev, rst_service_task); + int ret; if (test_and_set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) return; @@ -965,6 +980,10 @@ static void hclgevf_reset_service_task(struct work_struct *work) hdev->reset_attempts++; /* request PF for resetting this VF via mailbox */ + ret = hclgevf_do_reset(hdev); + if (ret) + dev_warn(&hdev->pdev->dev, + "VF rst fail, stack will call\n"); } } From patchwork Thu Mar 22 14:28:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 132284 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp919370ljb; Thu, 22 Mar 2018 07:30:17 -0700 (PDT) X-Google-Smtp-Source: AG47ELuIED4iqzhdM4nYQWWSBbQ+9A8/cAucfsY9Rvilwx68+hEcIafAPW85F/Jfieh80qTVIrvZ X-Received: by 2002:a17:902:7586:: with SMTP id j6-v6mr10889058pll.352.1521729017286; Thu, 22 Mar 2018 07:30:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521729017; cv=none; d=google.com; s=arc-20160816; b=in8NmayFX7Y3kri1C7wIOX4ALEOwjPcAq4UK0RNBwC9M6h+2Xdh5uKWRnMAOc9NT3T gmK1Z7G2g/5hnrAZRueC7wXaureII/L9k/toaCVesTEc4S3EfYnu0YWFpt2zkt9V7xDG GOHyzLYixFhIDO7QoWO+iZ15uqRgIU/+Lynbc45RUk0/5pZjMv1lJvFU6Se40cuhP4Fp 4GwiNJnAdJ/JF/IjtM3kVFHZOec04dghfbMF5P0XF7AJKP8ByFIU2GJRiLXoVd+BxFZM MoX3R7peeKzLSoUStT11M02j8lc/qJK/2cb0Sb9GEL6oJL2h0vuN2cAjomLbPRPvx8Dd WY5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=5flzrOQzWdR3/xd77d4IfVPTr3+er8STmhoOZ3Zy8co=; b=SEEkbohaR6L85xW6PTLrhGuhY+U4IcqxOZd9beR/eCEbmnsyCA3b2f8E7aUyPKQOwh Vi5+xneK+8O0HBskxm4z0NnjgNzL525XtyFUbiTE3yOYUM3D8yB9TdWISpdLg59Fiyx6 OlRm180ciLKmyvm4fhrLS2tDyqDxu7yDvrYXNoDPzqATuAc81mRVQon6QedYLVCjQKTj 9ERpf1fMspnyFf1twqMqQ1sEBMvzqTx3drgkW2oT4pchc8AfSiG1+pd9P+CNEHWV9CpN ompjqmu2sZ3aJxi3Tap5dmi2cpDM76FHKfvssCplCpJaJb3y3lbBNGkaJlAyHHaobhEq rXjw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m3si3652560pfh.80.2018.03.22.07.30.17; Thu, 22 Mar 2018 07:30:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756035AbeCVOaO (ORCPT + 28 others); Thu, 22 Mar 2018 10:30:14 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:45609 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1755890AbeCVOaK (ORCPT ); Thu, 22 Mar 2018 10:30:10 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id A12AB734B9FF5; Thu, 22 Mar 2018 22:30:02 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.202.226.47) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.361.1; Thu, 22 Mar 2018 22:29:55 +0800 From: Salil Mehta To: CC: , , , , , Subject: [PATCH net-next 5/9] net: hns3: Add support to reset the enet/ring mgmt layer Date: Thu, 22 Mar 2018 14:28:56 +0000 Message-ID: <20180322142900.22860-6-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20180322142900.22860-1-salil.mehta@huawei.com> References: <20180322142900.22860-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.226.47] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org After VF driver knows that hardware reset has been performed successfully, it should proceed ahead and reset the enet layer. This primarily consists of bringing down interface, clearing TX/RX rings, disassociating vectors from ring etc. Signed-off-by: Salil Mehta --- .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 103 ++++++++++++++++++++- .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h | 3 + 2 files changed, 102 insertions(+), 4 deletions(-) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index b648311..bd45b11 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -2,6 +2,7 @@ // Copyright (c) 2016-2017 Hisilicon Limited. #include +#include #include "hclgevf_cmd.h" #include "hclgevf_main.h" #include "hclge_mbx.h" @@ -832,6 +833,101 @@ static void hclgevf_reset_tqp(struct hnae3_handle *handle, u16 queue_id) 2, true, NULL, 0); } +static int hclgevf_notify_client(struct hclgevf_dev *hdev, + enum hnae3_reset_notify_type type) +{ + struct hnae3_client *client = hdev->nic_client; + struct hnae3_handle *handle = &hdev->nic; + + if (!client->ops->reset_notify) + return -EOPNOTSUPP; + + return client->ops->reset_notify(handle, type); +} + +static int hclgevf_reset_wait(struct hclgevf_dev *hdev) +{ +#define HCLGEVF_RESET_WAIT_MS 500 +#define HCLGEVF_RESET_WAIT_CNT 20 + u32 val, cnt = 0; + + /* wait to check the hardware reset completion status */ + val = hclgevf_read_dev(&hdev->hw, HCLGEVF_FUN_RST_ING); + while (hnae_get_bit(val, HCLGEVF_FUN_RST_ING_B) && + (cnt < HCLGEVF_RESET_WAIT_CNT)) { + msleep(HCLGEVF_RESET_WAIT_MS); + val = hclgevf_read_dev(&hdev->hw, HCLGEVF_FUN_RST_ING); + cnt++; + } + + /* hardware completion status should be available by this time */ + if (cnt >= HCLGEVF_RESET_WAIT_CNT) { + dev_warn(&hdev->pdev->dev, + "could'nt get reset done status from h/w, timeout!\n"); + return -EBUSY; + } + + /* we will wait a bit more to let reset of the stack to complete. This + * might happen in case reset assertion was made by PF. Yes, this also + * means we might end up waiting bit more even for VF reset. + */ + msleep(5000); + + return 0; +} + +static int hclgevf_reset_stack(struct hclgevf_dev *hdev) +{ + /* uninitialize the nic client */ + hclgevf_notify_client(hdev, HNAE3_UNINIT_CLIENT); + + /* re-initialize the hclge device - add code here */ + + /* bring up the nic client again */ + hclgevf_notify_client(hdev, HNAE3_INIT_CLIENT); + + return 0; +} + +static int hclgevf_reset(struct hclgevf_dev *hdev) +{ + int ret; + + rtnl_lock(); + + /* bring down the nic to stop any ongoing TX/RX */ + hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT); + + /* check if VF could successfully fetch the hardware reset completion + * status from the hardware + */ + ret = hclgevf_reset_wait(hdev); + if (ret) { + /* can't do much in this situation, will disable VF */ + dev_err(&hdev->pdev->dev, + "VF failed(=%d) to fetch H/W reset completion status\n", + ret); + + dev_warn(&hdev->pdev->dev, "VF reset failed, disabling VF!\n"); + hclgevf_notify_client(hdev, HNAE3_UNINIT_CLIENT); + + rtnl_unlock(); + return ret; + } + + /* now, re-initialize the nic client and ae device*/ + ret = hclgevf_reset_stack(hdev); + if (ret) + dev_err(&hdev->pdev->dev, "failed to reset VF stack\n"); + + /* bring up the nic to enable TX/RX again */ + hclgevf_notify_client(hdev, HNAE3_UP_CLIENT); + + rtnl_unlock(); + + return ret; +} + static int hclgevf_do_reset(struct hclgevf_dev *hdev) { int status; @@ -940,10 +1036,9 @@ static void hclgevf_reset_service_task(struct work_struct *work) */ hdev->reset_attempts = 0; - /* code to check/wait for hardware reset completion and the - * further initiating software stack reset would be added here - */ - + ret = hclgevf_reset(hdev); + if (ret) + dev_err(&hdev->pdev->dev, "VF stack reset failed.\n"); } else if (test_and_clear_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state)) { /* we could be here when either of below happens: diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h index 1c9cf87..afdb15d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h @@ -34,6 +34,9 @@ #define HCLGEVF_VECTOR0_RX_CMDQ_INT_B 1 #define HCLGEVF_TQP_RESET_TRY_TIMES 10 +/* Reset related Registers */ +#define HCLGEVF_FUN_RST_ING 0x20C00 +#define HCLGEVF_FUN_RST_ING_B 0 #define HCLGEVF_RSS_IND_TBL_SIZE 512 #define HCLGEVF_RSS_SET_BITMAP_MSK 0xffff From patchwork Thu Mar 22 14:28:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 132286 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp919693ljb; Thu, 22 Mar 2018 07:30:29 -0700 (PDT) X-Google-Smtp-Source: AG47ELsjjvIh09f7yH9VebhcN/3NygEH6s+xFvGcBc16+5YZz/tTMDqVImWbRT/78dTZO5I58/Lc X-Received: by 2002:a17:902:529:: with SMTP id 38-v6mr25615830plf.64.1521729029795; Thu, 22 Mar 2018 07:30:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521729029; cv=none; d=google.com; s=arc-20160816; b=RtvgrTvjJuL8E796AqR1eqQRY+ahMp7OXXIT1rXt/UyyWnE+DxwxQQ3/r74xjkmtDR 1JjkErmg2uXj7LQ0XYpRNAiuSjdg1QB8RAas5z46PYTymFHNpRocFJIKCvE5pW78SuM3 T7JMu+rh2vYrvYb4Z8T8axL0cxV0jeKJj8Ak0Hn187ECrKJ4gYLfFzqjIH6kVIRdHZXf uXOC8O5mim98HKItM8KHi2rj97gbljrvl6N/eMTHcxDr+5yLY57aaGO/QDvgra7oo9b8 8yE/MzOowbYYdHJVASz3hno//Ox27/UiqIESXKZ/oE+m+Su6F4UAPlORzkCoIKgvesJu cy0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=aFX6yljQgthFosMDd19x+ag3oNXTSy0kY58EI0g2aQ0=; b=lUZj6nAuSOzZrq4w9OzYAPwlyj2ter1v5V/NrNr06HqBRZV5PbnptX8zEFqzMC8BQH hkabX9tVYkQxp96Tt4N09e08SUplzuudKaiGz0uOVQFJNSYaHla4avGa1ZhFTu4Zptzp 3fprifRcB3k2QaJTw1MFLTykwa8AHfOB28IWZHX5uRdWt2fsGhmIs0vNpaKtR0HDQdi+ o4n1E9rj3ljX1448n3h2g9x/N73q9sQfySJZ8h0sqS2fJRUUGwoeNwQS4fcAv9Hl//QL c1B9RWaVIz8sO22SdAQUyNh8CiyPGG6LqaWKMbu6MGmb5qU2YbWPeGizdrT+hJznJwtA cXHg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z61-v6si3565224plb.200.2018.03.22.07.30.29; Thu, 22 Mar 2018 07:30:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756066AbeCVOa1 (ORCPT + 28 others); Thu, 22 Mar 2018 10:30:27 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:6261 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753729AbeCVOaX (ORCPT ); Thu, 22 Mar 2018 10:30:23 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 45D17F9DA1AF9; Thu, 22 Mar 2018 22:30:07 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.202.226.47) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.361.1; Thu, 22 Mar 2018 22:30:02 +0800 From: Salil Mehta To: CC: , , , , , Subject: [PATCH net-next 8/9] net: hns3: Add *Asserting Reset* mailbox message & handling in VF Date: Thu, 22 Mar 2018 14:28:59 +0000 Message-ID: <20180322142900.22860-9-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20180322142900.22860-1-salil.mehta@huawei.com> References: <20180322142900.22860-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.226.47] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reset Asserting message is forwarded by PF to inform VF about the hardware reset which is about to happen. This might be due to the earlier VF reset request received by the PF or because PF for any reason decides to undergo reset. This message results in VF to go in pending state in which it polls the hardware to complete the reset and then further resets/tears its own stack. Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h | 1 + drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h b/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h index f3e90c2..519e2bd 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h +++ b/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h @@ -11,6 +11,7 @@ enum HCLGE_MBX_OPCODE { HCLGE_MBX_RESET = 0x01, /* (VF -> PF) assert reset */ + HCLGE_MBX_ASSERTING_RESET, /* (PF -> VF) PF is asserting reset*/ HCLGE_MBX_SET_UNICAST, /* (VF -> PF) set UC addr */ HCLGE_MBX_SET_MULTICAST, /* (VF -> PF) set MC addr */ HCLGE_MBX_SET_VLAN, /* (VF -> PF) set VLAN */ diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c index 7687911..a286184 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c @@ -170,6 +170,7 @@ void hclgevf_mbx_handler(struct hclgevf_dev *hdev) } break; case HCLGE_MBX_LINK_STAT_CHANGE: + case HCLGE_MBX_ASSERTING_RESET: /* set this mbx event as pending. This is required as we * might loose interrupt event when mbx task is busy * handling. This shall be cleared when mbx task just @@ -242,6 +243,17 @@ void hclgevf_mbx_async_handler(struct hclgevf_dev *hdev) hclgevf_update_speed_duplex(hdev, speed, duplex); break; + case HCLGE_MBX_ASSERTING_RESET: + /* PF has asserted reset hence VF should go in pending + * state and poll for the hardware reset status till it + * has been completely reset. After this stack should + * eventually be re-initialized. + */ + hdev->nic.reset_level = HNAE3_VF_RESET; + set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); + hclgevf_reset_task_schedule(hdev); + + break; default: dev_err(&hdev->pdev->dev, "fetched unsupported(%d) message from arq\n", From patchwork Thu Mar 22 14:29:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 132288 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp920190ljb; Thu, 22 Mar 2018 07:30:52 -0700 (PDT) X-Google-Smtp-Source: AG47ELtMd0lm6IzrHDT/AJ7r/USIfIRyDQxW489cHZeYPqEv0RU+3svastpE3LCZFS0qmWOOlwUY X-Received: by 10.98.46.197 with SMTP id u188mr20858204pfu.32.1521729052156; Thu, 22 Mar 2018 07:30:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521729052; cv=none; d=google.com; s=arc-20160816; b=e90fr5uCmuy9QuqGEz4p+emy6xTWCwRDXi8HWNbwgFeo6bRQesNyl+wVn8iLr7wtKR MasgtbgSiZAtHfr8mTkKNqku6VHTwnWi3uX7uweqi5nm3QkwroUEL5qdLbuOyBfcehZO ACnw8+p4v9Grb8PCHhMUaD14K6l8zHFdr2b0CORso6BzQyvXlOg4pBSgGKHUIltdS4ed R3bKJHIUdq/VvoGc14bJO/DEfi98bdAH2QVBqF9zGCmYCSQNLFW+4F932sqFC+Oz96Qo m4PNujrihWC2VDVgwhF4IooDL/DepL/l8N6ixFAol4fvlzJUqkLUEQ3skoj8wp3MIhdl aPCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=sIzIIA03gk5Ym2HZOv6T3K73x7a7oLQg6S6M8gWzICw=; b=Fc9muXiqYWB5LJ0y9Aa8NpldFu8j+XvchnbAMFvguRIr79vns/XcNza8N6TgLA+4eA cMPZgsxEcQMUkAwuCOpiRHW/YsWq6izgbMLHw1D9aqIrmlLBEU1UytPTFQDNab2Lt5oI fCb+VCi//AsbuvvkzG8XF/Bosxh971zZDF0Ju1Xqr2/Mk/pXaETF4nW8iH/DAGc/BWEs n+V1463N+/G0RmOn36jr7sEGc+Wnl6c7VjtXPyWxDDl7svF6ODq8P38uZJ5TiDoiQzPS rer3V0PsZB5go8TdcFfvzvAKZ/uG1zx6A2cFEnGKaQf/DE6qAAhl9TmryMiaLUXuy+z8 cwow== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m10si13580pge.245.2018.03.22.07.30.50; Thu, 22 Mar 2018 07:30:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756086AbeCVOad (ORCPT + 28 others); Thu, 22 Mar 2018 10:30:33 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:6677 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751742AbeCVOaa (ORCPT ); Thu, 22 Mar 2018 10:30:30 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 7C9BBC3898BEA; Thu, 22 Mar 2018 22:30:14 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.202.226.47) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.361.1; Thu, 22 Mar 2018 22:30:04 +0800 From: Salil Mehta To: CC: , , , , , Subject: [PATCH net-next 9/9] net: hns3: Changes required in PF mailbox to support VF reset Date: Thu, 22 Mar 2018 14:29:00 +0000 Message-ID: <20180322142900.22860-10-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20180322142900.22860-1-salil.mehta@huawei.com> References: <20180322142900.22860-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.226.47] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PF needs to assert the VF reset when it receives the request to reset from VF. After receiving request PF ackknowledges the request by replying back MBX_ASSERTING_RESET message to VF. VF then goes to pending state and wait for hardware to complete the reset. This patch contains code to handle the received VF message, inform the VF of assertion and reset the VF using cmdq interface. Signed-off-by: Salil Mehta --- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 +- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 1 + .../net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 42 ++++++++++++++++++++++ 3 files changed, 44 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index a3e00da..bede411 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -2749,7 +2749,7 @@ static int hclge_reset_wait(struct hclge_dev *hdev) return 0; } -static int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id) +int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id) { struct hclge_desc desc; struct hclge_reset_cmd *req = (struct hclge_reset_cmd *)desc.data; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index 8c14d10..0f4157e 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -657,4 +657,5 @@ void hclge_mbx_handler(struct hclge_dev *hdev); void hclge_reset_tqp(struct hnae3_handle *handle, u16 queue_id); void hclge_reset_vf_queue(struct hclge_vport *vport, u16 queue_id); int hclge_cfg_flowctrl(struct hclge_dev *hdev); +int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id); #endif diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c index 949da0c..3901333 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c @@ -79,6 +79,18 @@ static int hclge_send_mbx_msg(struct hclge_vport *vport, u8 *msg, u16 msg_len, return status; } +int hclge_inform_reset_assert_to_vf(struct hclge_vport *vport) +{ + u8 msg_data[2]; + u8 dest_vfid; + + dest_vfid = (u8)vport->vport_id; + + /* send this requested info to VF */ + return hclge_send_mbx_msg(vport, msg_data, sizeof(u8), + HCLGE_MBX_ASSERTING_RESET, dest_vfid); +} + static void hclge_free_vector_ring_chain(struct hnae3_ring_chain_node *head) { struct hnae3_ring_chain_node *chain_tmp, *chain; @@ -339,6 +351,33 @@ static void hclge_mbx_reset_vf_queue(struct hclge_vport *vport, hclge_gen_resp_to_vf(vport, mbx_req, 0, NULL, 0); } +static void hclge_reset_vf(struct hclge_vport *vport, + struct hclge_mbx_vf_to_pf_cmd *mbx_req) +{ + struct hclge_dev *hdev = vport->back; + int ret; + + dev_warn(&hdev->pdev->dev, "PF received VF reset request from VF %d!", + mbx_req->mbx_src_vfid); + + /* Acknowledge VF that PF is now about to assert the reset for the VF. + * On receiving this message VF will get into pending state and will + * start polling for the hardware reset completion status. + */ + ret = hclge_inform_reset_assert_to_vf(vport); + if (ret) { + dev_err(&hdev->pdev->dev, + "PF fail(%d) to inform VF(%d)of reset, reset failed!\n", + ret, vport->vport_id); + return; + } + + dev_warn(&hdev->pdev->dev, "PF is now resetting VF %d.\n", + mbx_req->mbx_src_vfid); + /* reset this virtual function */ + hclge_func_reset_cmd(hdev, mbx_req->mbx_src_vfid); +} + void hclge_mbx_handler(struct hclge_dev *hdev) { struct hclge_cmq_ring *crq = &hdev->hw.cmq.crq; @@ -416,6 +455,9 @@ void hclge_mbx_handler(struct hclge_dev *hdev) case HCLGE_MBX_QUEUE_RESET: hclge_mbx_reset_vf_queue(vport, req); break; + case HCLGE_MBX_RESET: + hclge_reset_vf(vport, req); + break; default: dev_err(&hdev->pdev->dev, "un-supported mailbox message, code = %d\n",