From patchwork Wed Apr 5 09:06:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 96803 Delivered-To: patch@linaro.org Received: by 10.182.246.10 with SMTP id xs10csp177610obc; Wed, 5 Apr 2017 02:59:33 -0700 (PDT) X-Received: by 10.99.108.74 with SMTP id h71mr29186629pgc.18.1491386373492; Wed, 05 Apr 2017 02:59:33 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q2si212081plh.271.2017.04.05.02.59.33; Wed, 05 Apr 2017 02:59:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932974AbdDEJHR (ORCPT + 14 others); Wed, 5 Apr 2017 05:07:17 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:32967 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755050AbdDEJHD (ORCPT ); Wed, 5 Apr 2017 05:07:03 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id A1E4820806; Wed, 5 Apr 2017 11:07:00 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id A50E020432; Wed, 5 Apr 2017 11:06:59 +0200 (CEST) From: Quentin Schulz To: dmitry.torokhov@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, lee.jones@linaro.org, linux@armlinux.org.uk, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net Cc: Quentin Schulz , thomas.petazzoni@free-electrons.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com, icenowy@aosc.xyz Subject: [PATCH v4 1/8] dt-bindings: mfd: add A33 GPADC binding Date: Wed, 5 Apr 2017 11:06:27 +0200 Message-Id: <20170405090634.4649-2-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170405090634.4649-1-quentin.schulz@free-electrons.com> References: <20170405090634.4649-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds documentation for the A33 GPADC binding. Signed-off-by: Quentin Schulz Acked-by: Rob Herring --- v4: - correct patch title, v3: - fixed missing allwinner in front of compatible, - updated compatible to allwinner,sun8i-a33-ths to better reflect the datasheet's name, - updated example's DT node name and label to ths, added in v2 .../devicetree/bindings/mfd/sun4i-gpadc.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt -- 2.9.3 diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt new file mode 100644 index 0000000..badff36 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt @@ -0,0 +1,59 @@ +Allwinner SoCs' GPADC Device Tree bindings +------------------------------------------ +The Allwinner SoCs all have an ADC that can also act as a thermal sensor +and sometimes as a touchscreen controller. + +Required properties: + - compatible: "allwinner,sun8i-a33-ths", + - reg: mmio address range of the chip, + - #thermal-sensor-cells: shall be 0, + - #io-channel-cells: shall be 0, + +Example: + ths: ths@01c25000 { + compatible = "allwinner,sun8i-a33-ths"; + reg = <0x01c25000 0x100>; + #thermal-sensor-cells = <0>; + #io-channel-cells = <0>; + }; + +sun4i, sun5i and sun6i SoCs are also supported via the older binding: + +sun4i resistive touchscreen controller +-------------------------------------- + +Required properties: + - compatible: "allwinner,sun4i-a10-ts", "allwinner,sun5i-a13-ts" or + "allwinner,sun6i-a31-ts" + - reg: mmio address range of the chip + - interrupts: interrupt to which the chip is connected + - #thermal-sensor-cells: shall be 0 + +Optional properties: + - allwinner,ts-attached : boolean indicating that an actual touchscreen + is attached to the controller + - allwinner,tp-sensitive-adjust : integer (4 bits) + adjust sensitivity of pen down detection + between 0 (least sensitive) and 15 + (defaults to 15) + - allwinner,filter-type : integer (2 bits) + select median and averaging filter + samples used for median / averaging filter + 0: 4/2 + 1: 5/3 + 2: 8/4 + 3: 16/8 + (defaults to 1) + +Example: + + rtp: rtp@01c25000 { + compatible = "allwinner,sun4i-a10-ts"; + reg = <0x01c25000 0x100>; + interrupts = <29>; + allwinner,ts-attached; + #thermal-sensor-cells = <0>; + /* sensitive/noisy touch panel */ + allwinner,tp-sensitive-adjust = <0>; + allwinner,filter-type = <3>; + }; From patchwork Wed Apr 5 09:06:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 96837 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp197778qgd; Wed, 5 Apr 2017 03:38:51 -0700 (PDT) X-Received: by 10.98.17.20 with SMTP id z20mr29263195pfi.67.1491388731156; Wed, 05 Apr 2017 03:38:51 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h3si20319821pfe.60.2017.04.05.03.38.50; Wed, 05 Apr 2017 03:38:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932955AbdDEJHR (ORCPT + 14 others); Wed, 5 Apr 2017 05:07:17 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:32982 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932568AbdDEJHE (ORCPT ); Wed, 5 Apr 2017 05:07:04 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id B0D9C20823; Wed, 5 Apr 2017 11:07:01 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id A9B5A20432; Wed, 5 Apr 2017 11:07:00 +0200 (CEST) From: Quentin Schulz To: dmitry.torokhov@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, lee.jones@linaro.org, linux@armlinux.org.uk, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net Cc: Quentin Schulz , thomas.petazzoni@free-electrons.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com, icenowy@aosc.xyz Subject: [PATCH v4 2/8] dt-bindings: input: touschcreen: remove sun4i documentation Date: Wed, 5 Apr 2017 11:06:28 +0200 Message-Id: <20170405090634.4649-3-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170405090634.4649-1-quentin.schulz@free-electrons.com> References: <20170405090634.4649-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch removes the sun4i touchscreen controller binding documentation since it has been merged with the sun4i GPADC binding documentation. Signed-off-by: Quentin Schulz Acked-by: Rob Herring Acked-by: Dmitry Torokhov --- v4: - correct patch title, .../bindings/input/touchscreen/sun4i.txt | 38 ---------------------- 1 file changed, 38 deletions(-) delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/sun4i.txt -- 2.9.3 diff --git a/Documentation/devicetree/bindings/input/touchscreen/sun4i.txt b/Documentation/devicetree/bindings/input/touchscreen/sun4i.txt deleted file mode 100644 index 89abecd..0000000 --- a/Documentation/devicetree/bindings/input/touchscreen/sun4i.txt +++ /dev/null @@ -1,38 +0,0 @@ -sun4i resistive touchscreen controller --------------------------------------- - -Required properties: - - compatible: "allwinner,sun4i-a10-ts", "allwinner,sun5i-a13-ts" or - "allwinner,sun6i-a31-ts" - - reg: mmio address range of the chip - - interrupts: interrupt to which the chip is connected - - #thermal-sensor-cells: shall be 0 - -Optional properties: - - allwinner,ts-attached : boolean indicating that an actual touchscreen - is attached to the controller - - allwinner,tp-sensitive-adjust : integer (4 bits) - adjust sensitivity of pen down detection - between 0 (least sensitive) and 15 - (defaults to 15) - - allwinner,filter-type : integer (2 bits) - select median and averaging filter - samples used for median / averaging filter - 0: 4/2 - 1: 5/3 - 2: 8/4 - 3: 16/8 - (defaults to 1) - -Example: - - rtp: rtp@01c25000 { - compatible = "allwinner,sun4i-a10-ts"; - reg = <0x01c25000 0x100>; - interrupts = <29>; - allwinner,ts-attached; - #thermal-sensor-cells = <0>; - /* sensitive/noisy touch panel */ - allwinner,tp-sensitive-adjust = <0>; - allwinner,filter-type = <3>; - }; From patchwork Wed Apr 5 09:06:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 96840 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp203356qgd; Wed, 5 Apr 2017 03:57:02 -0700 (PDT) X-Received: by 10.84.198.164 with SMTP id p33mr36109639pld.127.1491389822666; Wed, 05 Apr 2017 03:57:02 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y75si20310731pfg.155.2017.04.05.03.57.02; Wed, 05 Apr 2017 03:57:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932939AbdDEJHQ (ORCPT + 14 others); Wed, 5 Apr 2017 05:07:16 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:33013 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932583AbdDEJHF (ORCPT ); Wed, 5 Apr 2017 05:07:05 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id C456C20829; Wed, 5 Apr 2017 11:07:02 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id C21DF20432; Wed, 5 Apr 2017 11:07:01 +0200 (CEST) From: Quentin Schulz To: dmitry.torokhov@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, lee.jones@linaro.org, linux@armlinux.org.uk, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net Cc: Quentin Schulz , thomas.petazzoni@free-electrons.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com, icenowy@aosc.xyz Subject: [PATCH v4 3/8] iio: adc: sun4i-gpadc-iio: move code used in MFD probing to new function Date: Wed, 5 Apr 2017 11:06:29 +0200 Message-Id: <20170405090634.4649-4-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170405090634.4649-1-quentin.schulz@free-electrons.com> References: <20170405090634.4649-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This moves code used in MFD probing to a new sun4i_gpadc_probe_mfd function. This driver was initially written for A10, A13 and A31 SoCs which already had a DT binding for this IP, thus we needed to use an MFD to probe the different drivers without changing the DT binding of these SoCs. For SoCs that will require to create a DT binding for this IP, we can avoid using an MFD, thus we need two separate functions: one for probing via MFD and one for probing without MFD. This split the code specific to MFD probing in a function separated from the driver probe function. Signed-off-by: Quentin Schulz Acked-by: Jonathan Cameron --- v3: - updated commit log, added in v2 drivers/iio/adc/sun4i-gpadc-iio.c | 78 ++++++++++++++++++++++----------------- 1 file changed, 45 insertions(+), 33 deletions(-) -- 2.9.3 diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c index a8e134f..7cb997a 100644 --- a/drivers/iio/adc/sun4i-gpadc-iio.c +++ b/drivers/iio/adc/sun4i-gpadc-iio.c @@ -454,31 +454,16 @@ static int sun4i_irq_init(struct platform_device *pdev, const char *name, return 0; } -static int sun4i_gpadc_probe(struct platform_device *pdev) +static int sun4i_gpadc_probe_mfd(struct platform_device *pdev, + struct iio_dev *indio_dev) { - struct sun4i_gpadc_iio *info; - struct iio_dev *indio_dev; + struct sun4i_gpadc_iio *info = iio_priv(indio_dev); + struct sun4i_gpadc_dev *sun4i_gpadc_dev = + dev_get_drvdata(pdev->dev.parent); int ret; - struct sun4i_gpadc_dev *sun4i_gpadc_dev; - - sun4i_gpadc_dev = dev_get_drvdata(pdev->dev.parent); - - indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); - if (!indio_dev) - return -ENOMEM; - info = iio_priv(indio_dev); - platform_set_drvdata(pdev, indio_dev); - - mutex_init(&info->mutex); info->regmap = sun4i_gpadc_dev->regmap; - info->indio_dev = indio_dev; - init_completion(&info->completion); - indio_dev->name = dev_name(&pdev->dev); - indio_dev->dev.parent = &pdev->dev; - indio_dev->dev.of_node = pdev->dev.of_node; - indio_dev->info = &sun4i_gpadc_iio_info; - indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels); indio_dev->channels = sun4i_gpadc_channels; @@ -519,8 +504,7 @@ static int sun4i_gpadc_probe(struct platform_device *pdev) dev_err(&pdev->dev, "could not register thermal sensor: %ld\n", PTR_ERR(tzd)); - ret = PTR_ERR(tzd); - goto err; + return PTR_ERR(tzd); } } else { indio_dev->num_channels = @@ -528,36 +512,65 @@ static int sun4i_gpadc_probe(struct platform_device *pdev) indio_dev->channels = sun4i_gpadc_channels_no_temp; } - pm_runtime_set_autosuspend_delay(&pdev->dev, - SUN4I_GPADC_AUTOSUSPEND_DELAY); - pm_runtime_use_autosuspend(&pdev->dev); - pm_runtime_set_suspended(&pdev->dev); - pm_runtime_enable(&pdev->dev); - if (IS_ENABLED(CONFIG_THERMAL_OF)) { ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING", sun4i_gpadc_temp_data_irq_handler, "temp_data", &info->temp_data_irq, &info->ignore_temp_data_irq); if (ret < 0) - goto err; + return ret; } ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING", sun4i_gpadc_fifo_data_irq_handler, "fifo_data", &info->fifo_data_irq, &info->ignore_fifo_data_irq); if (ret < 0) - goto err; + return ret; if (IS_ENABLED(CONFIG_THERMAL_OF)) { ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps); if (ret < 0) { dev_err(&pdev->dev, "failed to register iio map array\n"); - goto err; + return ret; } } + return 0; +} + +static int sun4i_gpadc_probe(struct platform_device *pdev) +{ + struct sun4i_gpadc_iio *info; + struct iio_dev *indio_dev; + int ret; + + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); + if (!indio_dev) + return -ENOMEM; + + info = iio_priv(indio_dev); + platform_set_drvdata(pdev, indio_dev); + + mutex_init(&info->mutex); + info->indio_dev = indio_dev; + init_completion(&info->completion); + indio_dev->name = dev_name(&pdev->dev); + indio_dev->dev.parent = &pdev->dev; + indio_dev->dev.of_node = pdev->dev.of_node; + indio_dev->info = &sun4i_gpadc_iio_info; + indio_dev->modes = INDIO_DIRECT_MODE; + + ret = sun4i_gpadc_probe_mfd(pdev, indio_dev); + if (ret) + return ret; + + pm_runtime_set_autosuspend_delay(&pdev->dev, + SUN4I_GPADC_AUTOSUSPEND_DELAY); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_enable(&pdev->dev); + ret = devm_iio_device_register(&pdev->dev, indio_dev); if (ret < 0) { dev_err(&pdev->dev, "could not register the device\n"); @@ -570,7 +583,6 @@ static int sun4i_gpadc_probe(struct platform_device *pdev) if (IS_ENABLED(CONFIG_THERMAL_OF)) iio_map_array_unregister(indio_dev); -err: pm_runtime_put(&pdev->dev); pm_runtime_disable(&pdev->dev); From patchwork Wed Apr 5 09:06:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 96841 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp208694qgd; Wed, 5 Apr 2017 04:10:34 -0700 (PDT) X-Received: by 10.84.238.132 with SMTP id v4mr35685687plk.101.1491390633931; Wed, 05 Apr 2017 04:10:33 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j128si16707908pgc.262.2017.04.05.04.10.33; Wed, 05 Apr 2017 04:10:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932921AbdDEJHP (ORCPT + 14 others); Wed, 5 Apr 2017 05:07:15 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:33041 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932597AbdDEJHG (ORCPT ); Wed, 5 Apr 2017 05:07:06 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id CD99F2082E; Wed, 5 Apr 2017 11:07:03 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id C87B82082A; Wed, 5 Apr 2017 11:07:02 +0200 (CEST) From: Quentin Schulz To: dmitry.torokhov@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, lee.jones@linaro.org, linux@armlinux.org.uk, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net Cc: Quentin Schulz , thomas.petazzoni@free-electrons.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com, icenowy@aosc.xyz Subject: [PATCH v4 4/8] iio: adc: sun4i-gpadc-iio: add support for A33 thermal sensor Date: Wed, 5 Apr 2017 11:06:30 +0200 Message-Id: <20170405090634.4649-5-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170405090634.4649-1-quentin.schulz@free-electrons.com> References: <20170405090634.4649-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds support for the Allwinner A33 thermal sensor. Unlike the A10, A13 and A31, the Allwinner A33 only has one channel which is dedicated to the thermal sensor. Moreover, its thermal sensor does not generate interruptions, thus we only need to directly read the register storing the temperature value. The MFD used by the A10, A13 and A31, was created to avoid breaking the DT binding, but since the nodes for the ADC weren't there for the A33, it is not needed. Though the A33 does not have an internal ADC, it has a thermal sensor which shares the same registers with GPADC of the already supported SoCs and almost the same bits, for the same purpose (thermal sensor). The thermal sensor behaves exactly the same (except the presence of interrupts or not) on the different SoCs. Signed-off-by: Quentin Schulz Acked-by: Lee Jones Acked-by: Jonathan Cameron --- v3: - switched compatible from allwinner,sun8i-a33-gpadc-iio to allwinner,sun8i-a33-ths to better reflect the datasheet's name, - fixed the non-working if (!IS_ENABLED(THERMAL_OF)) by prefixing it with CONFIG, v2: - removed added comments in Kconfig, - simplified Kconfig depends on condition, - removed THERMAL_OF requirement for sun8i, - renamed sun8i_gpadc_channels to sun8i_a33_gpadc_channels, - renamed use_dt boolean in no_irq as it reflects better why we need it, - removed spurious/unneeded modifications done in v1, drivers/iio/adc/Kconfig | 2 +- drivers/iio/adc/sun4i-gpadc-iio.c | 100 ++++++++++++++++++++++++++++++++++++-- include/linux/mfd/sun4i-gpadc.h | 4 ++ 3 files changed, 102 insertions(+), 4 deletions(-) -- 2.9.3 diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index d0af51d..d9b6101 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -561,7 +561,7 @@ config STX104 config SUN4I_GPADC tristate "Support for the Allwinner SoCs GPADC" depends on IIO - depends on MFD_SUN4I_GPADC + depends on MFD_SUN4I_GPADC || MACH_SUN8I help Say yes here to build support for Allwinner (A10, A13 and A31) SoCs GPADC. This ADC provides 4 channels which can be used as an ADC or as diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c index 7cb997a..74705aa 100644 --- a/drivers/iio/adc/sun4i-gpadc-iio.c +++ b/drivers/iio/adc/sun4i-gpadc-iio.c @@ -85,6 +85,12 @@ static const struct gpadc_data sun6i_gpadc_data = { .adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK, }; +static const struct gpadc_data sun8i_a33_gpadc_data = { + .temp_offset = -1662, + .temp_scale = 162, + .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN, +}; + struct sun4i_gpadc_iio { struct iio_dev *indio_dev; struct completion completion; @@ -96,6 +102,7 @@ struct sun4i_gpadc_iio { unsigned int temp_data_irq; atomic_t ignore_temp_data_irq; const struct gpadc_data *data; + bool no_irq; /* prevents concurrent reads of temperature and ADC */ struct mutex mutex; }; @@ -138,6 +145,23 @@ static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = { SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"), }; +static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = { + { + .type = IIO_TEMP, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_OFFSET), + .datasheet_name = "temp_adc", + }, +}; + +static const struct regmap_config sun4i_gpadc_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .fast_io = true, +}; + static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel, unsigned int irq) { @@ -247,6 +271,17 @@ static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val) { struct sun4i_gpadc_iio *info = iio_priv(indio_dev); + if (info->no_irq) { + pm_runtime_get_sync(indio_dev->dev.parent); + + regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val); + + pm_runtime_mark_last_busy(indio_dev->dev.parent); + pm_runtime_put_autosuspend(indio_dev->dev.parent); + + return 0; + } + return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq); } @@ -454,6 +489,58 @@ static int sun4i_irq_init(struct platform_device *pdev, const char *name, return 0; } +static const struct of_device_id sun4i_gpadc_of_id[] = { + { + .compatible = "allwinner,sun8i-a33-ths", + .data = &sun8i_a33_gpadc_data, + }, + { /* sentinel */ } +}; + +static int sun4i_gpadc_probe_dt(struct platform_device *pdev, + struct iio_dev *indio_dev) +{ + struct sun4i_gpadc_iio *info = iio_priv(indio_dev); + const struct of_device_id *of_dev; + struct thermal_zone_device *tzd; + struct resource *mem; + void __iomem *base; + int ret; + + of_dev = of_match_device(sun4i_gpadc_of_id, &pdev->dev); + if (!of_dev) + return -ENODEV; + + info->no_irq = true; + info->data = (struct gpadc_data *)of_dev->data; + indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels); + indio_dev->channels = sun8i_a33_gpadc_channels; + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, mem); + if (IS_ERR(base)) + return PTR_ERR(base); + + info->regmap = devm_regmap_init_mmio(&pdev->dev, base, + &sun4i_gpadc_regmap_config); + if (IS_ERR(info->regmap)) { + ret = PTR_ERR(info->regmap); + dev_err(&pdev->dev, "failed to init regmap: %d\n", ret); + return ret; + } + + if (!IS_ENABLED(CONFIG_THERMAL_OF)) + return 0; + + tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, info, + &sun4i_ts_tz_ops); + if (IS_ERR(tzd)) + dev_err(&pdev->dev, "could not register thermal sensor: %ld\n", + PTR_ERR(tzd)); + + return PTR_ERR_OR_ZERO(tzd); +} + static int sun4i_gpadc_probe_mfd(struct platform_device *pdev, struct iio_dev *indio_dev) { @@ -462,6 +549,7 @@ static int sun4i_gpadc_probe_mfd(struct platform_device *pdev, dev_get_drvdata(pdev->dev.parent); int ret; + info->no_irq = false; info->regmap = sun4i_gpadc_dev->regmap; indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels); @@ -561,7 +649,11 @@ static int sun4i_gpadc_probe(struct platform_device *pdev) indio_dev->info = &sun4i_gpadc_iio_info; indio_dev->modes = INDIO_DIRECT_MODE; - ret = sun4i_gpadc_probe_mfd(pdev, indio_dev); + if (pdev->dev.of_node) + ret = sun4i_gpadc_probe_dt(pdev, indio_dev); + else + ret = sun4i_gpadc_probe_mfd(pdev, indio_dev); + if (ret) return ret; @@ -580,7 +672,7 @@ static int sun4i_gpadc_probe(struct platform_device *pdev) return 0; err_map: - if (IS_ENABLED(CONFIG_THERMAL_OF)) + if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF)) iio_map_array_unregister(indio_dev); pm_runtime_put(&pdev->dev); @@ -592,10 +684,11 @@ static int sun4i_gpadc_probe(struct platform_device *pdev) static int sun4i_gpadc_remove(struct platform_device *pdev) { struct iio_dev *indio_dev = platform_get_drvdata(pdev); + struct sun4i_gpadc_iio *info = iio_priv(indio_dev); pm_runtime_put(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (IS_ENABLED(CONFIG_THERMAL_OF)) + if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF)) iio_map_array_unregister(indio_dev); return 0; @@ -611,6 +704,7 @@ static const struct platform_device_id sun4i_gpadc_id[] = { static struct platform_driver sun4i_gpadc_driver = { .driver = { .name = "sun4i-gpadc-iio", + .of_match_table = sun4i_gpadc_of_id, .pm = &sun4i_gpadc_pm_ops, }, .id_table = sun4i_gpadc_id, diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h index 509e736..139872c 100644 --- a/include/linux/mfd/sun4i-gpadc.h +++ b/include/linux/mfd/sun4i-gpadc.h @@ -38,6 +38,10 @@ #define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x)) #define SUN6I_GPADC_CTRL1_ADC_CHAN_MASK GENMASK(3, 0) +/* TP_CTRL1 bits for sun8i SoCs */ +#define SUN8I_GPADC_CTRL1_CHOP_TEMP_EN BIT(8) +#define SUN8I_GPADC_CTRL1_GPADC_CALI_EN BIT(7) + #define SUN4I_GPADC_CTRL2 0x08 #define SUN4I_GPADC_CTRL2_TP_SENSITIVE_ADJUST(x) ((GENMASK(3, 0) & (x)) << 28) From patchwork Wed Apr 5 09:06:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 96842 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp223368qgd; Wed, 5 Apr 2017 04:52:58 -0700 (PDT) X-Received: by 10.99.121.78 with SMTP id u75mr29131132pgc.202.1491393177931; Wed, 05 Apr 2017 04:52:57 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 80si20445922pgd.10.2017.04.05.04.52.57; Wed, 05 Apr 2017 04:52:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932895AbdDEJHN (ORCPT + 14 others); Wed, 5 Apr 2017 05:07:13 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:33066 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932653AbdDEJHH (ORCPT ); Wed, 5 Apr 2017 05:07:07 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id B13892082A; Wed, 5 Apr 2017 11:07:04 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id C299620821; Wed, 5 Apr 2017 11:07:03 +0200 (CEST) From: Quentin Schulz To: dmitry.torokhov@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, lee.jones@linaro.org, linux@armlinux.org.uk, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net Cc: Quentin Schulz , thomas.petazzoni@free-electrons.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com, icenowy@aosc.xyz Subject: [PATCH v4 5/8] ARM: sun8i: a33: add thermal sensor Date: Wed, 5 Apr 2017 11:06:31 +0200 Message-Id: <20170405090634.4649-6-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170405090634.4649-1-quentin.schulz@free-electrons.com> References: <20170405090634.4649-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds the DT node for the thermal sensor present in the Allwinner A33 GPADC. Signed-off-by: Quentin Schulz --- v3: - switched compatible to allwinner,sun8i-a33-ths, - renamed DT node name and label to ths to better match datasheet's name, arch/arm/boot/dts/sun8i-a33.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.9.3 diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi index 077db22..9734e63 100644 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@ -266,6 +266,13 @@ status = "disabled"; }; + ths: ths@01c25000 { + compatible = "allwinner,sun8i-a33-ths"; + reg = <0x01c25000 0x100>; + #thermal-sensor-cells = <0>; + #io-channel-cells = <0>; + }; + fe0: display-frontend@01e00000 { compatible = "allwinner,sun8i-a33-display-frontend"; reg = <0x01e00000 0x20000>; @@ -376,6 +383,11 @@ }; }; }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&ths>; + }; }; &ccu { From patchwork Wed Apr 5 09:06:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 96791 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp169338qgd; Wed, 5 Apr 2017 02:10:54 -0700 (PDT) X-Received: by 10.98.133.153 with SMTP id m25mr28063855pfk.263.1491383454394; Wed, 05 Apr 2017 02:10:54 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g1si20062230pld.54.2017.04.05.02.10.54; Wed, 05 Apr 2017 02:10:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933023AbdDEJHT (ORCPT + 14 others); Wed, 5 Apr 2017 05:07:19 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:33041 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932669AbdDEJHI (ORCPT ); Wed, 5 Apr 2017 05:07:08 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id B5E2820825; Wed, 5 Apr 2017 11:07:06 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id B367F20432; Wed, 5 Apr 2017 11:07:05 +0200 (CEST) From: Quentin Schulz To: dmitry.torokhov@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, lee.jones@linaro.org, linux@armlinux.org.uk, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net Cc: thomas.petazzoni@free-electrons.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com, icenowy@aosc.xyz, Quentin Schulz Subject: [PATCH v4 7/8] ARM: sun8i: a33: Add devfreq-based GPU cooling Date: Wed, 5 Apr 2017 11:06:33 +0200 Message-Id: <20170405090634.4649-8-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170405090634.4649-1-quentin.schulz@free-electrons.com> References: <20170405090634.4649-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Maxime Ripard This adds GPU thermal throttling for the Allwinner A33. Signed-off-by: Maxime Ripard Signed-off-by: Quentin Schulz --- v3: - got rid of cooling-min-level and cooling-max-level as it's not used in any code in the kernel, added in v2 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 1 + arch/arm/boot/dts/sun8i-a33.dtsi | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) -- 2.9.3 diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index 5e8725d..6d81a6d 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -495,6 +495,7 @@ assigned-clocks = <&ccu CLK_GPU>; assigned-clock-rates = <384000000>; + #cooling-cells = <2>; }; gic: interrupt-controller@01c81000 { diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi index b88c107..541ca45 100644 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@ -188,6 +188,16 @@ trip = <&cpu_alert1>; cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; + + map2 { + trip = <&gpu_alert0>; + cooling-device = <&mali 1 THERMAL_NO_LIMIT>; + }; + + map3 { + trip = <&gpu_alert1>; + cooling-device = <&mali 2 THERMAL_NO_LIMIT>; + }; }; trips { @@ -198,6 +208,13 @@ type = "passive"; }; + gpu_alert0: gpu_alert0 { + /* milliCelsius */ + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_alert1: cpu_alert1 { /* milliCelsius */ temperature = <90000>; @@ -205,6 +222,13 @@ type = "hot"; }; + gpu_alert1: gpu_alert1 { + /* milliCelsius */ + temperature = <95000>; + hysteresis = <2000>; + type = "hot"; + }; + cpu_crit: cpu_crit { /* milliCelsius */ temperature = <110000>; From patchwork Wed Apr 5 09:06:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 96883 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp319231qgd; Wed, 5 Apr 2017 08:33:02 -0700 (PDT) X-Received: by 10.99.99.1 with SMTP id x1mr31531150pgb.110.1491406382280; Wed, 05 Apr 2017 08:33:02 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g5si20934482pgk.41.2017.04.05.08.33.01; Wed, 05 Apr 2017 08:33:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933003AbdDEP2J (ORCPT + 13 others); Wed, 5 Apr 2017 11:28:09 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:33066 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932677AbdDEJHK (ORCPT ); Wed, 5 Apr 2017 05:07:10 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id AEE8020820; Wed, 5 Apr 2017 11:07:07 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id BD2E220432; Wed, 5 Apr 2017 11:07:06 +0200 (CEST) From: Quentin Schulz To: dmitry.torokhov@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, lee.jones@linaro.org, linux@armlinux.org.uk, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net Cc: Quentin Schulz , thomas.petazzoni@free-electrons.com, linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com, icenowy@aosc.xyz Subject: [PATCH v4 8/8] ARM: sun8i: sina33: add highest OPP of CPUs Date: Wed, 5 Apr 2017 11:06:34 +0200 Message-Id: <20170405090634.4649-9-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170405090634.4649-1-quentin.schulz@free-electrons.com> References: <20170405090634.4649-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The A33 supports 1.1GHz and 1.2GHz frequencies at 1.32V and the Sinlinx SinA33 has its cpu-supply property set in the cpu DT node. Therefore, CPUfreq knows how to handle the regulator in charge of the CPU and can adjust its voltage to match the OPP. Add these two CPU frequencies to the CPU OPP table of the Sinlinx SinA33. Signed-off-by: Quentin Schulz --- added in v3 arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.9.3 diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts index e34e092..9b620cc 100644 --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts @@ -87,6 +87,20 @@ cpu-supply = <®_dcdc3>; }; +&cpu0_opp_table { + opp@1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1320000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1320000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; +}; + &de { status = "okay"; };