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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id z5sm4511910wrn.8.2021.02.17.07.25.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Feb 2021 07:25:04 -0800 (PST) From: Bryan O'Donoghue To: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@qti.qualcomm.com, Jonathan Marek Subject: [PATCH 1/2] arm64: dts: qcom: sm8250: Add videocc DT node Date: Wed, 17 Feb 2021 15:26:20 +0000 Message-Id: <20210217152621.1714814-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210217152621.1714814-1-bryan.odonoghue@linaro.org> References: <20210217152621.1714814-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Marek This commit adds the videocc DTS node for sm8250. Signed-off-by: Jonathan Marek Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.29.2 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 947e1accae3a..23fb9a0e32b9 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -17,6 +17,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -2322,6 +2323,19 @@ usb_2_dwc3: dwc3@a800000 { }; }; + videocc: clock-controller@abf0000 { + compatible = "qcom,sm8250-videocc"; + reg = <0 0x0abf0000 0 0x10000>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>; + mmcx-supply = <&mmcx_reg>; + clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mdss: mdss@ae00000 { compatible = "qcom,sdm845-mdss"; reg = <0 0x0ae00000 0 0x1000>; From patchwork Wed Feb 17 15:26:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 383848 Delivered-To: patch@linaro.org Received: by 2002:a02:c80e:0:0:0:0:0 with SMTP id p14csp2913614jao; Wed, 17 Feb 2021 07:33:38 -0800 (PST) X-Google-Smtp-Source: ABdhPJwaqvVicKJf5Wb8cT4oSmrz13xeSmjOqHaJ8MSWZZB10IAgQe1+tyXWcqOKhpSfHnMr5GYn X-Received: by 2002:a50:9d4d:: with SMTP id j13mr26493056edk.83.1613576017919; Wed, 17 Feb 2021 07:33:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1613576017; cv=none; d=google.com; s=arc-20160816; b=rRQ7WfuPfb0sy3q9U6ASPYzp6bEQWG0ULQfz1RfP/z0NvpFgZxqSffSHbWWnGSW9dp zHC2W5jz9FHVcGw8WgLJQlYmgbi9FOBjIAER1gb3/FIOQVx3iMKREg684T4MoIDLKtiz UXWnPeYe6mzTnJxe/q5p7shrEJ9Jwz0QB+L/PvOvwKQhABUvH5sH2jFOTQ2MB5PMdST5 EJtZSjOvbvIrGE3qwRJNlB8a+Ch+8T9THZaNwjzEG1s4vSXDwxHrlYOKqIxM6Sm+EYNE RHlP5HZp2r+nYLEe5MZSxsbL3MBEE9MRrWbWqq1K/vryuWQ1dcu+WFJURLN/MvURtPY/ +91A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EhSIfFxNbUkZwc2hGN0RelpldEmFwxC7U4e0q15YQ4M=; b=dMBMSEDVQP58vekOOgH8un/2n0s76OMZisN+BaJ5iFKnvmMVNW9vNKUYG/aL19SdMT g2db0B5digHeZ76YkQhO1ZGNsHGWpcDhnG3+Q000omQtHI0UfBLHTJFlAUiNpjMANSkE GbbcI1JZypjXpWxaoXHEaPlBKQUqitpNLWlziJvnAHIuVg4KyKCLeA33in90xoCnV5Ed I24OrV+a2k4vSW7dbbHhuzow87d7EHF2K2mLWzNayeL3LhiFyrKnK2usSw0Q4mK8coNF dvlWkM5THJ0zx9/3TdQD8HNpEs/YVN62M98Ns9QjcXgqrQcMLIx78PouUDVZtXl2Vu+y YAWw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XMZLYqCM; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id z5sm4511910wrn.8.2021.02.17.07.25.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Feb 2021 07:25:05 -0800 (PST) From: Bryan O'Donoghue To: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@qti.qualcomm.com Subject: [PATCH 2/2] arm64: dts: qcom: sm8250: Add venus DT node Date: Wed, 17 Feb 2021 15:26:21 +0000 Message-Id: <20210217152621.1714814-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210217152621.1714814-1-bryan.odonoghue@linaro.org> References: <20210217152621.1714814-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT entries for the sm8250 venus encoder/decoder. Co-developed-by: Jonathan Marek Signed-off-by: Jonathan Marek Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 59 ++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) -- 2.29.2 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 23fb9a0e32b9..cf602e8c40a7 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2323,6 +2323,65 @@ usb_2_dwc3: dwc3@a800000 { }; }; + venus: video-codec@aa00000 { + compatible = "qcom,sm8250-venus"; + reg = <0 0x0aa00000 0 0x100000>; + interrupts = ; + power-domains = <&videocc MVS0C_GDSC>, + <&videocc MVS0_GDSC>, + <&rpmhpd SM8250_MX>; + power-domain-names = "venus", "vcodec0", "mx"; + operating-points-v2 = <&venus_opp_table>; + + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>; + clock-names = "iface", "core", "vcodec0_core"; + + interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>, + <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>; + interconnect-names = "cpu-cfg", "video-mem"; + + iommus = <&apps_smmu 0x2100 0x0400>; + memory-region = <&video_mem>; + + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = "bus", "core"; + + video-decoder { + compatible = "venus-decoder"; + }; + + video-encoder { + compatible = "venus-encoder"; + }; + + venus_opp_table: venus-opp-table { + compatible = "operating-points-v2"; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-1014000000 { + opp-hz = /bits/ 64 <1014000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-1098000000 { + opp-hz = /bits/ 64 <1098000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-1332000000 { + opp-hz = /bits/ 64 <1332000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + videocc: clock-controller@abf0000 { compatible = "qcom,sm8250-videocc"; reg = <0 0x0abf0000 0 0x10000>;