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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id a9sm4542725pfe.147.2018.03.27.09.01.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Mar 2018 09:01:43 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joonwoo Park , Imran Khan , Rajendra Nayak Subject: [PATCH 1/2] arm64: dts: Add msm8998 SoC and MTP board support Date: Tue, 27 Mar 2018 09:01:53 -0700 Message-Id: <20180327160154.1938-1-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.16.2 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Joonwoo Park Add initial device tree support for the Qualcomm MSM8998 SoC and MTP8998 evaluation board. Signed-off-by: Joonwoo Park Signed-off-by: Imran Khan Signed-off-by: Rajendra Nayak [bjorn: Restructured, removed its node and moved to SPDX headers] Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/msm8998-mtp.dts | 13 ++ arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 20 ++ arch/arm64/boot/dts/qcom/msm8998.dtsi | 344 ++++++++++++++++++++++++++++++ 4 files changed, 378 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/msm8998-mtp.dts create mode 100644 arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi create mode 100644 arch/arm64/boot/dts/qcom/msm8998.dtsi -- 2.16.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 55ec5ee7f7e8..f658595bb347 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8992-bullhead-rev-101.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8994-angler-rev-101.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb +dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dts b/arch/arm64/boot/dts/qcom/msm8998-mtp.dts new file mode 100644 index 000000000000..f1853e020e57 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (c) 2016, The Linux Foundation. All rights reserved. */ + +/dts-v1/; + +#include "msm8998-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. MSM 8998 v1 MTP"; + compatible = "qcom,msm8998-mtp"; + + qcom,board-id = <8 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi new file mode 100644 index 000000000000..0f2f0e0de74f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (c) 2016, The Linux Foundation. All rights reserved. */ + +#include "msm8998.dtsi" + +/ { + aliases { + serial0 = &blsp2_uart1; + }; + + chosen { + stdout-path = "serial0"; + }; +}; + +&soc { + serial@0c1b0000 { + status = "okay"; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi new file mode 100644 index 000000000000..9e2c0ff7457f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -0,0 +1,344 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (c) 2016, The Linux Foundation. All rights reserved. */ + +#include +#include + +/ { + model = "Qualcomm Technologies, Inc. MSM 8998"; + + interrupt-parent = <&intc>; + + qcom,msm-id = <292 0x0>; + + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + memory { + device_type = "memory"; + /* We expect the bootloader to fill in the reg */ + reg = <0 0 0 0>; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + efficiency = <1024>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + }; + L1_I_0: l1-icache { + compatible = "arm,arch-cache"; + }; + L1_D_0: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + efficiency = <1024>; + next-level-cache = <&L2_0>; + L1_I_1: l1-icache { + compatible = "arm,arch-cache"; + }; + L1_D_1: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + efficiency = <1024>; + next-level-cache = <&L2_0>; + L1_I_2: l1-icache { + compatible = "arm,arch-cache"; + }; + L1_D_2: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + efficiency = <1024>; + next-level-cache = <&L2_0>; + L1_I_3: l1-icache { + compatible = "arm,arch-cache"; + }; + L1_D_3: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU4: cpu@100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + efficiency = <1536>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + }; + L1_I_100: l1-icache { + compatible = "arm,arch-cache"; + }; + L1_D_100: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU5: cpu@101 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "psci"; + efficiency = <1536>; + next-level-cache = <&L2_1>; + L1_I_101: l1-icache { + compatible = "arm,arch-cache"; + }; + L1_D_101: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU6: cpu@102 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x102>; + enable-method = "psci"; + efficiency = <1536>; + next-level-cache = <&L2_1>; + L1_I_102: l1-icache { + compatible = "arm,arch-cache"; + }; + L1_D_102: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU7: cpu@103 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x103>; + enable-method = "psci"; + efficiency = <1536>; + next-level-cache = <&L2_1>; + L1_I_103: l1-icache { + compatible = "arm,arch-cache"; + }; + L1_D_103: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU4>; + }; + + core1 { + cpu = <&CPU5>; + }; + + core2 { + cpu = <&CPU6>; + }; + + core3 { + cpu = <&CPU7>; + }; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 1 0xf08>, + <1 2 0xf08>, + <1 3 0xf08>, + <1 0 0xf08>; + clock-frequency = <19200000>; + }; + + clocks { + xo_board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + clock-output-names = "xo_board"; + }; + + sleep_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32764>; + clock-output-names = "sleep_clk"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + soc: soc {}; +}; + +&soc { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + reg = <0x17a00000 0x10000>, /* GICD */ + <0x17b00000 0x100000>; /* GICR * 8 */ + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + interrupt-controller; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + interrupts = <1 9 4>; + }; + + gcc: clock-controller@100000 { + compatible = "qcom,gcc-msm8998"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + reg = <0x100000 0xb0000>; + }; + + blsp2_uart1: serial@0c1b0000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0xc1b0000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, + <&gcc GCC_BLSP2_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + timer@17920000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0x17920000 0x1000>; + clock-frequency = <19200000>; + + frame@17921000 { + frame-number = <0>; + interrupts = <0 8 0x4>, + <0 7 0x4>; + reg = <0x17921000 0x1000>, + <0x17922000 0x1000>; + }; + + frame@17923000 { + frame-number = <1>; + interrupts = <0 9 0x4>; + reg = <0x17923000 0x1000>; + status = "disabled"; + }; + + frame@17924000 { + frame-number = <2>; + interrupts = <0 10 0x4>; + reg = <0x17924000 0x1000>; + status = "disabled"; + }; + + frame@17925000 { + frame-number = <3>; + interrupts = <0 11 0x4>; + reg = <0x17925000 0x1000>; + status = "disabled"; + }; + + frame@17926000 { + frame-number = <4>; + interrupts = <0 12 0x4>; + reg = <0x17926000 0x1000>; + status = "disabled"; + }; + + frame@17927000 { + frame-number = <5>; + interrupts = <0 13 0x4>; + reg = <0x17927000 0x1000>; + status = "disabled"; + }; + + frame@17928000 { + frame-number = <6>; + interrupts = <0 14 0x4>; + reg = <0x17928000 0x1000>; + status = "disabled"; + }; + }; + + spmi_bus: qcom,spmi@800f000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x800f000 0x1000>, + <0x8400000 0x1000000>, + <0x9400000 0x1000000>, + <0xa400000 0x220000>, + <0x800a000 0x3000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts = ; + qcom,ee = <0>; + qcom,channel = <0>; + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + cell-index = <0>; + }; +}; From patchwork Tue Mar 27 16:01:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 132486 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp5256632ljb; Tue, 27 Mar 2018 09:01:51 -0700 (PDT) X-Google-Smtp-Source: AG47ELuwR+GlfNlcsa222FH5JPTn6DkF5NxDCR+QIGmLphWvOHyPcEVL69LPUFm4stcyXTsnBP0b X-Received: by 2002:a17:902:a2:: with SMTP id a31-v6mr45382630pla.204.1522166511311; Tue, 27 Mar 2018 09:01:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522166511; cv=none; d=google.com; s=arc-20160816; b=D8s53QniqyFq94o7svG9CbRosQRMa/CqJVSs4dow3ZevODLcuSbaX6ppo0Tq0wIaUE diZ8aEZtSFo7dI+jdKEi63dgiQ7BjM6Gv5U+mAHBccwRawWfIGhFtPELb5c85K1NzMxB CPlp1AfxWzAJQ58G4Y+NsoosTzzP6xU6ODPw2afjDI/lHbcNrn7W/yoqWWlGA/LsZXDB ub0u46RMwc0cRoAeXam1sjYjU+pbkv1HDc/6Us7L3v18muK49wyPNp3hMMBsgGREW5yZ H/ZjqHcLG6HQB+4XlpeUsNLxevC+Iicuy1wj4AWDMl03TucpQRqPIGUBFRwuMGVhTyWD rdQg== ARC-Message-Signature: i=1; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id a9sm4542725pfe.147.2018.03.27.09.01.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Mar 2018 09:01:44 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] arm64: dts: qcom: msm8998: Add rpm and regulators for MTP Date: Tue, 27 Mar 2018 09:01:54 -0700 Message-Id: <20180327160154.1938-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180327160154.1938-1-bjorn.andersson@linaro.org> References: <20180327160154.1938-1-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the rpm and rpm regulators to the msm8998 platform and mtp. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 142 ++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/msm8998.dtsi | 83 +++++++++++++++++ 2 files changed, 225 insertions(+) -- 2.16.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi index 0f2f0e0de74f..292c2dd2cb49 100644 --- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi @@ -18,3 +18,145 @@ status = "okay"; }; }; + +&rpm_glink { + rpm_requests { + pm8998-regulators { + s2 { + regulator-min-microvolt = <1128000>; + regulator-max-microvolt = <1128000>; + }; + s3 { + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + }; + s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + s5 { + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2040000>; + }; + s7 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1028000>; + }; + s8 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + }; + l1 { + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + }; + l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + l3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + l5 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + }; + l6 { + regulator-min-microvolt = <1808000>; + regulator-max-microvolt = <1808000>; + }; + l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + l8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + l9 { + regulator-min-microvolt = <1808000>; + regulator-max-microvolt = <2960000>; + }; + l10 { + regulator-min-microvolt = <1808000>; + regulator-max-microvolt = <2960000>; + }; + l11 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + l13 { + regulator-min-microvolt = <1808000>; + regulator-max-microvolt = <2960000>; + }; + l14 { + regulator-min-microvolt = <1880000>; + regulator-max-microvolt = <1880000>; + }; + l15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + l16 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + }; + l17 { + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1304000>; + }; + l18 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + }; + l19 { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + }; + l20 { + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + }; + l21 { + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + }; + l22 { + regulator-min-microvolt = <2864000>; + regulator-max-microvolt = <2864000>; + }; + l23 { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3312000>; + }; + l24 { + regulator-min-microvolt = <3088000>; + regulator-max-microvolt = <3088000>; + }; + l25 { + regulator-min-microvolt = <3104000>; + regulator-max-microvolt = <3312000>; + }; + l26 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + l28 { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + }; + }; + + pmi8998-regulators { + bob { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3600000>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 9e2c0ff7457f..69c069dbbf90 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -223,6 +223,16 @@ method = "smc"; }; + rpm_glink: rpm-glink { + compatible = "qcom,glink-rpm"; + + interrupts = ; + + qcom,rpm-msg-ram = <&rpm_msg_ram>; + + mboxes = <&apcs_glb 0>; + }; + soc: soc {}; }; @@ -341,4 +351,77 @@ #interrupt-cells = <4>; cell-index = <0>; }; + + rpm_msg_ram: memory@68000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x778000 0x7000>; + }; + + apcs_glb: mailbox@9820000 { + compatible = "qcom,msm8998-apcs-hmss-global"; + reg = <0x17911000 0x1000>; + + #mbox-cells = <1>; + }; +}; + +&rpm_glink { + rpm_requests { + compatible = "qcom,rpm-msm8998"; + qcom,glink-channels = "rpm_requests"; + + pm8998-regulators { + compatible = "qcom,rpm-pm8998-regulators"; + + pm8998_s1: s1 {}; + pm8998_s2: s2 {}; + pm8998_s3: s3 {}; + pm8998_s4: s4 {}; + pm8998_s5: s5 {}; + pm8998_s6: s6 {}; + pm8998_s7: s7 {}; + pm8998_s8: s8 {}; + pm8998_s9: s9 {}; + pm8998_s10: s10 {}; + pm8998_s11: s11 {}; + pm8998_s12: s12 {}; + pm8998_s13: s13 {}; + pm8998_l1: l1 {}; + pm8998_l2: l2 {}; + pm8998_l3: l3 {}; + pm8998_l4: l4 {}; + pm8998_l5: l5 {}; + pm8998_l6: l6 {}; + pm8998_l7: l7 {}; + pm8998_l8: l8 {}; + pm8998_l9: l9 {}; + pm8998_l10: l10 {}; + pm8998_l11: l11 {}; + pm8998_l12: l12 {}; + pm8998_l13: l13 {}; + pm8998_l14: l14 {}; + pm8998_l15: l15 {}; + pm8998_l16: l16 {}; + pm8998_l17: l17 {}; + pm8998_l18: l18 {}; + pm8998_l19: l19 {}; + pm8998_l20: l20 {}; + pm8998_l21: l21 {}; + pm8998_l22: l22 {}; + pm8998_l23: l23 {}; + pm8998_l24: l24 {}; + pm8998_l25: l25 {}; + pm8998_l26: l26 {}; + pm8998_l27: l27 {}; + pm8998_l28: l28 {}; + pm8998_lvs1: lvs1 {}; + pm8998_lvs2: lvs2 {}; + }; + + pmi8998-regulators { + compatible = "qcom,rpm-pmi8998-regulators"; + + pmi8998_bob: bob {}; + }; + }; };