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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:37 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 01/25] media: venus: Update v6 buffer descriptors Date: Mon, 22 Feb 2021 16:02:36 +0000 Message-Id: <20210222160300.1811121-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently hfi_platform_v6.c adds a bunch of capability parameters. Reviewing downstream we can see a number of these need to be updated. techpack/video/msm/vidc/msm_vidc_platform.c :: kona_capabilities[] Signed-off-by: Bryan O'Donoghue --- .../platform/qcom/venus/hfi_platform_v6.c | 138 +++++++++--------- 1 file changed, 69 insertions(+), 69 deletions(-) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/hfi_platform_v6.c b/drivers/media/platform/qcom/venus/hfi_platform_v6.c index 2278be13cb90..6fa80353bcce 100644 --- a/drivers/media/platform/qcom/venus/hfi_platform_v6.c +++ b/drivers/media/platform/qcom/venus/hfi_platform_v6.c @@ -9,15 +9,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_H264, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 5760, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 5760, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 1}, /* ((5760 * 2880) / 256) */ - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 36, 64800, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 200000000, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 22000000, 1}, .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 36, 1958400, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .num_caps = 9, .pl[0] = {HFI_H264_PROFILE_BASELINE, HFI_H264_LEVEL_52}, @@ -35,15 +35,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_HEVC, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 1}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, - .caps[4] = {HFI_CAPABILITY_SCALE_X, 4096, 65536, 1}, - .caps[5] = {HFI_CAPABILITY_SCALE_Y, 4096, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 2073600, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 2, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 22000000, 1}, + .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, + .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 3, 1}, .num_caps = 10, .pl[0] = {HFI_HEVC_PROFILE_MAIN, HFI_HEVC_LEVEL_6 | HFI_HEVC_TIER_HIGH0}, @@ -61,15 +61,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_VP8, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 1}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, - .caps[4] = {HFI_CAPABILITY_SCALE_X, 4096, 65536, 1}, - .caps[5] = {HFI_CAPABILITY_SCALE_Y, 4096, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 2073600, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 2, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 4096, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 4096, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 36864, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 100000000, 1}, + .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, + .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 4423680, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 120, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 3, 1}, .num_caps = 10, .pl[0] = {HFI_VPX_PROFILE_MAIN, HFI_VPX_LEVEL_VERSION_0}, @@ -86,15 +86,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_VP9, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 1}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, - .caps[4] = {HFI_CAPABILITY_SCALE_X, 4096, 65536, 1}, - .caps[5] = {HFI_CAPABILITY_SCALE_Y, 4096, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 2073600, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 2, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 22000000, 1}, + .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, + .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 3, 1}, .num_caps = 10, .pl[0] = {HFI_VP9_PROFILE_P0, 200}, @@ -112,15 +112,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_MPEG2, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 1920, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 1920, 1}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 8160, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 1920, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 1920, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 8160, 1}, .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 40000000, 1}, - .caps[4] = {HFI_CAPABILITY_SCALE_X, 4096, 65536, 1}, - .caps[5] = {HFI_CAPABILITY_SCALE_Y, 4096, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 244800, 1}, + .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, + .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 30, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 2, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 1, 1}, .num_caps = 10, .pl[0] = {HFI_MPEG2_PROFILE_SIMPLE, HFI_MPEG2_LEVEL_H14}, @@ -135,21 +135,21 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_H264, .domain = VIDC_SESSION_TYPE_ENC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 16}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 16}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 22000000, 1}, .caps[4] = {HFI_CAPABILITY_SCALE_X, 8192, 65536, 1}, .caps[5] = {HFI_CAPABILITY_SCALE_Y, 8192, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 1036800, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 3, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_PEAKBITRATE, 32000, 160000000, 1}, - .caps[10] = {HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS, 0, 5, 1}, - .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 4, 1}, + .caps[10] = {HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS, 0, 6, 1}, + .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 2, 1}, .caps[12] = {HFI_CAPABILITY_LCU_SIZE, 16, 16, 1}, .caps[13] = {HFI_CAPABILITY_BFRAME, 0, 1, 1}, - .caps[14] = {HFI_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS, 0, 5, 1}, + .caps[14] = {HFI_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS, 0, 6, 1}, .caps[15] = {HFI_CAPABILITY_I_FRAME_QP, 0, 51, 1}, .caps[16] = {HFI_CAPABILITY_P_FRAME_QP, 0, 51, 1}, .caps[17] = {HFI_CAPABILITY_B_FRAME_QP, 0, 51, 1}, @@ -172,24 +172,24 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_HEVC, .domain = VIDC_SESSION_TYPE_ENC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 16}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 16}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 16}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 16}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 160000000, 1}, .caps[4] = {HFI_CAPABILITY_SCALE_X, 8192, 65536, 1}, .caps[5] = {HFI_CAPABILITY_SCALE_Y, 8192, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 1036800, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 3, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_PEAKBITRATE, 32000, 160000000, 1}, .caps[10] = {HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS, 0, 5, 1}, - .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 4, 1}, + .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 2, 1}, .caps[12] = {HFI_CAPABILITY_LCU_SIZE, 32, 32, 1}, .caps[13] = {HFI_CAPABILITY_BFRAME, 0, 1, 1}, .caps[14] = {HFI_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS, 0, 5, 1}, - .caps[15] = {HFI_CAPABILITY_I_FRAME_QP, 0, 63, 1}, - .caps[16] = {HFI_CAPABILITY_P_FRAME_QP, 0, 63, 1}, - .caps[17] = {HFI_CAPABILITY_B_FRAME_QP, 0, 63, 1}, + .caps[15] = {HFI_CAPABILITY_I_FRAME_QP, 0, 51, 1}, + .caps[16] = {HFI_CAPABILITY_P_FRAME_QP, 0, 51, 1}, + .caps[17] = {HFI_CAPABILITY_B_FRAME_QP, 0, 51, 1}, .caps[18] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 2, 1}, .caps[19] = {HFI_CAPABILITY_RATE_CONTROL_MODES, 0x1000001, 0x1000005, 1}, .caps[20] = {HFI_CAPABILITY_COLOR_SPACE_CONVERSION, 0, 2, 1}, @@ -209,20 +209,20 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_VP8, .domain = VIDC_SESSION_TYPE_ENC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 16}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 16}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 4096, 16}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 4096, 16}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 36864, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 74000000, 1}, .caps[4] = {HFI_CAPABILITY_SCALE_X, 8192, 65536, 1}, .caps[5] = {HFI_CAPABILITY_SCALE_Y, 8192, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 1036800, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 240, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 3, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 4423680, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 120, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_PEAKBITRATE, 32000, 160000000, 1}, .caps[10] = {HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS, 0, 3, 1}, .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 2, 1}, .caps[12] = {HFI_CAPABILITY_LCU_SIZE, 16, 16, 1}, - .caps[13] = {HFI_CAPABILITY_BFRAME, 0, 1, 1}, + .caps[13] = {HFI_CAPABILITY_BFRAME, 0, 0, 1}, .caps[14] = {HFI_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS, 0, 5, 1}, .caps[15] = {HFI_CAPABILITY_I_FRAME_QP, 0, 127, 1}, .caps[16] = {HFI_CAPABILITY_P_FRAME_QP, 0, 127, 1}, From patchwork Mon Feb 22 16:02:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385784 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1394429jap; Mon, 22 Feb 2021 08:02:38 -0800 (PST) X-Google-Smtp-Source: ABdhPJw+pqN2E6Antdmkl7fFmvpKOa16HWWqXQWzaqar52LNPipUoBvU03syIEatn9PFm8yOw8LS X-Received: by 2002:a05:6402:2690:: with SMTP id w16mr23476088edd.304.1614009758520; Mon, 22 Feb 2021 08:02:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009758; cv=none; d=google.com; s=arc-20160816; b=x7Zhm3wUplNJ5BxhJVhw+IvWyKxS9pZWY0qqY50T8jU2S0vvTm/wmHYuHUB1ddaq8d FksDrcN2DN4KpGgCHSzB4Np8NH+dVv5VisIe9d7cYVEDVFyqAby5GkPVd4xAtmLk6bw0 l0YG9OTVEKM+QRWccQZoOumtwlbljqfcY+ZgkKrp5/+trW2jWoY/rJt0vRdnyrTh3m0/ 7x6JZIZR/XOjqxW0bmAqRYCGVi/ohTIlIi4orz1X53xpI7af7pJYEDjPqmblKi7z9zN1 xHHaBtCPuc/QWROGVl4Ej6H9wsUhAtSwfPqwb89ceA28MpXYjcoFFZ+MmHzHAmRYq/jh iRcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0WW2t9gxZjLIIqwdcJaOQq5OeJW2zdxpgdUPYhM+q4A=; b=GLDPagfqTHGgEV0mCSU7c3zu4TLr4fBd78wDE8OEBb0d0sJ+gYfEWtAaqJ9dCWLvPb QOgmm+Bcr/XHzUE/FAWpA4y9jthUk72yL1prBLxHUIpcSSUrESt/n1hZLgKvMw1IJCEh jjQaGOfyMH6tT8oUIxyaEoQxMbYUsxNwfeBlp9v2bsodf2a/LSBREAT1mgKGiVQOm0w0 RL4jvH8kD8pT1olXC9NVslmSjtPzodyJJZv6SfE+3ETCO6Fab+lvxzGJK+LTJTOxji6v o+x7Ojvwgmxtzgqa/+yvMlfBU7MGuRV38jLBAUjzontW+qDf6CdjKecj8UJtOPdrTqDI UjUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ECvLOi0s; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:38 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 02/25] media: venus: core,pm: Add handling for resets Date: Mon, 22 Feb 2021 16:02:37 +0000 Message-Id: <20210222160300.1811121-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Stanimir Varbanov The Venus driver has to control two reset signals related to gcc video_axi0 and videocc mvs0c for v6. Add it. Signed-off-by: Stanimir Varbanov Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/core.h | 4 ++ .../media/platform/qcom/venus/pm_helpers.c | 60 +++++++++++++++++++ 2 files changed, 64 insertions(+) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index a252ed32cc14..771f5bb0981e 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -24,6 +24,7 @@ #define VIDC_CLKS_NUM_MAX 4 #define VIDC_VCODEC_CLKS_NUM_MAX 2 #define VIDC_PMDOMAINS_NUM_MAX 3 +#define VIDC_RESETS_NUM_MAX 2 extern int venus_fw_debug; @@ -64,6 +65,8 @@ struct venus_resources { unsigned int vcodec_pmdomains_num; const char **opp_pmdomain; unsigned int vcodec_num; + const char * const resets[VIDC_RESETS_NUM_MAX]; + unsigned int resets_num; enum hfi_version hfi_version; u32 max_load; unsigned int vmem_id; @@ -130,6 +133,7 @@ struct venus_core { struct device *pmdomains[VIDC_PMDOMAINS_NUM_MAX]; struct device_link *opp_dl_venus; struct device *opp_pmdomain; + struct reset_control *resets[VIDC_RESETS_NUM_MAX]; struct video_device *vdev_dec; struct video_device *vdev_enc; struct v4l2_device v4l2_dev; diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index e349d01422c5..4f5d42662963 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -830,6 +831,52 @@ static void vcodec_domains_put(struct venus_core *core) dev_pm_opp_detach_genpd(core->opp_table); } +static int core_resets_reset(struct venus_core *core) +{ + const struct venus_resources *res = core->res; + unsigned char i; + int ret; + + if (!res->resets_num) + return 0; + + for (i = 0; i < res->resets_num; i++) { + ret = reset_control_assert(core->resets[i]); + if (ret) + goto err; + + usleep_range(150, 250); + ret = reset_control_deassert(core->resets[i]); + if (ret) + goto err; + } + +err: + return ret; +} + +static int core_resets_get(struct venus_core *core) +{ + struct device *dev = core->dev; + const struct venus_resources *res = core->res; + unsigned char i; + int ret; + + if (!res->resets_num) + return 0; + + for (i = 0; i < res->resets_num; i++) { + core->resets[i] = + devm_reset_control_get_exclusive(dev, res->resets[i]); + if (IS_ERR(core->resets[i])) { + ret = PTR_ERR(core->resets[i]); + return ret; + } + } + + return 0; +} + static int core_get_v4(struct venus_core *core) { struct device *dev = core->dev; @@ -853,6 +900,10 @@ static int core_get_v4(struct venus_core *core) if (ret) return ret; + ret = core_resets_get(core); + if (ret) + return ret; + if (legacy_binding) return 0; @@ -912,6 +963,13 @@ static int core_power_v4(struct venus_core *core, int on) } } + ret = core_resets_reset(core); + if (ret) { + if (pmctrl) + pm_runtime_put_sync(pmctrl); + return ret; + } + ret = core_clks_enable(core); if (ret < 0 && pmctrl) pm_runtime_put_sync(pmctrl); @@ -922,6 +980,8 @@ static int core_power_v4(struct venus_core *core, int on) core_clks_disable(core); + ret = core_resets_reset(core); + if (pmctrl) pm_runtime_put_sync(pmctrl); } From patchwork Mon Feb 22 16:02:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385785 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1394916jap; Mon, 22 Feb 2021 08:03:07 -0800 (PST) X-Google-Smtp-Source: ABdhPJxwUqQKRk66izT7/YcQ8aE6tmfmmSBfh56R9EVFpSPImMDlBYTLxiNWgA/ALioJA/WazBOF X-Received: by 2002:a17:907:98f5:: with SMTP id ke21mr21913935ejc.13.1614009786914; Mon, 22 Feb 2021 08:03:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009786; cv=none; d=google.com; s=arc-20160816; b=ofRPnQNjM1zdqJEQxliav+MDAgLhAaoPBqPYVoYKRNeq13a+q2r0r0G8DsW5kP96hf 0G7zo9UWAAN9xuxjNzCaTCSxv6ZaAuEOdncWVZr+XKly2hUQK5jHJQt7HfyGBgaKqfd8 Qnr/aLjYlPX5WMasFNH0pJTpxUlNpvIuPBEjt4g7RuNOZ46dEa9iiK0MY7j8wkhoCgu5 My4ssamUyMPojhItVd220ZNQNBWmXt++PsuH4V0n/UF3+DVt9q8UVNPAW5i87NlhTpa5 s6h36WNWOruUEoiRuDNKW91B5eZKa+H5QuvW9gKn8u+MTU29cB9j2nTKOekUndzoOgFF 7gfA== ARC-Message-Signature: i=1; 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:39 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 03/25] media: venus: core: add sm8250 DT compatible and resource data Date: Mon, 22 Feb 2021 16:02:38 +0000 Message-Id: <20210222160300.1811121-4-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Adds an sm8250 compatible binding to the venus core. Co-developed-by: Jonathan Marek Signed-off-by: Jonathan Marek Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/core.c | 54 ++++++++++++++++++++++++ 1 file changed, 54 insertions(+) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index 61a245b4db68..67676f1632ab 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -627,12 +627,66 @@ static const struct venus_resources sc7180_res = { .fwname = "qcom/venus-5.4/venus.mdt", }; +static const struct freq_tbl sm8250_freq_table[] = { + { 0, 444000000 }, + { 0, 366000000 }, + { 0, 338000000 }, + { 0, 240000000 }, +}; + +static const struct bw_tbl sm8250_bw_table_enc[] = { + { 1944000, 1954000, 0, 3711000, 0 }, /* 3840x2160@60 */ + { 972000, 996000, 0, 1905000, 0 }, /* 3840x2160@30 */ + { 489600, 645000, 0, 977000, 0 }, /* 1920x1080@60 */ + { 244800, 332000, 0, 498000, 0 }, /* 1920x1080@30 */ +}; + +static const struct bw_tbl sm8250_bw_table_dec[] = { + { 2073600, 2403000, 0, 4113000, 0 }, /* 4096x2160@60 */ + { 1036800, 1224000, 0, 2079000, 0 }, /* 4096x2160@30 */ + { 489600, 812000, 0, 998000, 0 }, /* 1920x1080@60 */ + { 244800, 416000, 0, 509000, 0 }, /* 1920x1080@30 */ +}; + +static const struct reg_val sm8250_reg_preset[] = { + { 0xb0088, 0 }, +}; + +static const struct venus_resources sm8250_res = { + .freq_tbl = sm8250_freq_table, + .freq_tbl_size = ARRAY_SIZE(sm8250_freq_table), + .reg_tbl = sm8250_reg_preset, + .reg_tbl_size = ARRAY_SIZE(sm8250_reg_preset), + .bw_tbl_enc = sm8250_bw_table_enc, + .bw_tbl_enc_size = ARRAY_SIZE(sm8250_bw_table_enc), + .bw_tbl_dec = sm8250_bw_table_dec, + .bw_tbl_dec_size = ARRAY_SIZE(sm8250_bw_table_dec), + .clks = {"core", "iface"}, + .clks_num = 2, + .resets = { "bus", "core" }, + .resets_num = 2, + .vcodec0_clks = { "vcodec0_core" }, + .vcodec_clks_num = 1, + .vcodec_pmdomains = { "venus", "vcodec0" }, + .vcodec_pmdomains_num = 2, + .opp_pmdomain = (const char *[]) { "mx", NULL }, + .vcodec_num = 1, + .max_load = 7833600, + .hfi_version = HFI_VERSION_6XX, + .vmem_id = VIDC_RESOURCE_NONE, + .vmem_size = 0, + .vmem_addr = 0, + .dma_mask = 0xe0000000 - 1, + .fwname = "qcom/sm8250/venus.mdt", +}; + static const struct of_device_id venus_dt_match[] = { { .compatible = "qcom,msm8916-venus", .data = &msm8916_res, }, { .compatible = "qcom,msm8996-venus", .data = &msm8996_res, }, { .compatible = "qcom,sdm845-venus", .data = &sdm845_res, }, { .compatible = "qcom,sdm845-venus-v2", .data = &sdm845_res_v2, }, { .compatible = "qcom,sc7180-venus", .data = &sc7180_res, }, + { .compatible = "qcom,sm8250-venus", .data = &sm8250_res, }, { } }; MODULE_DEVICE_TABLE(of, venus_dt_match); From patchwork Mon Feb 22 16:02:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385786 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1394977jap; Mon, 22 Feb 2021 08:03:10 -0800 (PST) X-Google-Smtp-Source: ABdhPJyhMyhpyfUb2/4rerEgVi+4rQutJ3Vz9wmDGqR8l3Bc1ri/orZtrEZLyqHcrAu1RoqsWdbi X-Received: by 2002:aa7:dacc:: with SMTP id x12mr20901523eds.98.1614009790480; Mon, 22 Feb 2021 08:03:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009790; cv=none; d=google.com; s=arc-20160816; b=piXIDHMwxFI+qsH5/VHGtDIXEERFq2Evs/PB/TspV7vm0dU3UVmPQ1Q1az0bTBXMKF ZsQkNjjBfAuJiKUqKSQ32xFTs2Wwo4Mcm70DxQHzCS4gFAscswKQe+5bBEdw9pcmmsOZ 6l2S5Z7DM1DiDcu4728+89/mT5XArP23YfiHAxIKLr940BmyTxtggMksmZbqb00v9zhN tjsRvozCpESBSwTIZixjhtiO+0rFY9I7hvknXBAT10RgiRORfdsFYTnAp2xga4qzDK0b u++z2vEy1+n3kuIre7W3jgKh2NyjD9+4O7NvIXBlseOyh5n9qeDKwIvNrehFA4qlLI+s D3hw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=QRtZe5F4rcWmfwWd9LIizIuwy4ZDGtmk3+MGJLo2n50=; b=tA5BAJxQ9/Gq445HtIlcdq4J3fCLEiZ1T1Ru6XvlsVB1fTEBvuX92fhsq06X6JGKKR 58+/ch91CYDFLz6sWX40IOYBdyp2Q6Xb/29HL7LkHo2VS3O1d01T/7U8bRJlHI5tzgBe VuJ0Kqg5ftC9z4ZvKzlHYfd/s3Ph/yjrEgoLNexSrkFqgWIGqCH4VHiAV/4ShrR7/Sml NR5ToV1eyRB6bc1bibDz4swwBhjqXMIC/ggQg2xYRi9gqRIyjcKcLx4QDCz77PF+GaTV JaP35wGnkE/KhhFDH4d8ip0FMrJMtzp3XJdxkYlCyyWGuge+1UD29tYFhZjbWnZbHqLe EayQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MCZ4RYMs; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:40 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 04/25] media: venus: core, pm: Vote for min clk freq during venus boot Date: Mon, 22 Feb 2021 16:02:39 +0000 Message-Id: <20210222160300.1811121-5-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal Vote for min clk frequency for core clks during prepare and enable clocks at boot sequence. Without this the controller clock runs at very low value (9.6MHz) which is not sufficient to boot venus. Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/pm_helpers.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index 4f5d42662963..767cb00d4b46 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -41,10 +41,24 @@ static int core_clks_get(struct venus_core *core) static int core_clks_enable(struct venus_core *core) { const struct venus_resources *res = core->res; + const struct freq_tbl *freq_tbl = NULL; + unsigned int freq_tbl_size = 0; + unsigned long freq = 0; unsigned int i; int ret; + freq_tbl = core->res->freq_tbl; + freq_tbl_size = core->res->freq_tbl_size; + if (!freq_tbl) + return -EINVAL; + + freq = freq_tbl[freq_tbl_size - 1].freq; + for (i = 0; i < res->clks_num; i++) { + ret = clk_set_rate(core->clks[i], freq); + if (ret) + goto err; + ret = clk_prepare_enable(core->clks[i]); if (ret) goto err; From patchwork Mon Feb 22 16:02:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385787 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1394988jap; Mon, 22 Feb 2021 08:03:11 -0800 (PST) X-Google-Smtp-Source: ABdhPJwPCgnsnI2LznPlJXC+jllPR/H2C63WDkt5enAdDUsNBjsKuSu3pR+527mTiHokxzEP1pDm X-Received: by 2002:a17:906:d0c3:: with SMTP id bq3mr21154123ejb.424.1614009790952; Mon, 22 Feb 2021 08:03:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009790; cv=none; d=google.com; s=arc-20160816; b=tAkecOf4xFJu9ynBCDrVgFrIQJ38B4lCsDPuDOiQSAamj1FC4KFyC1BZ2sH7uQCp3y KzBq6mIsXkfcedHn/YGpETrEbhkctRQS3xPJ1dmEJ2fOTD5c5dRPSgbti/ATr64zZSPL 2hQOnAUTsW0EwLmkUnBHmZioPeGyc7v5eCClCnGHJUnk718JELqhute+Xv9O04VH0XKe lH1kRrvghjHRZTfxtx3crNa68Kwj5w9+93YJWu1eKjcqvZnS/+JIiCdg2NMl/2rbruBX F4x0h79JoG1tPSJ8+06lPBVwASviR17spBrFb75uYS6jg3nFSrHf7bQ4Q1BrpHxdESxi 242w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UrnDNLmIZ9amd8uYJ0fitha5/syx30AseXKWJabgDEI=; b=Cpr7RSDfMJ30MA2KYZMS2MeHm4bj+cIfKXgh+so6+XW5yT7I45BujLj5xmejt43eFd CcAzyi4C6/OVzcdw403bglcBmst8DiwHu0k9mbcxRmGUQtVJCG/1Dg0CSCQCGTZjlEfz /ekplpd/d5onW6pL6X+pecMbsmqEiO3t/42yA/zL0b1ywxH9OOMQQEaJLH1R69kurM3N 1yWmKcpWSo7UcATkyF/oEyWy3nCHibLwX6/9rMEVlj8VKFNV4adQlhCX1awLXy2Xcx7u ZhDiQQDSojK69kP2sLeXAuP+X78ev6Vc+brWmXj/wN3eLdQUNeGR+nxlbfsZbDdjdQJA 8aQA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZV3HgtIM; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:41 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 05/25] media: venus: core: Add io base variables for each block Date: Mon, 22 Feb 2021 16:02:40 +0000 Message-Id: <20210222160300.1811121-6-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org New silicon means that the pre-determined offsets we have been using in this driver no longer hold. Existing blocks of registers can exist at different offsets relative to the IO base address. This commit adds a routine to assign the IO base hooks a subsequent commit will convert from absolute to relative addressing. Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/core.c | 12 ++++++++++++ drivers/media/platform/qcom/venus/core.h | 10 ++++++++++ 2 files changed, 22 insertions(+) -- 2.29.2 Acked-by: Stanimir Varbanov diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index 67676f1632ab..01c1828830c7 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -22,6 +22,7 @@ #include "core.h" #include "firmware.h" #include "pm_helpers.h" +#include "hfi_venus_io.h" static void venus_coredump(struct venus_core *core) { @@ -206,6 +207,15 @@ static int venus_enumerate_codecs(struct venus_core *core, u32 type) return ret; } +static void venus_assign_register_offsets(struct venus_core *core) +{ + core->vbif_base = core->base + VBIF_BASE; + core->cpu_base = core->base + CPU_BASE; + core->cpu_cs_base = core->base + CPU_CS_BASE; + core->cpu_ic_base = core->base + CPU_IC_BASE; + core->wrapper_base = core->base + WRAPPER_BASE; +} + static int venus_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -272,6 +282,8 @@ static int venus_probe(struct platform_device *pdev) if (ret) goto err_core_put; + venus_assign_register_offsets(core); + ret = v4l2_device_register(dev, &core->v4l2_dev); if (ret) goto err_core_deinit; diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 771f5bb0981e..1be73c707d21 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -90,6 +90,11 @@ struct venus_format { * struct venus_core - holds core parameters valid for all instances * * @base: IO memory base address + * @vbif_base IO memory vbif base address + * @cpu_base IO memory cpu base address + * @cpu_cs_base IO memory cpu_cs base address + * @cpu_ic_base IO memory cpu_ic base address + * @wrapper_base IO memory wrapper base address * @irq: Venus irq * @clks: an array of struct clk pointers * @vcodec0_clks: an array of vcodec0 struct clk pointers @@ -122,6 +127,11 @@ struct venus_format { */ struct venus_core { void __iomem *base; + void __iomem *vbif_base; + void __iomem *cpu_base; + void __iomem *cpu_cs_base; + void __iomem *cpu_ic_base; + void __iomem *wrapper_base; int irq; struct clk *clks[VIDC_CLKS_NUM_MAX]; struct clk *vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX]; From patchwork Mon Feb 22 16:02:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385788 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1395010jap; Mon, 22 Feb 2021 08:03:12 -0800 (PST) X-Google-Smtp-Source: ABdhPJySip14gVYnhem6ZYlhd/sa9GhfEJ8kZt7Oh0Fk1yNWe+JELgUX/qUgMCR8dcoVzqadIP2v X-Received: by 2002:a17:906:fa06:: with SMTP id lo6mr6500948ejb.339.1614009791981; Mon, 22 Feb 2021 08:03:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009791; cv=none; d=google.com; s=arc-20160816; b=ZvbEMdXpccJW9iqsEo9UbyruU0QC3AxkVFcVtk/UZEysTr9Z5Q9sprB6Ey//XENE5+ lZlzRXlmyG+761Bgc/XBaS9ZiwRhLUan6khs98wyANig99GRqbIdN2LfrGseWMESECTn fXIz199EKOCQ1csVJ/NRhY/qIY+kH/HayURXfozZ/Wn3KG8V9XFXccCsCr/fGQ18WhQO qvx7RTJ66zBxgCxisZKCezA+m9NsP+FU3J1VT0Et88X9HeBanG+f8ERD/caxEMI5Iit4 9cVd+mJM+s44Va9b7LhSEiwMibqXpxp92Gkf0ZSeomUNlcuGxwRVOV/87bF4CaARLnz+ fXLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DtGh6lmRBkXHpoE6osREY4KYjDhaDq7mMqD+UD3vBRs=; b=cx/g3W79z3wIa8Lmn1mnOR9FZ0txH5vEoyShgHtPs5FkFxs69i5hV12zHtsHmElyyV fz2Ffn/oG3w8i8rCNC+NQG1jzRXszp8HUm7oewF9MudADA/keB+7WS+n9fm+6xbbKMaY HZ/YW6x9QtjkzXNQAWyPjFxUqi4TyC/NJteQSpwgf0AKrIQAct6SI6YJ12WdZ2s2YV90 MbGD4G8gSJNdusFVIZLVULOS2AKRBonGVa5sEFf2inUqut7uGh7POZOr3gSccxblLlHr LIoLJY4L4z41LhDoYOoPzh9s3AgC89odAPp5omiO4yjsnY13qGLAdaeVHR7wG6k5hifS CRrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iehjImAY; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:42 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 06/25] media: venus: hfi, pm, firmware: Convert to block relative addressing Date: Mon, 22 Feb 2021 16:02:41 +0000 Message-Id: <20210222160300.1811121-7-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org An upcoming silicon change places a number of existing blocks within the Venus at different relative offsets to the base address of IO region. In order to handle this difference this patch changes the address offsets of the registers to function as offsets relative to the relevant sub-block of registers within the IO region not the base address of the IO region. As a result of this change venus_readl() and venus_writel() are deleted. Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/firmware.c | 28 +++---- drivers/media/platform/qcom/venus/hfi_venus.c | 82 ++++++++++--------- .../media/platform/qcom/venus/hfi_venus_io.h | 80 +++++++++--------- .../media/platform/qcom/venus/pm_helpers.c | 12 +-- 4 files changed, 105 insertions(+), 97 deletions(-) -- 2.29.2 Acked-by: Stanimir Varbanov diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c index 89defc21ea81..f9170f596849 100644 --- a/drivers/media/platform/qcom/venus/firmware.c +++ b/drivers/media/platform/qcom/venus/firmware.c @@ -27,19 +27,19 @@ static void venus_reset_cpu(struct venus_core *core) { u32 fw_size = core->fw.mapped_mem_size; - void __iomem *base = core->base; + void __iomem *wrapper_base = core->wrapper_base; - writel(0, base + WRAPPER_FW_START_ADDR); - writel(fw_size, base + WRAPPER_FW_END_ADDR); - writel(0, base + WRAPPER_CPA_START_ADDR); - writel(fw_size, base + WRAPPER_CPA_END_ADDR); - writel(fw_size, base + WRAPPER_NONPIX_START_ADDR); - writel(fw_size, base + WRAPPER_NONPIX_END_ADDR); - writel(0x0, base + WRAPPER_CPU_CGC_DIS); - writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG); + writel(0, wrapper_base + WRAPPER_FW_START_ADDR); + writel(fw_size, wrapper_base + WRAPPER_FW_END_ADDR); + writel(0, wrapper_base + WRAPPER_CPA_START_ADDR); + writel(fw_size, wrapper_base + WRAPPER_CPA_END_ADDR); + writel(fw_size, wrapper_base + WRAPPER_NONPIX_START_ADDR); + writel(fw_size, wrapper_base + WRAPPER_NONPIX_END_ADDR); + writel(0x0, wrapper_base + WRAPPER_CPU_CGC_DIS); + writel(0x0, wrapper_base + WRAPPER_CPU_CLOCK_CONFIG); /* Bring ARM9 out of reset */ - writel(0, base + WRAPPER_A9SS_SW_RESET); + writel(0, wrapper_base + WRAPPER_A9SS_SW_RESET); } int venus_set_hw_state(struct venus_core *core, bool resume) @@ -56,7 +56,7 @@ int venus_set_hw_state(struct venus_core *core, bool resume) if (resume) venus_reset_cpu(core); else - writel(1, core->base + WRAPPER_A9SS_SW_RESET); + writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET); return 0; } @@ -159,12 +159,12 @@ static int venus_shutdown_no_tz(struct venus_core *core) size_t unmapped; u32 reg; struct device *dev = core->fw.dev; - void __iomem *base = core->base; + void __iomem *wrapper_base = core->wrapper_base; /* Assert the reset to ARM9 */ - reg = readl_relaxed(base + WRAPPER_A9SS_SW_RESET); + reg = readl_relaxed(wrapper_base + WRAPPER_A9SS_SW_RESET); reg |= WRAPPER_A9SS_SW_RESET_BIT; - writel_relaxed(reg, base + WRAPPER_A9SS_SW_RESET); + writel_relaxed(reg, wrapper_base + WRAPPER_A9SS_SW_RESET); /* Make sure reset is asserted before the mapping is removed */ mb(); diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index 50e03f8fc278..f95cdd3d530c 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -345,16 +345,6 @@ static void venus_free(struct venus_hfi_device *hdev, struct mem_desc *mem) dma_free_attrs(dev, mem->size, mem->kva, mem->da, mem->attrs); } -static void venus_writel(struct venus_hfi_device *hdev, u32 reg, u32 value) -{ - writel(value, hdev->core->base + reg); -} - -static u32 venus_readl(struct venus_hfi_device *hdev, u32 reg) -{ - return readl(hdev->core->base + reg); -} - static void venus_set_registers(struct venus_hfi_device *hdev) { const struct venus_resources *res = hdev->core->res; @@ -363,12 +353,14 @@ static void venus_set_registers(struct venus_hfi_device *hdev) unsigned int i; for (i = 0; i < count; i++) - venus_writel(hdev, tbl[i].reg, tbl[i].value); + writel(tbl[i].value, hdev->core->base + tbl[i].reg); } static void venus_soft_int(struct venus_hfi_device *hdev) { - venus_writel(hdev, CPU_IC_SOFTINT, BIT(CPU_IC_SOFTINT_H2A_SHIFT)); + void __iomem *cpu_ic_base = hdev->core->cpu_ic_base; + + writel(BIT(CPU_IC_SOFTINT_H2A_SHIFT), cpu_ic_base + CPU_IC_SOFTINT); } static int venus_iface_cmdq_write_nolock(struct venus_hfi_device *hdev, @@ -452,14 +444,16 @@ static int venus_boot_core(struct venus_hfi_device *hdev) static const unsigned int max_tries = 100; u32 ctrl_status = 0; unsigned int count = 0; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + void __iomem *wrapper_base = hdev->core->wrapper_base; int ret = 0; - venus_writel(hdev, VIDC_CTRL_INIT, BIT(VIDC_CTRL_INIT_CTRL_SHIFT)); - venus_writel(hdev, WRAPPER_INTR_MASK, WRAPPER_INTR_MASK_A2HVCODEC_MASK); - venus_writel(hdev, CPU_CS_SCIACMDARG3, 1); + writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT); + writel(WRAPPER_INTR_MASK_A2HVCODEC_MASK, wrapper_base + WRAPPER_INTR_MASK); + writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3); while (!ctrl_status && count < max_tries) { - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if ((ctrl_status & CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK) == 4) { dev_err(dev, "invalid setting for UC_REGION\n"); ret = -EINVAL; @@ -479,9 +473,11 @@ static int venus_boot_core(struct venus_hfi_device *hdev) static u32 venus_hwversion(struct venus_hfi_device *hdev) { struct device *dev = hdev->core->dev; - u32 ver = venus_readl(hdev, WRAPPER_HW_VERSION); + void __iomem *wrapper_base = hdev->core->wrapper_base; + u32 ver; u32 major, minor, step; + ver = readl(wrapper_base + WRAPPER_HW_VERSION); major = ver & WRAPPER_HW_VERSION_MAJOR_VERSION_MASK; major = major >> WRAPPER_HW_VERSION_MAJOR_VERSION_SHIFT; minor = ver & WRAPPER_HW_VERSION_MINOR_VERSION_MASK; @@ -496,6 +492,7 @@ static u32 venus_hwversion(struct venus_hfi_device *hdev) static int venus_run(struct venus_hfi_device *hdev) { struct device *dev = hdev->core->dev; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; int ret; /* @@ -504,12 +501,12 @@ static int venus_run(struct venus_hfi_device *hdev) */ venus_set_registers(hdev); - venus_writel(hdev, UC_REGION_ADDR, hdev->ifaceq_table.da); - venus_writel(hdev, UC_REGION_SIZE, SHARED_QSIZE); - venus_writel(hdev, CPU_CS_SCIACMDARG2, hdev->ifaceq_table.da); - venus_writel(hdev, CPU_CS_SCIACMDARG1, 0x01); + writel(hdev->ifaceq_table.da, cpu_cs_base + UC_REGION_ADDR); + writel(SHARED_QSIZE, cpu_cs_base + UC_REGION_SIZE); + writel(hdev->ifaceq_table.da, cpu_cs_base + CPU_CS_SCIACMDARG2); + writel(0x01, cpu_cs_base + CPU_CS_SCIACMDARG1); if (hdev->sfr.da) - venus_writel(hdev, SFR_ADDR, hdev->sfr.da); + writel(hdev->sfr.da, cpu_cs_base + SFR_ADDR); ret = venus_boot_core(hdev); if (ret) { @@ -524,17 +521,18 @@ static int venus_run(struct venus_hfi_device *hdev) static int venus_halt_axi(struct venus_hfi_device *hdev) { - void __iomem *base = hdev->core->base; + void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *vbif_base = hdev->core->vbif_base; struct device *dev = hdev->core->dev; u32 val; int ret; if (IS_V4(hdev->core)) { - val = venus_readl(hdev, WRAPPER_CPU_AXI_HALT); + val = readl(wrapper_base + WRAPPER_CPU_AXI_HALT); val |= WRAPPER_CPU_AXI_HALT_HALT; - venus_writel(hdev, WRAPPER_CPU_AXI_HALT, val); + writel(val, wrapper_base + WRAPPER_CPU_AXI_HALT); - ret = readl_poll_timeout(base + WRAPPER_CPU_AXI_HALT_STATUS, + ret = readl_poll_timeout(wrapper_base + WRAPPER_CPU_AXI_HALT_STATUS, val, val & WRAPPER_CPU_AXI_HALT_STATUS_IDLE, POLL_INTERVAL_US, @@ -548,12 +546,12 @@ static int venus_halt_axi(struct venus_hfi_device *hdev) } /* Halt AXI and AXI IMEM VBIF Access */ - val = venus_readl(hdev, VBIF_AXI_HALT_CTRL0); + val = readl(vbif_base + VBIF_AXI_HALT_CTRL0); val |= VBIF_AXI_HALT_CTRL0_HALT_REQ; - venus_writel(hdev, VBIF_AXI_HALT_CTRL0, val); + writel(val, vbif_base + VBIF_AXI_HALT_CTRL0); /* Request for AXI bus port halt */ - ret = readl_poll_timeout(base + VBIF_AXI_HALT_CTRL1, val, + ret = readl_poll_timeout(vbif_base + VBIF_AXI_HALT_CTRL1, val, val & VBIF_AXI_HALT_CTRL1_HALT_ACK, POLL_INTERVAL_US, VBIF_AXI_HALT_ACK_TIMEOUT_US); @@ -1046,19 +1044,21 @@ static irqreturn_t venus_isr(struct venus_core *core) { struct venus_hfi_device *hdev = to_hfi_priv(core); u32 status; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + void __iomem *wrapper_base = hdev->core->wrapper_base; if (!hdev) return IRQ_NONE; - status = venus_readl(hdev, WRAPPER_INTR_STATUS); + status = readl(wrapper_base + WRAPPER_INTR_STATUS); if (status & WRAPPER_INTR_STATUS_A2H_MASK || status & WRAPPER_INTR_STATUS_A2HWD_MASK || status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) hdev->irq_status = status; - venus_writel(hdev, CPU_CS_A2HSOFTINTCLR, 1); - venus_writel(hdev, WRAPPER_INTR_CLEAR, status); + writel(1, cpu_cs_base + CPU_CS_A2HSOFTINTCLR); + writel(status, wrapper_base + WRAPPER_INTR_CLEAR); return IRQ_WAKE_THREAD; } @@ -1391,6 +1391,7 @@ static int venus_suspend_1xx(struct venus_core *core) { struct venus_hfi_device *hdev = to_hfi_priv(core); struct device *dev = core->dev; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status; int ret; @@ -1425,7 +1426,7 @@ static int venus_suspend_1xx(struct venus_core *core) return -EINVAL; } - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (!(ctrl_status & CPU_CS_SCIACMDARG0_PC_READY)) { mutex_unlock(&hdev->lock); return -EINVAL; @@ -1446,10 +1447,12 @@ static int venus_suspend_1xx(struct venus_core *core) static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) { + void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status, cpu_status; - cpu_status = venus_readl(hdev, WRAPPER_CPU_STATUS); - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (cpu_status & WRAPPER_CPU_STATUS_WFI && ctrl_status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) @@ -1460,10 +1463,12 @@ static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) static bool venus_cpu_idle_and_pc_ready(struct venus_hfi_device *hdev) { + void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status, cpu_status; - cpu_status = venus_readl(hdev, WRAPPER_CPU_STATUS); - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (cpu_status & WRAPPER_CPU_STATUS_WFI && ctrl_status & CPU_CS_SCIACMDARG0_PC_READY) @@ -1476,6 +1481,7 @@ static int venus_suspend_3xx(struct venus_core *core) { struct venus_hfi_device *hdev = to_hfi_priv(core); struct device *dev = core->dev; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status; bool val; int ret; @@ -1492,7 +1498,7 @@ static int venus_suspend_3xx(struct venus_core *core) return -EINVAL; } - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (ctrl_status & CPU_CS_SCIACMDARG0_PC_READY) goto power_off; diff --git a/drivers/media/platform/qcom/venus/hfi_venus_io.h b/drivers/media/platform/qcom/venus/hfi_venus_io.h index 3b52f98478db..4c392b67252c 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus_io.h +++ b/drivers/media/platform/qcom/venus/hfi_venus_io.h @@ -8,27 +8,28 @@ #define VBIF_BASE 0x80000 -#define VBIF_AXI_HALT_CTRL0 (VBIF_BASE + 0x208) -#define VBIF_AXI_HALT_CTRL1 (VBIF_BASE + 0x20c) +#define VBIF_AXI_HALT_CTRL0 0x208 +#define VBIF_AXI_HALT_CTRL1 0x20c #define VBIF_AXI_HALT_CTRL0_HALT_REQ BIT(0) #define VBIF_AXI_HALT_CTRL1_HALT_ACK BIT(0) #define VBIF_AXI_HALT_ACK_TIMEOUT_US 500000 #define CPU_BASE 0xc0000 + #define CPU_CS_BASE (CPU_BASE + 0x12000) #define CPU_IC_BASE (CPU_BASE + 0x1f000) -#define CPU_CS_A2HSOFTINTCLR (CPU_CS_BASE + 0x1c) +#define CPU_CS_A2HSOFTINTCLR 0x1c -#define VIDC_CTRL_INIT (CPU_CS_BASE + 0x48) +#define VIDC_CTRL_INIT 0x48 #define VIDC_CTRL_INIT_RESERVED_BITS31_1_MASK 0xfffffffe #define VIDC_CTRL_INIT_RESERVED_BITS31_1_SHIFT 1 #define VIDC_CTRL_INIT_CTRL_MASK 0x1 #define VIDC_CTRL_INIT_CTRL_SHIFT 0 /* HFI control status */ -#define CPU_CS_SCIACMDARG0 (CPU_CS_BASE + 0x4c) +#define CPU_CS_SCIACMDARG0 0x4c #define CPU_CS_SCIACMDARG0_MASK 0xff #define CPU_CS_SCIACMDARG0_SHIFT 0x0 #define CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK 0xfe @@ -39,42 +40,43 @@ #define CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK BIT(30) /* HFI queue table info */ -#define CPU_CS_SCIACMDARG1 (CPU_CS_BASE + 0x50) +#define CPU_CS_SCIACMDARG1 0x50 /* HFI queue table address */ -#define CPU_CS_SCIACMDARG2 (CPU_CS_BASE + 0x54) +#define CPU_CS_SCIACMDARG2 0x54 /* Venus cpu */ -#define CPU_CS_SCIACMDARG3 (CPU_CS_BASE + 0x58) +#define CPU_CS_SCIACMDARG3 0x58 -#define SFR_ADDR (CPU_CS_BASE + 0x5c) -#define MMAP_ADDR (CPU_CS_BASE + 0x60) -#define UC_REGION_ADDR (CPU_CS_BASE + 0x64) -#define UC_REGION_SIZE (CPU_CS_BASE + 0x68) +#define SFR_ADDR 0x5c +#define MMAP_ADDR 0x60 +#define UC_REGION_ADDR 0x64 +#define UC_REGION_SIZE 0x68 -#define CPU_IC_SOFTINT (CPU_IC_BASE + 0x18) +/* Relative to CPU_IC_BASE */ +#define CPU_IC_SOFTINT 0x18 #define CPU_IC_SOFTINT_H2A_MASK 0x8000 #define CPU_IC_SOFTINT_H2A_SHIFT 0xf /* Venus wrapper */ #define WRAPPER_BASE 0x000e0000 -#define WRAPPER_HW_VERSION (WRAPPER_BASE + 0x00) +#define WRAPPER_HW_VERSION 0x00 #define WRAPPER_HW_VERSION_MAJOR_VERSION_MASK 0x78000000 #define WRAPPER_HW_VERSION_MAJOR_VERSION_SHIFT 28 #define WRAPPER_HW_VERSION_MINOR_VERSION_MASK 0xfff0000 #define WRAPPER_HW_VERSION_MINOR_VERSION_SHIFT 16 #define WRAPPER_HW_VERSION_STEP_VERSION_MASK 0xffff -#define WRAPPER_CLOCK_CONFIG (WRAPPER_BASE + 0x04) +#define WRAPPER_CLOCK_CONFIG 0x04 -#define WRAPPER_INTR_STATUS (WRAPPER_BASE + 0x0c) +#define WRAPPER_INTR_STATUS 0x0c #define WRAPPER_INTR_STATUS_A2HWD_MASK 0x10 #define WRAPPER_INTR_STATUS_A2HWD_SHIFT 0x4 #define WRAPPER_INTR_STATUS_A2H_MASK 0x4 #define WRAPPER_INTR_STATUS_A2H_SHIFT 0x2 -#define WRAPPER_INTR_MASK (WRAPPER_BASE + 0x10) +#define WRAPPER_INTR_MASK 0x10 #define WRAPPER_INTR_MASK_A2HWD_BASK 0x10 #define WRAPPER_INTR_MASK_A2HWD_SHIFT 0x4 #define WRAPPER_INTR_MASK_A2HVCODEC_MASK 0x8 @@ -82,41 +84,41 @@ #define WRAPPER_INTR_MASK_A2HCPU_MASK 0x4 #define WRAPPER_INTR_MASK_A2HCPU_SHIFT 0x2 -#define WRAPPER_INTR_CLEAR (WRAPPER_BASE + 0x14) +#define WRAPPER_INTR_CLEAR 0x14 #define WRAPPER_INTR_CLEAR_A2HWD_MASK 0x10 #define WRAPPER_INTR_CLEAR_A2HWD_SHIFT 0x4 #define WRAPPER_INTR_CLEAR_A2H_MASK 0x4 #define WRAPPER_INTR_CLEAR_A2H_SHIFT 0x2 -#define WRAPPER_POWER_STATUS (WRAPPER_BASE + 0x44) -#define WRAPPER_VDEC_VCODEC_POWER_CONTROL (WRAPPER_BASE + 0x48) -#define WRAPPER_VENC_VCODEC_POWER_CONTROL (WRAPPER_BASE + 0x4c) -#define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET (WRAPPER_BASE + 0x64) +#define WRAPPER_POWER_STATUS 0x44 +#define WRAPPER_VDEC_VCODEC_POWER_CONTROL 0x48 +#define WRAPPER_VENC_VCODEC_POWER_CONTROL 0x4c +#define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64 -#define WRAPPER_CPU_CLOCK_CONFIG (WRAPPER_BASE + 0x2000) -#define WRAPPER_CPU_AXI_HALT (WRAPPER_BASE + 0x2008) +#define WRAPPER_CPU_CLOCK_CONFIG 0x2000 +#define WRAPPER_CPU_AXI_HALT 0x2008 #define WRAPPER_CPU_AXI_HALT_HALT BIT(16) -#define WRAPPER_CPU_AXI_HALT_STATUS (WRAPPER_BASE + 0x200c) +#define WRAPPER_CPU_AXI_HALT_STATUS 0x200c #define WRAPPER_CPU_AXI_HALT_STATUS_IDLE BIT(24) -#define WRAPPER_CPU_CGC_DIS (WRAPPER_BASE + 0x2010) -#define WRAPPER_CPU_STATUS (WRAPPER_BASE + 0x2014) +#define WRAPPER_CPU_CGC_DIS 0x2010 +#define WRAPPER_CPU_STATUS 0x2014 #define WRAPPER_CPU_STATUS_WFI BIT(0) -#define WRAPPER_SW_RESET (WRAPPER_BASE + 0x3000) -#define WRAPPER_CPA_START_ADDR (WRAPPER_BASE + 0x1020) -#define WRAPPER_CPA_END_ADDR (WRAPPER_BASE + 0x1024) -#define WRAPPER_FW_START_ADDR (WRAPPER_BASE + 0x1028) -#define WRAPPER_FW_END_ADDR (WRAPPER_BASE + 0x102C) -#define WRAPPER_NONPIX_START_ADDR (WRAPPER_BASE + 0x1030) -#define WRAPPER_NONPIX_END_ADDR (WRAPPER_BASE + 0x1034) -#define WRAPPER_A9SS_SW_RESET (WRAPPER_BASE + 0x3000) +#define WRAPPER_SW_RESET 0x3000 +#define WRAPPER_CPA_START_ADDR 0x1020 +#define WRAPPER_CPA_END_ADDR 0x1024 +#define WRAPPER_FW_START_ADDR 0x1028 +#define WRAPPER_FW_END_ADDR 0x102C +#define WRAPPER_NONPIX_START_ADDR 0x1030 +#define WRAPPER_NONPIX_END_ADDR 0x1034 +#define WRAPPER_A9SS_SW_RESET 0x3000 #define WRAPPER_A9SS_SW_RESET_BIT BIT(4) /* Venus 4xx */ -#define WRAPPER_VCODEC0_MMCC_POWER_STATUS (WRAPPER_BASE + 0x90) -#define WRAPPER_VCODEC0_MMCC_POWER_CONTROL (WRAPPER_BASE + 0x94) +#define WRAPPER_VCODEC0_MMCC_POWER_STATUS 0x90 +#define WRAPPER_VCODEC0_MMCC_POWER_CONTROL 0x94 -#define WRAPPER_VCODEC1_MMCC_POWER_STATUS (WRAPPER_BASE + 0x110) -#define WRAPPER_VCODEC1_MMCC_POWER_CONTROL (WRAPPER_BASE + 0x114) +#define WRAPPER_VCODEC1_MMCC_POWER_STATUS 0x110 +#define WRAPPER_VCODEC1_MMCC_POWER_CONTROL 0x114 #endif diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index 767cb00d4b46..ea08b4d71e39 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -321,9 +321,9 @@ vcodec_control_v3(struct venus_core *core, u32 session_type, bool enable) void __iomem *ctrl; if (session_type == VIDC_SESSION_TYPE_DEC) - ctrl = core->base + WRAPPER_VDEC_VCODEC_POWER_CONTROL; + ctrl = core->wrapper_base + WRAPPER_VDEC_VCODEC_POWER_CONTROL; else - ctrl = core->base + WRAPPER_VENC_VCODEC_POWER_CONTROL; + ctrl = core->wrapper_base + WRAPPER_VENC_VCODEC_POWER_CONTROL; if (enable) writel(0, ctrl); @@ -398,11 +398,11 @@ static int vcodec_control_v4(struct venus_core *core, u32 coreid, bool enable) int ret; if (coreid == VIDC_CORE_ID_1) { - ctrl = core->base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; - stat = core->base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; + ctrl = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; + stat = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; } else { - ctrl = core->base + WRAPPER_VCODEC1_MMCC_POWER_CONTROL; - stat = core->base + WRAPPER_VCODEC1_MMCC_POWER_STATUS; + ctrl = core->wrapper_base + WRAPPER_VCODEC1_MMCC_POWER_CONTROL; + stat = core->wrapper_base + WRAPPER_VCODEC1_MMCC_POWER_STATUS; } if (enable) { From patchwork Mon Feb 22 16:02:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 979EAC4332E for ; Mon, 22 Feb 2021 16:05:04 +0000 (UTC) Received: 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:43 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 07/25] media: venus: hfi: Define block offsets for V6 hardware Date: Mon, 22 Feb 2021 16:02:42 +0000 Message-Id: <20210222160300.1811121-8-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal This commit defines a range of new base addresses for already defined blocks. - CPU_BASE_V6 - CPU_CS_BASE_V6 - CPU_IC_BASE_V6 - WRAPPER_BASE_V6 The base addresses of the blocks are slightly different for 6xx but, aside from that are layout and bit compatible. New 6xx specific block addresses will be added in separate commits. Signed-off-by: Dikshita Agarwal Co-developed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/hfi_venus_io.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/media/platform/qcom/venus/hfi_venus_io.h b/drivers/media/platform/qcom/venus/hfi_venus_io.h index 4c392b67252c..8604b213f03f 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus_io.h +++ b/drivers/media/platform/qcom/venus/hfi_venus_io.h @@ -19,6 +19,9 @@ #define CPU_CS_BASE (CPU_BASE + 0x12000) #define CPU_IC_BASE (CPU_BASE + 0x1f000) +#define CPU_BASE_V6 0xa0000 +#define CPU_CS_BASE_V6 CPU_BASE_V6 +#define CPU_IC_BASE_V6 (CPU_BASE_V6 + 0x138) #define CPU_CS_A2HSOFTINTCLR 0x1c @@ -59,6 +62,7 @@ #define CPU_IC_SOFTINT_H2A_SHIFT 0xf /* Venus wrapper */ +#define WRAPPER_BASE_V6 0x000b0000 #define WRAPPER_BASE 0x000e0000 #define WRAPPER_HW_VERSION 0x00 From patchwork Mon Feb 22 16:02:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385863 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70897C4332D for ; Mon, 22 Feb 2021 16:05:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 39BB864EEC for ; Mon, 22 Feb 2021 16:05:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231384AbhBVQEx (ORCPT ); Mon, 22 Feb 2021 11:04:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231373AbhBVQDo (ORCPT ); Mon, 22 Feb 2021 11:03:44 -0500 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64543C061221 for ; Mon, 22 Feb 2021 08:01:46 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id l30so3948151wrb.12 for ; Mon, 22 Feb 2021 08:01:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TZXmenqt0ijvvBP3sQrcFDHSDmrD0KkT9IFar9xeBfk=; b=XrfM1K87grNlRlkqyD9EoiT4Yh0K01nFBPIEiyGdsTBGdl94X+a+3JV0quvGkMF/oU zPZY/VolNjydaYbAzSypSkUYO5Gsypu1jRNFb+dADrCEseMti6uQ7uMupFcJquTE/2fK 1noZukbSbPkagOGLa99o1SxZ+nBV+8+AYYcVv45xbfz2iqjjuH/S3IWB27gHotZPk6pd Xf2BI8Q+63mr9eNBoFMoxu+eM7mpQ8PPVr5qfPqy5PVibJfpWRTu0d0YYys+s18gyY25 ghuVzAWhuryprTdcTWW7oOnwKEYoDzUUVSZHGWPQ/qJuUMIyXRvUYPbBo66+mcHCYNlB 0lYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TZXmenqt0ijvvBP3sQrcFDHSDmrD0KkT9IFar9xeBfk=; b=sD6HC/r0hFM3GF3YmkgRObsWS5wWSpzvzLcNBnsO95hM3DW25ILUnwrwJr2DxGADOI zSw9lk9wglmawiHc9fr/JokvYoXwC6GKY5C45XBTyD6MDJfKh+suR+p8KCPcvfsl9dux 2yfN1PzPeuzBeFSST717iZ8zv2DsiYr2erYlB0+c/Kc3XCGnnlh4QfaAc8w+CgPzMh77 14D3LU6LHqN5glIqGcapYAHCoHZDx4OZaHStsJ7N/3efC6wkVv6MTnXW+r5NjdoxDepd fDMcKiA+H+yi9R/U7sPv/tjU2ZwmgQNszM+LTwmnh73zwDh52rZs7FRnu6MlRzSukIlh wlcQ== X-Gm-Message-State: AOAM532Fo/hOjIYogdzfR7rIMBY3oo3eB8FmLV2U+UWOLwgF6dlcCwcs lOegeBWxGoRrcE1tlAXz9PFhaQ== X-Google-Smtp-Source: ABdhPJzGyzBKAC7laa2I44u8k6zXekxOl0t+Aa3j+hpA9EAaIvvGLBFihU3VpJZh9V0lVNRZ5zyK/w== X-Received: by 2002:a5d:6d0c:: with SMTP id e12mr21551736wrq.136.1614009705220; Mon, 22 Feb 2021 08:01:45 -0800 (PST) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:44 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 08/25] media: venus: hfi: Define additional 6xx registers Date: Mon, 22 Feb 2021 16:02:43 +0000 Message-Id: <20210222160300.1811121-9-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal - Add X2 RPMh registers and definitions from the downstream example. - Add 6xx core power definitions - Add 6xx AON definitions - Add 6xx wrapper tz definitions - Add 6xx wrapper interrupt definitions - Add 6xx soft interrupt definitions - Define wrapper LPI register offsets Signed-off-by: Dikshita Agarwal Co-developed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue --- .../media/platform/qcom/venus/hfi_venus_io.h | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/media/platform/qcom/venus/hfi_venus_io.h b/drivers/media/platform/qcom/venus/hfi_venus_io.h index 8604b213f03f..300c6e47e72f 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus_io.h +++ b/drivers/media/platform/qcom/venus/hfi_venus_io.h @@ -56,10 +56,22 @@ #define UC_REGION_ADDR 0x64 #define UC_REGION_SIZE 0x68 +#define CPU_CS_H2XSOFTINTEN_V6 0x148 + +#define CPU_CS_X2RPMH_V6 0x168 +#define CPU_CS_X2RPMH_MASK0_BMSK_V6 0x1 +#define CPU_CS_X2RPMH_MASK0_SHFT_V6 0x0 +#define CPU_CS_X2RPMH_MASK1_BMSK_V6 0x2 +#define CPU_CS_X2RPMH_MASK1_SHFT_V6 0x1 +#define CPU_CS_X2RPMH_SWOVERRIDE_BMSK_V6 0x4 +#define CPU_CS_X2RPMH_SWOVERRIDE_SHFT_V6 0x3 + /* Relative to CPU_IC_BASE */ #define CPU_IC_SOFTINT 0x18 +#define CPU_IC_SOFTINT_V6 0x150 #define CPU_IC_SOFTINT_H2A_MASK 0x8000 #define CPU_IC_SOFTINT_H2A_SHIFT 0xf +#define CPU_IC_SOFTINT_H2A_SHIFT_V6 0x0 /* Venus wrapper */ #define WRAPPER_BASE_V6 0x000b0000 @@ -88,6 +100,9 @@ #define WRAPPER_INTR_MASK_A2HCPU_MASK 0x4 #define WRAPPER_INTR_MASK_A2HCPU_SHIFT 0x2 +#define WRAPPER_INTR_STATUS_A2HWD_MASK_V6 0x8 +#define WRAPPER_INTR_MASK_A2HWD_BASK_V6 0x8 + #define WRAPPER_INTR_CLEAR 0x14 #define WRAPPER_INTR_CLEAR_A2HWD_MASK 0x10 #define WRAPPER_INTR_CLEAR_A2HWD_SHIFT 0x4 @@ -97,6 +112,8 @@ #define WRAPPER_POWER_STATUS 0x44 #define WRAPPER_VDEC_VCODEC_POWER_CONTROL 0x48 #define WRAPPER_VENC_VCODEC_POWER_CONTROL 0x4c +#define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6 0x54 +#define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6 0x58 #define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64 #define WRAPPER_CPU_CLOCK_CONFIG 0x2000 @@ -125,4 +142,17 @@ #define WRAPPER_VCODEC1_MMCC_POWER_STATUS 0x110 #define WRAPPER_VCODEC1_MMCC_POWER_CONTROL 0x114 +/* Venus 6xx */ +#define WRAPPER_CORE_POWER_STATUS_V6 0x80 +#define WRAPPER_CORE_POWER_CONTROL_V6 0x84 + +/* Wrapper TZ 6xx */ +#define WRAPPER_TZ_BASE_V6 0x000c0000 +#define WRAPPER_TZ_CPU_STATUS_V6 0x10 + +/* Venus AON */ +#define AON_BASE_V6 0x000e0000 +#define AON_WRAPPER_MVP_NOC_LPI_CONTROL 0x00 +#define AON_WRAPPER_MVP_NOC_LPI_STATUS 0x04 + #endif From patchwork Mon Feb 22 16:02:44 2021 Content-Type: text/plain; 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:45 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 09/25] media: venus: core: Add differentiator IS_V6(core) Date: Mon, 22 Feb 2021 16:02:44 +0000 Message-Id: <20210222160300.1811121-10-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This commit adds the macro helper IS_V6() which will be used to differentiate iris2/v6 silicon from previous versions. Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/core.h | 1 + 1 file changed, 1 insertion(+) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 1be73c707d21..0c90f48323f2 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -417,6 +417,7 @@ struct venus_inst { #define IS_V1(core) ((core)->res->hfi_version == HFI_VERSION_1XX) #define IS_V3(core) ((core)->res->hfi_version == HFI_VERSION_3XX) #define IS_V4(core) ((core)->res->hfi_version == HFI_VERSION_4XX) +#define IS_V6(core) ((core)->res->hfi_version == HFI_VERSION_6XX) #define ctrl_to_inst(ctrl) \ container_of((ctrl)->handler, struct venus_inst, ctrl_handler) From patchwork Mon Feb 22 16:02:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385800 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1396698jap; Mon, 22 Feb 2021 08:04:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJyq7WEM8ZnkYlej9fgNg7J6drRMz9hRRhbnCWgdyUuUKzHBfMUd+qKp7kkexMSUe/ppnmrt X-Received: by 2002:a05:6402:a54:: with SMTP id bt20mr8635281edb.96.1614009898977; Mon, 22 Feb 2021 08:04:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009898; cv=none; d=google.com; s=arc-20160816; b=sM7SHfbDxoPwPa638h81ABs0ag4WE5zTArTUnfY+W7kvasM4DVs1uZ9yT5pHGRaijR s1BIjVEfoQS/SfPq7FoK10zaaKWF+05zFBJPuxuUYVPC85ANO6S5RZxdKiq6IYGwmR/q fauJLLrNUc5kqREjjIcjawq9fFH8Gm+1J4q0AwjpOh6Ol5yyit1iKGB450mP1xYEiSUu G+4ROzDwwEPlhYAgtr0DgDGlLRzO0NYW5lARKlGdESQT/ubyiP7l32hU/9/JO/r733qA THyqQCmkdAshjN6b/UEp2BmkLaN4JW42Txd52pdBEeUz9Pn/ITQPmQeWRl+g26lXDXWM i8xw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=lciWFaVyAjUGcLf/UXnkqFKZDeRxBKQIFgTCiBjIihg=; b=VlG8YNM8da4zaP0X1+SjDvgcLgPi18z5WQRh+GwWNb80R+4PtQwhkmqnAxVWSD/DAK QlZSXO27IwNwzg2Cjvd/D2NN086gwadagf/2uCUUcnjktl7xkhhsx4f+c3sbA9uoUtJn abcqMl7JlyajawXlPJAuBp+swudxn1hJ5n4XuD+mQYfvqKE9Vll/SO2yoeBdqke4zONG uERS7TlxixkihdyVGIPQTweF6RG7L3Xre+O+Xk6gJ9m7ZDrV/lcSFa7FrckUzLsv3cdO aNwvPCVtY6tXERfQGcu7MqJ3vo+vBbCie6GyufEFDqsQoxUxiBgGBKpqNTyTGcyNeWSa Zb2Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x21gKUiS; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:46 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 10/25] media: venus: core: Add an io base for TZ wrapper regs Date: Mon, 22 Feb 2021 16:02:45 +0000 Message-Id: <20210222160300.1811121-11-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org 6xx silicon needs to access registers from a wrapper trust-zone base address range. This commit defines the necessary variable for later use. Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/core.c | 1 + drivers/media/platform/qcom/venus/core.h | 2 ++ 2 files changed, 3 insertions(+) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index 01c1828830c7..35a8956fe969 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -214,6 +214,7 @@ static void venus_assign_register_offsets(struct venus_core *core) core->cpu_cs_base = core->base + CPU_CS_BASE; core->cpu_ic_base = core->base + CPU_IC_BASE; core->wrapper_base = core->base + WRAPPER_BASE; + core->wrapper_tz_base = 0; } static int venus_probe(struct platform_device *pdev) diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 0c90f48323f2..54e6cd89b30a 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -95,6 +95,7 @@ struct venus_format { * @cpu_cs_base IO memory cpu_cs base address * @cpu_ic_base IO memory cpu_ic base address * @wrapper_base IO memory wrapper base address + * @wrapper_base IO memory wrapper TZ base address * @irq: Venus irq * @clks: an array of struct clk pointers * @vcodec0_clks: an array of vcodec0 struct clk pointers @@ -132,6 +133,7 @@ struct venus_core { void __iomem *cpu_cs_base; void __iomem *cpu_ic_base; void __iomem *wrapper_base; + void __iomem *wrapper_tz_base; int irq; struct clk *clks[VIDC_CLKS_NUM_MAX]; struct clk *vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX]; From patchwork Mon Feb 22 16:02:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385792 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1395374jap; Mon, 22 Feb 2021 08:03:34 -0800 (PST) X-Google-Smtp-Source: ABdhPJzsEbyZpTaCwvqj3zB2yyN79Ak0WIDOa8auswp/g6hdOvV6u7lJLyn4Kr4F3YRKF388Jfmr X-Received: by 2002:a50:d946:: with SMTP id u6mr23094224edj.239.1614009814780; Mon, 22 Feb 2021 08:03:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009814; cv=none; d=google.com; s=arc-20160816; b=smEAkq5hc4HpuWgZ3oFhhMdvKZHe5jnfaBJxm+WaPFpnYA11Ohq2XNmwsrot7bw8vU qh/LAhDtkaX9e69LT9engJt4okq2DbC8WuzIs4tHf6fb7V1nCQTSuPFf4cn/n4ZXoIqQ hLCavJhXnLJT55QwLz4Spyz1V6tmIhAteqUyNguAYKF0a4zTeUF5i0iihgHNpEYmQXsn x+oi6ntC0GlHOaDWIBsO+YNCB+UkS7CGotIfT6e/ZwZLP9a4m1dATJK8ZeDDu0aEYM91 CUuGx3qF8sKTMgLBMRnIa/DJAkaTmZbPSFM102j60313pLLL3PW+m63DySUOyps/EzxC nZcA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=X/puQRm1/H6m4WNnTmXYDqGRONSIKPTs3nt8rX8xbO0=; b=gUpHHe6Y3l1513HSqH+jB+Hqg2wsv9zzSuMo0jB7nkUv1/Sjvl7+EeOjSimcsCmE5R TG1FvXJSlK8j5Ill4xbPCnWQ/mgm6K6ugF0cLX70kc8SuxBvS45unmYdUg6GFZxWhAao xnmc4p9YDfgGVB9PenNYJBNIjYDiT8DmbKvHeKMHBTWz3plbu5A5SbfgjfhI4PYmBjyg 9+AU7uI5aDSRvM3OsNA3XuF2vDLDf7BnbyyrlA2IO5IcXyqhTxCcy4whs3RMhGOLxpUq axKkZlWXimEoTgmLxkL4Bf/U4LHrveJqoxKvu86yiKZIqLWWRlskvTFN4+eT6a1YlwdG W38g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JsrPjvI4; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:47 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 11/25] media: venus: core: Add an io base for AON regs Date: Mon, 22 Feb 2021 16:02:46 +0000 Message-Id: <20210222160300.1811121-12-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org 6xx silicon needs to access registers from a AON base address range. This commit defines the necessary variable for later use. Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/core.c | 1 + drivers/media/platform/qcom/venus/core.h | 2 ++ 2 files changed, 3 insertions(+) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index 35a8956fe969..dad597617961 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -215,6 +215,7 @@ static void venus_assign_register_offsets(struct venus_core *core) core->cpu_ic_base = core->base + CPU_IC_BASE; core->wrapper_base = core->base + WRAPPER_BASE; core->wrapper_tz_base = 0; + core->aon_base = 0; } static int venus_probe(struct platform_device *pdev) diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 54e6cd89b30a..8328f7210d6c 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -96,6 +96,7 @@ struct venus_format { * @cpu_ic_base IO memory cpu_ic base address * @wrapper_base IO memory wrapper base address * @wrapper_base IO memory wrapper TZ base address + * @aon_base AON base address * @irq: Venus irq * @clks: an array of struct clk pointers * @vcodec0_clks: an array of vcodec0 struct clk pointers @@ -134,6 +135,7 @@ struct venus_core { void __iomem *cpu_ic_base; void __iomem *wrapper_base; void __iomem *wrapper_tz_base; + void __iomem *aon_base; int irq; struct clk *clks[VIDC_CLKS_NUM_MAX]; struct clk *vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX]; From patchwork Mon Feb 22 16:02:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385802 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1397116jap; Mon, 22 Feb 2021 08:05:25 -0800 (PST) X-Google-Smtp-Source: ABdhPJyoFDkZp693+ciqAamk7y0z5PiNAjShDPOLX9OlAua3H+I4mBckKXwEWArjNAI9w4+89NuE X-Received: by 2002:a05:6402:1854:: with SMTP id v20mr22929886edy.56.1614009925319; Mon, 22 Feb 2021 08:05:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009925; cv=none; d=google.com; s=arc-20160816; b=e7/QueGfHSKyoB9P4ydlNLIZrhCKHvwpSfZDHCQbsE1hNeYMcK56giuZNWQ5U4FRYg I6mL0kk5oIgy7UFfzu8P+ldP+0hn2h7RIVgwh8sv6r98aNwm/wNpLD+28Ni3+q9HCVqq UZlz4axezgY2obTvI9XB3L1n0WBOWJ5/8Y6J5V4aOsxEHmFWFxHDCDVjMW67wnlnBHDv y7P6PCJEpG1io4fRtooomZH6zmgbOUpGUYOdaEWL7JcnUf/LAA3CKuYXUUfAJXuSUZKC 7xBk95APx3UIKQkC/87POT937AFzYb8jLfTNR7Y6y6AIcvNpHPuFjM3+kNC+SeOeK8cj xr3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=58IX7lQQO/xiRLO+o9gmDLJkWZs2hxFilBGny+gBS5k=; b=UnfbLnNdAWiLvyhkqxr28LK9bxyla/jASbSmUqXplQgbUa2YVvCJ567D6FQpLnJRSh +s3xcROrdWElYjCFq9qBPWOQwmNo/dgMtulPaQuGu1JOSU66TBroBMF9R1r/UdY8DpjW qQNGpmt1tmOpdoa50sx8cJ1L6xST14B4ClZbHSNikyxQwb1n9bxaVNiBYbSPz+85woKF iGauJnsX1+0Hxjlueml/ryPV7oJHYe44KcezWK4b+sEdv8ZirlzPXbrASigtnZwo1aCV WxSP1UQoqYbmBbk4hYyCbD0/3jRCYGxFXDv7eCbJjmGUmpyLUeJOsoqWIUvEvscB2ri0 kK+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dCXV9MBK; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:48 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 12/25] media: venus: core: Hook to V6 base registers when appropriate Date: Mon, 22 Feb 2021 16:02:47 +0000 Message-Id: <20210222160300.1811121-13-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This commit points the IO base registers 6xx offsets when probing for 6xx hardware. Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/core.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index dad597617961..e398d3bda65b 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -209,13 +209,23 @@ static int venus_enumerate_codecs(struct venus_core *core, u32 type) static void venus_assign_register_offsets(struct venus_core *core) { - core->vbif_base = core->base + VBIF_BASE; - core->cpu_base = core->base + CPU_BASE; - core->cpu_cs_base = core->base + CPU_CS_BASE; - core->cpu_ic_base = core->base + CPU_IC_BASE; - core->wrapper_base = core->base + WRAPPER_BASE; - core->wrapper_tz_base = 0; - core->aon_base = 0; + if (IS_V6(core)) { + core->vbif_base = core->base + VBIF_BASE; + core->cpu_base = core->base + CPU_BASE_V6; + core->cpu_cs_base = core->base + CPU_CS_BASE_V6; + core->cpu_ic_base = core->base + CPU_IC_BASE_V6; + core->wrapper_base = core->base + WRAPPER_BASE_V6; + core->wrapper_tz_base = core->base + WRAPPER_TZ_BASE_V6; + core->aon_base = core->base + AON_BASE_V6; + } else { + core->vbif_base = core->base + VBIF_BASE; + core->cpu_base = core->base + CPU_BASE; + core->cpu_cs_base = core->base + CPU_CS_BASE; + core->cpu_ic_base = core->base + CPU_IC_BASE; + core->wrapper_base = core->base + WRAPPER_BASE; + core->wrapper_tz_base = 0; + core->aon_base = 0; + } } static int venus_probe(struct platform_device *pdev) From patchwork Mon Feb 22 16:02:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C4D4C433E0 for ; Mon, 22 Feb 2021 16:05:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E8AE564D73 for ; Mon, 22 Feb 2021 16:05:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231481AbhBVQFF (ORCPT ); Mon, 22 Feb 2021 11:05:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231438AbhBVQD6 (ORCPT ); Mon, 22 Feb 2021 11:03:58 -0500 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67139C0611BC for ; Mon, 22 Feb 2021 08:01:51 -0800 (PST) Received: by mail-wr1-x435.google.com with SMTP id l30so3948659wrb.12 for ; Mon, 22 Feb 2021 08:01:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jfi93nFRMIEbqzHdYrViv9hk2pcCCjRBia6kkKbplN8=; b=k4mt+/CkI0yvDUHJI5esU/1596Y7r5+y5rSLw0s0YDXm9RrCOxLtykT3PXpXm1/AA+ TZ6gDjjtpDlsMzgN0JgNvt/gRjqdVBovSPLXWwPzOOFm4ntmBF8wuihira7J/SaS6hpi hGbYSQ6BBX0+g6bVUBVOVBfPV5GnMZinC+vPN4sejkMFVwKjVCAJ9AJb+9/rxhnDXeSB lCVDQppjHt5kdWZdTpj1aYuw5l3u3soxXpD7Jk1m0yt/OYbmA8KOS/BJSbMxCpclZZQq DWVVu3rmLNiudW7kmK3tKI4TmlRxSVzhWLahApabKGQmWB1ObvAA8bHHC3YfPTntXGUu mJfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jfi93nFRMIEbqzHdYrViv9hk2pcCCjRBia6kkKbplN8=; b=PX8vYZ2Nzy5oE891DUeXjSr4qNRDKmsN0KozPesXCPgthMoThpsP6njrnPvcxnGHiV KHNgC7bv65OWfBo6odDMo1/N6FwvEUksEstMgARc2Zs0PmVWXuqjPP1j3T+nqmqwO6lo J878rAmJi5T41yBbm1+Iuv9EZU47rY84MVYcnz6ejEkuPuxGiAJm6b+Bd75E6hpAlnDF eF9O6AqLFav6DKHmxFNYx+E4UvFtwv5tKG39QaqMp25nuV7jPUehAfD8B5ipeGugjUSP PDu4x5N1CQT5aXV5qOykXp/V2N293NV4XBxqD3KGprpGJ9lXwLzkkl+GGcMiGxHyxl1q A81w== X-Gm-Message-State: AOAM531TKRu5Jo6VAq9chJGGZV11iOIMwHWEhdsQOX3N9ploDvdipAlc rwvHkcbEnp4m9BnEXzfHKUJc3g== X-Google-Smtp-Source: ABdhPJzDOPMpBsXXzRoujYsFyJdzVsTgdSmP7tS6Sex6+tmAxztCbuVpsPLOHpTBB1nAp3ffiPd4ng== X-Received: by 2002:adf:dcd2:: with SMTP id x18mr22031726wrm.355.1614009710240; Mon, 22 Feb 2021 08:01:50 -0800 (PST) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:49 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 13/25] media: venus: hfi: Add a 6xx boot logic Date: Mon, 22 Feb 2021 16:02:48 +0000 Message-Id: <20210222160300.1811121-14-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal This patch adds a 6xx specific boot logic. The goal is to share as much code as possible between 3xx, 4xx and 6xx silicon. We need to do a different write to WRAPPER_INTR_MASK with an additional write to CPU_CS_H2XSOFTINTEN_V6 and CPU_CS_X2RPMh_V6. The other writes are the same for 6xx and non-6xx silicon albeit at different absolute relative locations to the base of the venus address space. Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/hfi_venus.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index f95cdd3d530c..5f9c8aa84cd0 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -442,14 +442,21 @@ static int venus_boot_core(struct venus_hfi_device *hdev) { struct device *dev = hdev->core->dev; static const unsigned int max_tries = 100; - u32 ctrl_status = 0; + u32 ctrl_status = 0, mask_val; unsigned int count = 0; void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; void __iomem *wrapper_base = hdev->core->wrapper_base; int ret = 0; writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT); - writel(WRAPPER_INTR_MASK_A2HVCODEC_MASK, wrapper_base + WRAPPER_INTR_MASK); + if (IS_V6(hdev->core)) { + mask_val = readl(wrapper_base + WRAPPER_INTR_MASK); + mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BASK_V6 | + WRAPPER_INTR_MASK_A2HCPU_MASK); + } else { + mask_val = WRAPPER_INTR_MASK_A2HVCODEC_MASK; + } + writel(mask_val, wrapper_base + WRAPPER_INTR_MASK); writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3); while (!ctrl_status && count < max_tries) { @@ -467,6 +474,9 @@ static int venus_boot_core(struct venus_hfi_device *hdev) if (count >= max_tries) ret = -ETIMEDOUT; + if (IS_V6(hdev->core)) + writel(0x0, cpu_cs_base + CPU_CS_X2RPMH_V6); + return ret; } From patchwork Mon Feb 22 16:02:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 386321 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BE57C433E0 for ; Mon, 22 Feb 2021 16:05:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7109164E40 for ; Mon, 22 Feb 2021 16:05:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231343AbhBVQE6 (ORCPT ); Mon, 22 Feb 2021 11:04:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231439AbhBVQD6 (ORCPT ); Mon, 22 Feb 2021 11:03:58 -0500 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B982C0611BE for ; Mon, 22 Feb 2021 08:01:52 -0800 (PST) Received: by mail-wr1-x430.google.com with SMTP id b3so19624293wrj.5 for ; Mon, 22 Feb 2021 08:01:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=q8MTGQpZlIaQDClaUfWSOZMS2MTg1prNaQUdzKKuVqI=; b=byVk8oB+fJuThD+BDZ+PEaC7NNxKvaGpM0TMKPfd6eMVslRbDJWgVCseMnQFIHpbOq 9ueIB/MQa2ElP6jWZidyEABdZof7z1Pfcd3qrNfz86O0w4YROit5cz8pjm3m8KqnmbvZ HViL6YXc1/HvZyiyE0HmU6RfJexyJrGwlxwx6KGWejzQrOL0pCCaiMpjEruLnpZGHl/M YBNHmaUbRXM3ddgQ4joIVvG5vvqMX31WgsX/OXdFVTm8K8iFJBWZ8ONi72BIhi/Z5BUh BmOoAzxnz4hJA/z7/8FKVz0sViVu01QpLgowbdmYXpIvPjKCfOM6S5VOR5F8Qt0xFpZG cXTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=q8MTGQpZlIaQDClaUfWSOZMS2MTg1prNaQUdzKKuVqI=; b=ePxqM46xxnj7It0wXW1L3YwMyrCxwu/AQRfFd1enGADlBN1K8hoNF7R69ixeSRWXAh ZWNnMZehjXdnYKeUu01jraaBo9wz83Z80VsSMtx81pZNlUDt0n3iCdBMsWmil64jZM3Y Grsz05BqzQ8ciXZqes7pTvIWKrMhInQWWVIwpUa5UzxbrHlIPKVGi+MW1NpYEzPhUdBZ ecHNTJBubKeol0qtforBbypg93HrbiYrTbsT5r6cnm/fpgZm6sausQjAG+HDwnzeStcq lqS4Xt1+bxfE8m+6LOxocYD7G3xGL1QZjdcesStKEhKBxjoYo3N4GLA41YMYG+LYKnFr OWGA== X-Gm-Message-State: AOAM533JH1fYdtp6X9tbTEqtf8xAoacIoi6H+MQPA3xDaujNVulkePqc 3NSbDM/DY1cE3TwF4nh/Pjgjdg== X-Google-Smtp-Source: ABdhPJxqcPsW96Th1eC1aqUbK1Tlov3na1EQ/ubUHbuIvKD+oNzRN43WffonoYBtyfd/2F7tWM6pSA== X-Received: by 2002:a5d:4848:: with SMTP id n8mr5522851wrs.241.1614009711183; Mon, 22 Feb 2021 08:01:51 -0800 (PST) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:50 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 14/25] media: venus: hfi: Add 6xx interrupt support Date: Mon, 22 Feb 2021 16:02:49 +0000 Message-Id: <20210222160300.1811121-15-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal This commit adds 6xx specific interrupt support, some register offsets and bitmasks differ from 4xx, which we account for in this commit. [bod: Added commit log. Moved register definition into commit] Signed-off-by: Dikshita Agarwal Co-developed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/hfi_venus.c | 32 +++++++++++++------ 1 file changed, 23 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index 5f9c8aa84cd0..09fc81da0645 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -359,8 +359,14 @@ static void venus_set_registers(struct venus_hfi_device *hdev) static void venus_soft_int(struct venus_hfi_device *hdev) { void __iomem *cpu_ic_base = hdev->core->cpu_ic_base; + u32 clear_bit; - writel(BIT(CPU_IC_SOFTINT_H2A_SHIFT), cpu_ic_base + CPU_IC_SOFTINT); + if (IS_V6(hdev->core)) + clear_bit = BIT(CPU_IC_SOFTINT_H2A_SHIFT_V6); + else + clear_bit = BIT(CPU_IC_SOFTINT_H2A_SHIFT); + + writel(clear_bit, cpu_ic_base + CPU_IC_SOFTINT); } static int venus_iface_cmdq_write_nolock(struct venus_hfi_device *hdev, @@ -474,8 +480,10 @@ static int venus_boot_core(struct venus_hfi_device *hdev) if (count >= max_tries) ret = -ETIMEDOUT; - if (IS_V6(hdev->core)) + if (IS_V6(hdev->core)) { + writel(0x1, cpu_cs_base + CPU_CS_H2XSOFTINTEN_V6); writel(0x0, cpu_cs_base + CPU_CS_X2RPMH_V6); + } return ret; } @@ -1061,14 +1069,20 @@ static irqreturn_t venus_isr(struct venus_core *core) return IRQ_NONE; status = readl(wrapper_base + WRAPPER_INTR_STATUS); - - if (status & WRAPPER_INTR_STATUS_A2H_MASK || - status & WRAPPER_INTR_STATUS_A2HWD_MASK || - status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) - hdev->irq_status = status; - + if (IS_V6(core)) { + if (status & WRAPPER_INTR_STATUS_A2H_MASK || + status & WRAPPER_INTR_STATUS_A2HWD_MASK_V6 || + status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) + hdev->irq_status = status; + } else { + if (status & WRAPPER_INTR_STATUS_A2H_MASK || + status & WRAPPER_INTR_STATUS_A2HWD_MASK || + status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) + hdev->irq_status = status; + } writel(1, cpu_cs_base + CPU_CS_A2HSOFTINTCLR); - writel(status, wrapper_base + WRAPPER_INTR_CLEAR); + if (!IS_V6(core)) + writel(status, wrapper_base + WRAPPER_INTR_CLEAR); return IRQ_WAKE_THREAD; } From patchwork Mon Feb 22 16:02:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 386320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B292C433DB for ; Mon, 22 Feb 2021 16:05:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C0AC964D73 for ; Mon, 22 Feb 2021 16:05:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230270AbhBVQFJ (ORCPT ); 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:51 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 15/25] media: venus: hfi: Read WRAPPER_TZ_CPU_STATUS_V6 on 6xx Date: Mon, 22 Feb 2021 16:02:50 +0000 Message-Id: <20210222160300.1811121-16-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 6xx we should read wrapper cpu status from the wrapper TZ register set. Co-developed-by: Jonathan Marek Signed-off-by: Jonathan Marek Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/hfi_venus.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index 09fc81da0645..dabff8654f97 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -1472,10 +1472,14 @@ static int venus_suspend_1xx(struct venus_core *core) static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) { void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *wrapper_tz_base = hdev->core->wrapper_tz_base; void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status, cpu_status; - cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); + if (IS_V6(hdev->core)) + cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6); + else + cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (cpu_status & WRAPPER_CPU_STATUS_WFI && @@ -1488,10 +1492,14 @@ static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) static bool venus_cpu_idle_and_pc_ready(struct venus_hfi_device *hdev) { void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *wrapper_tz_base = hdev->core->wrapper_tz_base; void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status, cpu_status; - cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); + if (IS_V6(hdev->core)) + cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6); + else + cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (cpu_status & WRAPPER_CPU_STATUS_WFI && From patchwork Mon Feb 22 16:02:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385795 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1396647jap; Mon, 22 Feb 2021 08:04:56 -0800 (PST) X-Google-Smtp-Source: ABdhPJwzE44WGC4pEm+wHh4uKKXmzEI6CGnjgzBJ7TnJM+hPAZo0sUPChLderQ4ih06CRDLljeIp X-Received: by 2002:a50:d987:: with SMTP id w7mr23436734edj.350.1614009896099; Mon, 22 Feb 2021 08:04:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009896; cv=none; d=google.com; s=arc-20160816; b=tkxrE9HCXAoPN1Zxd0u/AKB5QESUPlsLbMLsxELhp5IP92KmTcacPEqYPUNeg6ioGi fGR8jj50c1y4EfvsjMtq5VbZz/2aMYhlpvkbFMxKG+oabQkAQuisf6e2WYCGnHkSrUfM q9Wkbgwv+RbmdoNfEfDmOHGnqlTLuAs4VFKWsANvAo/kfjjPb/YGC/WAVXytU9QL0yG1 n91Tw5aob4R1uG7bYLMSAhimvFpbUQVhIOiO+cp1YxfFh3tIBGcTUhfzqslLe2/xJHuB raZ7gOPdZjN9yShTVPXN6CdgxwRz9K/J7solL5goM6UnzUpQP+vI5VSTIL/4gSYdv8Qw xLeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=hdJa+phniYef0WPVqeqgesg+EPHOBsfdgAUaK1Ao5jQ=; b=Veh3+VLdNj4HjCO7VzbOQM9+oNOE3BTRMyVKxCl0e+F5N/G9D4CQGhTluRE1HSj1jO /EukxDM+kWW3n1mOsJk+l3rX/qg/DKt7i7HCpN6qmmbAMZUrPbIIhqjcT3G82cG/5hEk 56UoDTgzKzQEhAoGcnpNlqaghANYqabTHlD0h1G8AFLdiGYLATwpp7MZN/L/B007XFEv Jv/+6PP2edLNX1zZeLiJtOfAAZ7HZJO5rKL0f8fP57XXDLCqLSNF19qtjfT/iIKCECC4 LVwFU/ED1/h/pYxTUgZca0lu0IYn86LxQ3D5xidRnl8+YK/ow82FLkLhjqEFjOoL0VcV rRBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Nh9pM/bi"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:52 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org, Dikshita Agarwal Subject: [PATCH 16/25] media: venus: hfi, vdec: v6 Add IS_V6() to existing IS_V4() if locations Date: Mon, 22 Feb 2021 16:02:51 +0000 Message-Id: <20210222160300.1811121-17-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In various places in the venus codebase we have if (IS_V4()) which takes the code down paths for 4xx silicon. This logic is broadly applicable to 6xx silicon also. In this patch we add IS_V6() to various IS_V4() decision locations. Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/helpers.c | 5 ++--- drivers/media/platform/qcom/venus/hfi_venus.c | 4 ++-- drivers/media/platform/qcom/venus/vdec.c | 6 +++--- 3 files changed, 7 insertions(+), 8 deletions(-) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/helpers.c b/drivers/media/platform/qcom/venus/helpers.c index 76ece2ff8d39..2515a2225614 100644 --- a/drivers/media/platform/qcom/venus/helpers.c +++ b/drivers/media/platform/qcom/venus/helpers.c @@ -488,7 +488,7 @@ static bool is_dynamic_bufmode(struct venus_inst *inst) * v4 doesn't send BUFFER_ALLOC_MODE_SUPPORTED property and supports * dynamic buffer mode by default for HFI_BUFFER_OUTPUT/OUTPUT2. */ - if (IS_V4(core)) + if (IS_V4(core) || IS_V6(core)) return true; caps = venus_caps_by_codec(core, inst->hfi_codec, inst->session_type); @@ -1084,11 +1084,10 @@ int venus_helper_set_work_mode(struct venus_inst *inst, u32 mode) const u32 ptype = HFI_PROPERTY_PARAM_WORK_MODE; struct hfi_video_work_mode wm; - if (!IS_V4(inst->core)) + if (!IS_V4(inst->core) && !IS_V6(inst->core)) return 0; wm.video_work_mode = mode; - return hfi_session_set_property(inst, ptype, &wm); } EXPORT_SYMBOL_GPL(venus_helper_set_work_mode); diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index dabff8654f97..24cf20f76e7f 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -897,7 +897,7 @@ static int venus_sys_set_default_properties(struct venus_hfi_device *hdev) * enable it explicitly in order to make suspend functional by checking * WFI (wait-for-interrupt) bit. */ - if (IS_V4(hdev->core)) + if (IS_V4(hdev->core) || IS_V6(hdev->core)) venus_sys_idle_indicator = true; ret = venus_sys_set_idle_message(hdev, venus_sys_idle_indicator); @@ -1577,7 +1577,7 @@ static int venus_suspend_3xx(struct venus_core *core) static int venus_suspend(struct venus_core *core) { - if (IS_V3(core) || IS_V4(core)) + if (IS_V3(core) || IS_V4(core) || IS_V6(core)) return venus_suspend_3xx(core); return venus_suspend_1xx(core); diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index e4dc97f00fc3..84c16f33e01b 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -662,8 +662,8 @@ static int vdec_output_conf(struct venus_inst *inst) if (width > 1920 && height > ALIGN(1080, 32)) ubwc = true; - /* For Venus v4 UBWC format is mandatory */ - if (IS_V4(core)) + /* For Venus v4/v6 UBWC format is mandatory */ + if (IS_V4(core) || IS_V6(core)) ubwc = true; ret = venus_helper_get_out_fmts(inst, inst->fmt_cap->pixfmt, &out_fmt, @@ -714,7 +714,7 @@ static int vdec_output_conf(struct venus_inst *inst) return ret; } - if (IS_V3(core) || IS_V4(core)) { + if (IS_V3(core) || IS_V4(core) || IS_V6(core)) { ret = venus_helper_get_bufreq(inst, HFI_BUFFER_OUTPUT, &bufreq); if (ret) return ret; From patchwork Mon Feb 22 16:02:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385864 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9FB9C433E0 for ; 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:53 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 17/25] media: venus: pm: Hook 6xx pm ops into 4xx pm ops Date: Mon, 22 Feb 2021 16:02:52 +0000 Message-Id: <20210222160300.1811121-18-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org At this time there is no need to differentiate between the two, we can reuse the 4xx pm ops callback structure for 6xx. Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/pm_helpers.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index ea08b4d71e39..f163526c3f83 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -1119,6 +1119,7 @@ const struct venus_pm_ops *venus_pm_get(enum hfi_version version) case HFI_VERSION_3XX: return &pm_ops_v3; case HFI_VERSION_4XX: + case HFI_VERSION_6XX: return &pm_ops_v4; } From patchwork Mon Feb 22 16:02:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385796 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1396654jap; Mon, 22 Feb 2021 08:04:56 -0800 (PST) X-Google-Smtp-Source: ABdhPJzlYXJc8yM/EFKN8ci+L9X0eQfQxNAv/yO0XnOFsrFE1v6GmrKGkCIy3AvQwApwDT1HwA8+ X-Received: by 2002:a17:906:2488:: with SMTP id e8mr21380818ejb.121.1614009896490; Mon, 22 Feb 2021 08:04:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009896; cv=none; d=google.com; s=arc-20160816; b=KNKRyBqsc7pYiiMdSZg1XXSvuIeR2iFdAWEZN0V5Rwt8UZuQZPYFgYe5dsoMR3KoD4 NajDk6AG2M5lfChSFbol9yCVUvQXQ/qmSLdIKWThgYCa7PBJv/58DTl11sNz8tbSUie4 E+Q9vF+Z6tfQTCBw4sv64xWJMh3yLrGDjqAY7Z9e85pKUrkPxMJNyCr+7Vmgz95AaClL 1sZsPZPRjhY69O3maa/SnouHcj20CiJxDcKowEgnD6VeKmqua//Ns5vWsl3HNO1MYtnK t8uzYth9RxRKZz1pOep+MTRNhnOrf/sXZaGdzbk8EXCH+k7tiqj4+lgqzzMicCdq+/fh l2pw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=enj8xcGxi5Ilg6e5Y2toHN1/uzGSCB2GzovsHLJELfo=; b=jd3MvOMyM5jGZLFLUIl8rIA04UD92m3elUgbORD19lqbeu0tzPvsZAhsR2IWBEL/52 6sxpE59naLEF2ZQcIN63NqGZzPCXC1fmt2PXspq3+E8I/KUze6nBuDqUNLNg1uQennk7 Ub8SjpjJ0S4WkwlPfdQPyQ0qikp/W3zM2hZ3bGbL090pxJLGMxQbuWdC6scMeMIMYePm dpGkCK2a4/x1xmQ6ht4c4wl08zJY4flisryBuAOO8aqH5bOznDJ29K3lToTjFsApnRlT VmFrK9MfrAGFOlBqhSg16R1TDmbe/I9i1I7kqf1Ri4SW91SbicdzbTK1GvBUF5LyRBnH M79w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BNqcpR7U; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:54 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 18/25] media: venus: hfi: Add 6xx AXI halt logic Date: Mon, 22 Feb 2021 16:02:53 +0000 Message-Id: <20210222160300.1811121-19-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal This patch takes the downstream AXI halt routine and applies it when IS_V6() is true. bod: Converted to readl_poll_timeout() Converted LPI update timeout to dev_dbg. In practice this register never appears to update with the value 0x07. Discussing with contacts in qcom video team, this toggle only pertains to low-power mode. Keeping the write for the sake of fidelity with downstream. Signed-off-by: Dikshita Agarwal Co-developed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/hfi_venus.c | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index 24cf20f76e7f..01c100db07d3 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -541,10 +541,55 @@ static int venus_halt_axi(struct venus_hfi_device *hdev) { void __iomem *wrapper_base = hdev->core->wrapper_base; void __iomem *vbif_base = hdev->core->vbif_base; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + void __iomem *aon_base = hdev->core->aon_base; struct device *dev = hdev->core->dev; u32 val; + u32 mask_val; int ret; + if (IS_V6(hdev->core)) { + writel(0x3, cpu_cs_base + CPU_CS_X2RPMH_V6); + + writel(0x1, aon_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL); + ret = readl_poll_timeout(aon_base + AON_WRAPPER_MVP_NOC_LPI_STATUS, + val, + val & BIT(0), + POLL_INTERVAL_US, + VBIF_AXI_HALT_ACK_TIMEOUT_US); + if (ret) { + dev_err(dev, "NOC not in qaccept status %x\n", val); + return -ETIMEDOUT; + } + + /* HPG 6.1.2 Step 3, debug bridge to low power */ + mask_val = (BIT(2) | BIT(1) | BIT(0)); + writel(mask_val, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6); + + ret = readl_poll_timeout(wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6, + val, + (val & mask_val) == mask_val, + POLL_INTERVAL_US, + VBIF_AXI_HALT_ACK_TIMEOUT_US); + + if (ret) + dev_dbg(dev, "DBLP Set: status %x\n", val); + + /* HPG 6.1.2 Step 4, debug bridge to lpi release */ + writel(0x00, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6); + ret = readl_poll_timeout(wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6, + val, + val == 0, + POLL_INTERVAL_US, + VBIF_AXI_HALT_ACK_TIMEOUT_US); + + if (ret) { + dev_err(dev, "DBLP Release: lpi_status %x\n", val); + return -ETIMEDOUT; + } + return 0; + } + if (IS_V4(hdev->core)) { val = readl(wrapper_base + WRAPPER_CPU_AXI_HALT); val |= WRAPPER_CPU_AXI_HALT_HALT; From patchwork Mon Feb 22 16:02:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385798 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1396665jap; Mon, 22 Feb 2021 08:04:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJxBdQ1UfgaGvcel8JAiAEkFSKy46IGAR74ChXjFRRyP4BNafBrSQgMh2dLDs5MA2rixIMK3 X-Received: by 2002:a17:907:7252:: with SMTP id ds18mr21857792ejc.239.1614009897436; Mon, 22 Feb 2021 08:04:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009897; cv=none; d=google.com; s=arc-20160816; b=ecEg4JwgvNSqr6KhsHMWEYTGslw/G2wr4EF/05IXfJemjE94gqv4/rdYqHIbkjZTYV MYbGmNZaKcCGVED9xqAHiqL+SegB0Czspn3AUPpDtEh81HL37iRhbAZhfXw/p3xBadLX tIkAebZKchLyIoWH/9mKLf3a4sALXiHMv6U/pvPB87Ez1UtjyEg8hNFI3HKsTm+EQ2jM fiyrNc4iJh1A/SmEwt1wvSxpb4x7UBklsus3kUFsz6FcS3pmb9x//R8m6NndbLuVYkOe 5Lkb3RYUjznu00AxeN0OWswi7IcSr0yj15oF6iT4GMrg++lC1RNzmqiRxUVEvamj7XKb lZ4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bpo0//4chUUR1mhPO3iw62PhjsjchQwUrKOO/MLsUwc=; b=IOV/Dt69GbcdYLjuwRdQelwRrTcjC3s68pt+uEmVQtkFh6Wyxj9GNyXEmXRp1zAUuJ UonwkRbGZB6lIb8RljwC7emm3PSzlaDcBE0R/fCaO7nXJlwQvwfqvQ2P3RE04ubcNM+Q 8JDaxDpAT5fulW+adU7E1mTwgV+cWd6YxfLcrtsaOIgzuJ1OiIXHsIDH+gxe6pGQDGnu QZvmE5sHmGKbPD8pd4mKkdp58W0E3KeqOjbEmqLKBKAp2MI9usweRUd3JxBOorCmW8X6 7vjF2kIMUnyy4hIWANSfBtSZWckqMp3T/rWX5ljQsJUkx0rn5srlpwVWl4GJvMrbkKyS 0NTw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MVWjFI+S; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:55 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 19/25] media: venus: pm: Toggle 6xx wrapper power in vcodec_control Date: Mon, 22 Feb 2021 16:02:54 +0000 Message-Id: <20210222160300.1811121-20-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal When in vcodec_control_v4() on the 4xx path we select between one of two vcodec cores to toggle power control bits. In 6xx there is only one core which offsets the relevant control registers to a slightly different address. This patch accounts for the address offset for 6xx silicon. Signed-off-by: Dikshita Agarwal Co-developed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/pm_helpers.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index f163526c3f83..9ca90632c60e 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -397,7 +397,10 @@ static int vcodec_control_v4(struct venus_core *core, u32 coreid, bool enable) u32 val; int ret; - if (coreid == VIDC_CORE_ID_1) { + if (IS_V6(core)) { + ctrl = core->wrapper_base + WRAPPER_CORE_POWER_CONTROL_V6; + stat = core->wrapper_base + WRAPPER_CORE_POWER_STATUS_V6; + } else if (coreid == VIDC_CORE_ID_1) { ctrl = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; stat = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; } else { From patchwork Mon Feb 22 16:02:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385801 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1396717jap; Mon, 22 Feb 2021 08:05:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJzFF9PLHH2CJYKBgA/vAf6CPuH7UUY00GUPmRjYX92hAFHfzHT9WsyWRKqVlh6HBL3FRvBy X-Received: by 2002:a05:6402:1013:: with SMTP id c19mr23707539edu.86.1614009899885; Mon, 22 Feb 2021 08:04:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009899; cv=none; d=google.com; s=arc-20160816; b=pbmUR6TbAp/Xx3YiBblbXrv/HBLFWKHpgWbT+CWhhb+1h9coJ1lW0XVF3f8uDRce2I GT80c7M2aco0pi0wx1JxbdB7l5CbKBI02ZSvlXcqUej8U4sPuWNx0R7ycs8XTEoB+75X YaUwHNi2zMrt9HKKWQSPNRj2M9tm5cywafQAO1zoYGszCbEdJ/iMP4SlUgMEmVFf6SAU nvHiJDh19sTjibcnLEwiJpXMUDJ4n2bZ4ZRtxfoh+fcekozmPaBE7oU0WcARJjZLXStv +U+FPzp1Ml6h3kmgbv8WnSV2wg0WJtAcxLI5OONY5rFSmzhfC9m3r8PnCsOCO1gmRQOf a3IQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zhmZ46o1OlmHrlQ7agfIkG8JPYi4dbZzTMRJzpesQV0=; b=YUu5h/p3OgGhTKyzjZ0pEVHgnsh5PM9LdTqBnMMec0wCOCpJz4jRveGjemUYkIc/b3 3AT2nED8ta7E+0pFsSSSRLhDgs6dxEzcGwoDnvzTE/XSHzXAqTMrD8rFKlmPP58yIrXI D1J9qA7Et47S0Jxso9EnhXH84Zqg2sFt9xMRdCExyor5psB/ZBnBynlJb4cwh8tI2rqd OqFqgesTrS8ehCxRAdzB4m8ZkoXg3r/YH3/sloucsHmVVGrbJA1mO87996lYEryzZu9G n3/cGYeY7E86EjDRXzgSDwpgG3uGUMskrnRgot3t2wfgP+uSlhZkavrcSYvKXMua05F5 jVOA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JIXh1zW5; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:56 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 20/25] media: venus: firmware: Do not toggle WRAPPER_A9SS_SW_RESET on 6xx Date: Mon, 22 Feb 2021 16:02:55 +0000 Message-Id: <20210222160300.1811121-21-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal Do not toggle the WRAPPER_A9SS_SW_RESET on 6xx. Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/firmware.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c index f9170f596849..a7ebe8de2812 100644 --- a/drivers/media/platform/qcom/venus/firmware.c +++ b/drivers/media/platform/qcom/venus/firmware.c @@ -53,10 +53,12 @@ int venus_set_hw_state(struct venus_core *core, bool resume) return ret; } - if (resume) + if (resume) { venus_reset_cpu(core); - else - writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET); + } else { + if (!IS_V6(core)) + writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET); + } return 0; } From patchwork Mon Feb 22 16:02:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385803 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1397150jap; Mon, 22 Feb 2021 08:05:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJydzBU+tzF961ShaYB09cBqtjuLWfTbuw9RvSo7IkeAYebn4Y6n1L9owa1a7Npr0ZRRPtpa X-Received: by 2002:aa7:c542:: with SMTP id s2mr3250679edr.369.1614009928302; Mon, 22 Feb 2021 08:05:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614009928; cv=none; d=google.com; s=arc-20160816; b=eQYcx9/YhcowdcPPq+LmeILEc1WVdT8AGHKHQuZJyAtPJU96t4Usrq5lBEMhAAuP1S LXKxfImnqoX1HGt1cvAjVd/7cAw/uOI5DUk3cukJEZnUtMrGbeAmd4ah+6jdJfl3+pZ3 ZciwNP95+TOsR2Bjgmk8UbJo+HW9c4NtVv+k0yAqKnUskHo6+UqAJs89HiakZLCXe0cc N52SJ9k+FYnbZfyvP+IoDeaws0HytFarP/JR5Phqn+OJdg0Ps/8lX3oaoljmllUbj1XI Bidj7z2uvpTGzaUxiQBbMyDr07Xozd+RsPw7w18YNTmF5CVjjHQiut2PcRsBUOZVdcxL PQpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Y+z8uHHoiH3kXvzE+PJvQbC49Izfw6C+uliH5PAx0t4=; b=PGnKFsbaRBCnbUCqPmzuYbXfn07Lxnzjc05N2Vc02dzPtldQLT0djXUAYSdRWzyjwX hkyyi7idTFpJLiGY9A9SIQ7AdUwiDamvEHi5svPPtbAvoPfNBI+m2f6i6xIhs1xkgBnN xUfRsPbrdqE80+Cd14Hjl2PdwFGA6iWHwufR+R/fkKxpsMyhCVNP/G9bWEKOIarnB41V Bsd9gahpq5q8CfzwD1DFmMgUkgpDLt1Arg+q+Wqat/+hP1N3krPuHYxi+tm9VVtLbB/B YfDD+aRE7po0dl5zH1FTY7hvAOxcKcQtd4cMudPDfM2+PfzUlk1b5ymnTqOtJ5eh3ta2 NuBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=e36cmTvF; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:57 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 21/25] media: venus: helpers: Add internal buffer list for v6 Date: Mon, 22 Feb 2021 16:02:56 +0000 Message-Id: <20210222160300.1811121-22-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal - Internal buffers required by v6 are different than v4, add new list of internal buffers for v6. - Differentiate encoder/decoder buffers for 6xx Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/helpers.c | 23 ++++++++++++++++++- .../media/platform/qcom/venus/hfi_helper.h | 9 +++++--- 2 files changed, 28 insertions(+), 4 deletions(-) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/helpers.c b/drivers/media/platform/qcom/venus/helpers.c index 2515a2225614..f0413236a56f 100644 --- a/drivers/media/platform/qcom/venus/helpers.c +++ b/drivers/media/platform/qcom/venus/helpers.c @@ -279,13 +279,34 @@ static const unsigned int intbuf_types_4xx[] = { HFI_BUFFER_INTERNAL_PERSIST_1, }; +static const unsigned int intbuf_types_6xx_enc[] = { + HFI_BUFFER_INTERNAL_SCRATCH(HFI_VERSION_6XX), + HFI_BUFFER_INTERNAL_SCRATCH_1(HFI_VERSION_6XX), + HFI_BUFFER_INTERNAL_SCRATCH_2(HFI_VERSION_6XX), + HFI_BUFFER_INTERNAL_PERSIST, +}; + +static const unsigned int intbuf_types_6xx_dec[] = { + HFI_BUFFER_INTERNAL_SCRATCH(HFI_VERSION_6XX), + HFI_BUFFER_INTERNAL_SCRATCH_1(HFI_VERSION_6XX), + HFI_BUFFER_INTERNAL_PERSIST_1, +}; + int venus_helper_intbufs_alloc(struct venus_inst *inst) { const unsigned int *intbuf; size_t arr_sz, i; int ret; - if (IS_V4(inst->core)) { + if (IS_V6(inst->core)) { + if (inst->session_type == VIDC_SESSION_TYPE_DEC) { + arr_sz = ARRAY_SIZE(intbuf_types_6xx_dec); + intbuf = intbuf_types_6xx_dec; + } else { + arr_sz = ARRAY_SIZE(intbuf_types_6xx_enc); + intbuf = intbuf_types_6xx_enc; + } + } else if (IS_V4(inst->core)) { arr_sz = ARRAY_SIZE(intbuf_types_4xx); intbuf = intbuf_types_4xx; } else { diff --git a/drivers/media/platform/qcom/venus/hfi_helper.h b/drivers/media/platform/qcom/venus/hfi_helper.h index 6b524c7cde5f..f367f43c9fb7 100644 --- a/drivers/media/platform/qcom/venus/hfi_helper.h +++ b/drivers/media/platform/qcom/venus/hfi_helper.h @@ -395,11 +395,14 @@ #define HFI_BUFFER_INTERNAL_PERSIST 0x4 #define HFI_BUFFER_INTERNAL_PERSIST_1 0x5 #define HFI_BUFFER_INTERNAL_SCRATCH(ver) \ - (((ver) == HFI_VERSION_4XX) ? 0x6 : 0x1000001) + (((ver) == HFI_VERSION_4XX || \ + (ver) == HFI_VERSION_6XX) ? 0x6 : 0x1000001) #define HFI_BUFFER_INTERNAL_SCRATCH_1(ver) \ - (((ver) == HFI_VERSION_4XX) ? 0x7 : 0x1000005) + (((ver) == HFI_VERSION_4XX || \ + (ver) == HFI_VERSION_6XX) ? 0x7 : 0x1000005) #define HFI_BUFFER_INTERNAL_SCRATCH_2(ver) \ - (((ver) == HFI_VERSION_4XX) ? 0x8 : 0x1000006) + (((ver) == HFI_VERSION_4XX || \ + (ver) == HFI_VERSION_6XX) ? 0x8 : 0x1000006) #define HFI_BUFFER_EXTRADATA_INPUT(ver) \ (((ver) == HFI_VERSION_4XX) ? 0xc : 0x1000002) #define HFI_BUFFER_EXTRADATA_OUTPUT(ver) \ From patchwork Mon Feb 22 16:02:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1B55C433E0 for ; Mon, 22 Feb 2021 16:06:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B013A64E40 for ; Mon, 22 Feb 2021 16:06:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230510AbhBVQFz (ORCPT ); Mon, 22 Feb 2021 11:05:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230508AbhBVQE2 (ORCPT ); Mon, 22 Feb 2021 11:04:28 -0500 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8ABBEC061D7D for ; Mon, 22 Feb 2021 08:02:00 -0800 (PST) Received: by mail-wm1-x333.google.com with SMTP id f137so914902wmf.3 for ; Mon, 22 Feb 2021 08:02:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a+OrwHZbF+yZUUA/s5BETsaXgiYWfCnPM+gSTxwgLG0=; b=xkrMZEj8y98zWaYE/wurKOQrzN+pn0UsJTAiNQN4gimqUdIYemYiAtG0TMyP3boSUt y8GPHQ0jIv6zxHpJW9CrFLmws1YKmq20vF0Rzjwb28jrCkgCuGseGK8Xs03Fok0FKJb/ elZIX4PgwkWRmxrA0DNRC5TJF1ZqLRjwhcBsOcI3KuSG3Qi+rukT1UR9aUvFW5vG1EuX 1G+1gaUtroYdK8mDAWZfvr4gfIyp8RF+4K1L+BWI33hIpjJ/IjSjFwLuU3JjdBlHUb7q RCjViyMgBPqohxi055C0g0JoRwxKSRlq4kFmsXGdYeWT31UogmyAn0oGCGlFURJ8RA55 nJPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a+OrwHZbF+yZUUA/s5BETsaXgiYWfCnPM+gSTxwgLG0=; b=pRaE9Dsa1SeYOPrzlTz/kwRakev5CRP2iJfVcGTaM3VOG3uxbeZ3RclrCaCEJlSCt5 enGYuhDD2CSyjFp3BCoLppLJfrmV46V7xQo+wvsoJAe0TQI/bDh0c282tCBe4YkLi+Xw EbNWIv/xsUBeljL/Rz3tkVOT0RbSxrPkySJ5AU6FYHPLdBzfyzHh5PRnBeDtDuzvtYe6 BrHtQi8I97cD2iRtwGTqgyrEgyVOjqtVcQqBFRI+wpxjlACHz9JCTcY95HE29CWLPfh9 7ryIifhCY7xiiThDNMFa6wN+YMrPWZfBzTcvdI30t/vdpWfgg+H+6VL9VqD1ZY5Q73ct WCLg== X-Gm-Message-State: AOAM533tPLuJyw+YCJw7IW8TDnSt6PdFI9o8yWhmcdC5cs1RYN3kXqxE 1XGVldSW3lRKJ59NRmIGvHG8nw== X-Google-Smtp-Source: ABdhPJyW9m03DbV76bt0ZH6hIrqSjB1KCpBPJ2Sznl8fpUQ+Dlz1OztLSXBBYudd5nniKNaMvd3vPw== X-Received: by 2002:a1c:2b05:: with SMTP id r5mr20661700wmr.179.1614009719318; Mon, 22 Feb 2021 08:01:59 -0800 (PST) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:58 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 22/25] media: venus: helpers, hfi, vdec: Set actual plane constraints to FW Date: Mon, 22 Feb 2021 16:02:57 +0000 Message-Id: <20210222160300.1811121-23-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal Set actual plane alignments to FW with HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO to calculate correct buffer size. bod: Fixed fall-through error in pkt_session_set_property_6xx() switch Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/helpers.c | 21 ++++++++++++++++++++ drivers/media/platform/qcom/venus/helpers.h | 1 + drivers/media/platform/qcom/venus/hfi_cmds.c | 13 ++++++++++++ drivers/media/platform/qcom/venus/vdec.c | 4 ++++ 4 files changed, 39 insertions(+) diff --git a/drivers/media/platform/qcom/venus/helpers.c b/drivers/media/platform/qcom/venus/helpers.c index f0413236a56f..49c52ef1084a 100644 --- a/drivers/media/platform/qcom/venus/helpers.c +++ b/drivers/media/platform/qcom/venus/helpers.c @@ -1113,6 +1113,27 @@ int venus_helper_set_work_mode(struct venus_inst *inst, u32 mode) } EXPORT_SYMBOL_GPL(venus_helper_set_work_mode); +int venus_helper_set_format_constraints(struct venus_inst *inst) +{ + const u32 ptype = HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO; + struct hfi_uncompressed_plane_actual_constraints_info pconstraint; + + pconstraint.buffer_type = HFI_BUFFER_OUTPUT2; + pconstraint.num_planes = 2; + pconstraint.plane_format[0].stride_multiples = 128; + pconstraint.plane_format[0].max_stride = 8192; + pconstraint.plane_format[0].min_plane_buffer_height_multiple = 32; + pconstraint.plane_format[0].buffer_alignment = 256; + + pconstraint.plane_format[1].stride_multiples = 128; + pconstraint.plane_format[1].max_stride = 8192; + pconstraint.plane_format[1].min_plane_buffer_height_multiple = 16; + pconstraint.plane_format[1].buffer_alignment = 256; + + return hfi_session_set_property(inst, ptype, &pconstraint); +} +EXPORT_SYMBOL_GPL(venus_helper_set_format_constraints); + int venus_helper_set_num_bufs(struct venus_inst *inst, unsigned int input_bufs, unsigned int output_bufs, unsigned int output2_bufs) diff --git a/drivers/media/platform/qcom/venus/helpers.h b/drivers/media/platform/qcom/venus/helpers.h index 351093845499..98106e6eee85 100644 --- a/drivers/media/platform/qcom/venus/helpers.h +++ b/drivers/media/platform/qcom/venus/helpers.h @@ -33,6 +33,7 @@ int venus_helper_set_output_resolution(struct venus_inst *inst, unsigned int width, unsigned int height, u32 buftype); int venus_helper_set_work_mode(struct venus_inst *inst, u32 mode); +int venus_helper_set_format_constraints(struct venus_inst *inst); int venus_helper_set_num_bufs(struct venus_inst *inst, unsigned int input_bufs, unsigned int output_bufs, unsigned int output2_bufs); diff --git a/drivers/media/platform/qcom/venus/hfi_cmds.c b/drivers/media/platform/qcom/venus/hfi_cmds.c index 4f7565834469..cc282b0df8c3 100644 --- a/drivers/media/platform/qcom/venus/hfi_cmds.c +++ b/drivers/media/platform/qcom/venus/hfi_cmds.c @@ -1249,6 +1249,19 @@ pkt_session_set_property_6xx(struct hfi_session_set_property_pkt *pkt, pkt->data[0] = ptype; switch (ptype) { + case HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO: { + struct hfi_uncompressed_plane_actual_constraints_info *in = pdata; + struct hfi_uncompressed_plane_actual_constraints_info *info = prop_data; + + info->buffer_type = in->buffer_type; + info->num_planes = in->num_planes; + info->plane_format[0] = in->plane_format[0]; + if (in->num_planes > 1) + info->plane_format[1] = in->plane_format[1]; + + pkt->shdr.hdr.size += sizeof(u32) + sizeof(*info); + break; + } case HFI_PROPERTY_CONFIG_HEIC_FRAME_QUALITY: { struct hfi_heic_frame_quality *in = pdata, *cq = prop_data; diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 84c16f33e01b..88ac40ce12e6 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -698,6 +698,10 @@ static int vdec_output_conf(struct venus_inst *inst) if (ret) return ret; + ret = venus_helper_set_format_constraints(inst); + if (ret) + return ret; + if (inst->dpb_fmt) { ret = venus_helper_set_multistream(inst, false, true); if (ret) From patchwork Mon Feb 22 16:02:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385804 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1397159jap; Mon, 22 Feb 2021 08:05:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJwB16uF7KLOK3qTzZdOhKcyxqErwng5sFlQ8hF61O0j1Q8tWeq2zdLetdc6/xsXChArh6QL X-Received: by 2002:a05:6402:1118:: with SMTP id u24mr23447973edv.386.1614009928701; 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.01.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:01:59 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 23/25] media: venus: hfi: Increase plat_buf_v6 o/p buffer count. Date: Mon, 22 Feb 2021 16:02:58 +0000 Message-Id: <20210222160300.1811121-24-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal Presently, minimum buffer count for output buffers for h264 & hevc codec is kept as 8 which might not be sufficient for few use cases so increasing the value to 18. Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c b/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c index d43d1a53e72d..075d9546b15e 100644 --- a/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c +++ b/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c @@ -1159,7 +1159,7 @@ static int output_buffer_count(u32 session_type, u32 codec) case V4L2_PIX_FMT_H264: case V4L2_PIX_FMT_HEVC: default: - output_min_count = 8; + output_min_count = 18; break; } } else { From patchwork Mon Feb 22 16:02:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385807 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1398508jap; Mon, 22 Feb 2021 08:07:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJxyBlsl+Udx9eZbqE6WzhrOyAV2L9VM3t1sd6EVH6QFJq8/t864heGGmnny3HCAJs0b3TUf X-Received: by 2002:a17:906:9259:: with SMTP id c25mr21725644ejx.37.1614010022588; Mon, 22 Feb 2021 08:07:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614010022; cv=none; d=google.com; s=arc-20160816; b=vEAquYGMczygqnF8vjSPUlKGm3qWhy6QHS/IM6HhEbKqBGsEyok4g3Go1GgY86MGbl E9J+cisi5uxm15i/7lkLHq27dMVSb/PUyY31ZmIg7jYTIOf+jw6aqua6mQV6lx3XIIQN TMNK0fqEiX79dLIAjTbBvldys6NiuoXrR/aTOHnvEDFRtDMRAmg7xVn/vxHEMRNRQeqy 6wfGFMg1vyC+8e68FuPBs5FaXnO9fjvWKhp/UmoGI/B5sYDJOEMKgKD9JdiVSF7qbPAG Ts/FKHAK+/57jM5YI/XUYclajoW+LvI9XDlYK8Gve675ohi+632RfQRT7lK61L6o48KB uX/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pfIMQmRvBRAsHIKgJ62jXmImUTOOwe3Pc0x2EfcpNSk=; b=fThIeTsW/tfpTad32D6Aotn2ayNTPUgK1NpVQuBfhVI3VXG6L+YGJ5n3XwF+2SCEHL auNtb13XcqFxr/rhLhannc4JFS9rFugIJC+rVDyHKkFDZmpMMvfy5JcoCcFxP0+xKCVw uA1ZGozVd9SPNknqyC8HZiY/ot+WQuLwgiuBfWy+ycrGQymp7TwWt5Q8IxMtnNlIYUZ9 FZcmPUZZlKrXiIIeNv51P9TVBljnHoUdGMOm58K+LTzT/OwBCT5Ji2fS5XLECnYqUlJq gbLu6lweewKDxLYdhOcnHKywYE3Zm+Jhbk8uFAR09FfFwFGfZfEPanJB4/BVlbWRXd/5 BioA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hEWXWKPh; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.02.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:02:01 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 24/25] media: venus: helper: Decide work mode Date: Mon, 22 Feb 2021 16:02:59 +0000 Message-Id: <20210222160300.1811121-25-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal Decide work mode for encoder and decoder based on different use-cases. Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/helpers.c | 31 ++++++++++++++++++++- drivers/media/platform/qcom/venus/helpers.h | 2 +- drivers/media/platform/qcom/venus/vdec.c | 2 +- drivers/media/platform/qcom/venus/venc.c | 2 +- 4 files changed, 33 insertions(+), 4 deletions(-) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/helpers.c b/drivers/media/platform/qcom/venus/helpers.c index 49c52ef1084a..49f2667ac5fa 100644 --- a/drivers/media/platform/qcom/venus/helpers.c +++ b/drivers/media/platform/qcom/venus/helpers.c @@ -18,6 +18,9 @@ #include "hfi_platform.h" #include "hfi_parser.h" +#define NUM_MBS_720P (((1280 + 15) >> 4) * ((720 + 15) >> 4)) +#define NUM_MBS_4K (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + struct intbuf { struct list_head list; u32 type; @@ -1100,14 +1103,40 @@ int venus_helper_set_output_resolution(struct venus_inst *inst, } EXPORT_SYMBOL_GPL(venus_helper_set_output_resolution); -int venus_helper_set_work_mode(struct venus_inst *inst, u32 mode) +static u32 venus_helper_get_work_mode(struct venus_inst *inst) +{ + u32 mode; + u32 num_mbs; + + mode = VIDC_WORK_MODE_2; + if (IS_V6(inst->core)) { + if (inst->session_type == VIDC_SESSION_TYPE_DEC) { + num_mbs = (ALIGN(inst->height, 16) * ALIGN(inst->width, 16)) / 256; + if (inst->hfi_codec == HFI_VIDEO_CODEC_MPEG2 || + inst->pic_struct != HFI_INTERLACE_FRAME_PROGRESSIVE || + num_mbs <= NUM_MBS_720P) + mode = VIDC_WORK_MODE_1; + } else { + num_mbs = (ALIGN(inst->out_height, 16) * ALIGN(inst->out_width, 16)) / 256; + if (inst->hfi_codec == HFI_VIDEO_CODEC_VP8 && + num_mbs <= NUM_MBS_4K) + mode = VIDC_WORK_MODE_1; + } + } + + return mode; +} + +int venus_helper_set_work_mode(struct venus_inst *inst) { const u32 ptype = HFI_PROPERTY_PARAM_WORK_MODE; struct hfi_video_work_mode wm; + u32 mode; if (!IS_V4(inst->core) && !IS_V6(inst->core)) return 0; + mode = venus_helper_get_work_mode(inst); wm.video_work_mode = mode; return hfi_session_set_property(inst, ptype, &wm); } diff --git a/drivers/media/platform/qcom/venus/helpers.h b/drivers/media/platform/qcom/venus/helpers.h index 98106e6eee85..e6269b4be3af 100644 --- a/drivers/media/platform/qcom/venus/helpers.h +++ b/drivers/media/platform/qcom/venus/helpers.h @@ -32,7 +32,7 @@ int venus_helper_set_input_resolution(struct venus_inst *inst, int venus_helper_set_output_resolution(struct venus_inst *inst, unsigned int width, unsigned int height, u32 buftype); -int venus_helper_set_work_mode(struct venus_inst *inst, u32 mode); +int venus_helper_set_work_mode(struct venus_inst *inst); int venus_helper_set_format_constraints(struct venus_inst *inst); int venus_helper_set_num_bufs(struct venus_inst *inst, unsigned int input_bufs, unsigned int output_bufs, diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 88ac40ce12e6..903443a7a757 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -647,7 +647,7 @@ static int vdec_output_conf(struct venus_inst *inst) u32 ptype; int ret; - ret = venus_helper_set_work_mode(inst, VIDC_WORK_MODE_2); + ret = venus_helper_set_work_mode(inst); if (ret) return ret; diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c index 6976ed553647..4b5ab0c790c9 100644 --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c @@ -550,7 +550,7 @@ static int venc_set_properties(struct venus_inst *inst) u32 profile, level; int ret; - ret = venus_helper_set_work_mode(inst, VIDC_WORK_MODE_2); + ret = venus_helper_set_work_mode(inst); if (ret) return ret; From patchwork Mon Feb 22 16:03:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 385805 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp1398485jap; Mon, 22 Feb 2021 08:07:01 -0800 (PST) X-Google-Smtp-Source: ABdhPJwKW8UdD6K86bMtuPgiaOQRiwUwT9bZgoJ42AFiBpy5xAD9+kkqSJFo3v0bDLmUQllfgGNe X-Received: by 2002:a17:906:6a4d:: with SMTP id n13mr20964213ejs.228.1614010020663; Mon, 22 Feb 2021 08:07:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614010020; cv=none; d=google.com; s=arc-20160816; b=HhhxP3+tnga9AqgdVyR5yDQaCuh7ce0hJUIcAZRaLnXPd7JQm7cecZT9f+pG10FIvG Bv4QOB6R4+41ONTTOwLvuLQWU+TY3S7Z+d0GTayaB3iyhyvqyZmpRu1PyEN1mWwukTG7 MR/peCez3I9g8Ef4U8OmSqRwGCJX5WG9kTh5DPJqwSte60DMhazea1+ctPa8dB0nsS8M JgO3F0PAm0/w2FC8GvpmFlJ33RJMox7dNVgY2/jGjPLvGJOexqepJRtPp7hIWT9DmS2W RDhNAfNiKhisI65npAzEsUQMTCMKp0IZYmqhtTW06xZD3/yy4GtXLAt5pIUy0YM0+11a 0KRA== ARC-Message-Signature: i=1; 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c3sm7373697wrw.80.2021.02.22.08.02.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 08:02:02 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH 25/25] media: venus: vdec: Fix decoder cmd STOP issue Date: Mon, 22 Feb 2021 16:03:00 +0000 Message-Id: <20210222160300.1811121-26-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> References: <20210222160300.1811121-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Stanimir Varbanov Fixes an issue when issuing a stop command to the controller, negating the following firmware error. "SFR message from FW: Exception: TID = Unknown IP = 0x3b7dc FA = 0x0 cause = 0x6" Signed-off-by: Stanimir Varbanov Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/hfi_cmds.c | 2 +- drivers/media/platform/qcom/venus/vdec.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 2.29.2 diff --git a/drivers/media/platform/qcom/venus/hfi_cmds.c b/drivers/media/platform/qcom/venus/hfi_cmds.c index cc282b0df8c3..0a32bb44506c 100644 --- a/drivers/media/platform/qcom/venus/hfi_cmds.c +++ b/drivers/media/platform/qcom/venus/hfi_cmds.c @@ -254,7 +254,7 @@ int pkt_session_unset_buffers(struct hfi_session_release_buffer_pkt *pkt, int pkt_session_etb_decoder(struct hfi_session_empty_buffer_compressed_pkt *pkt, void *cookie, struct hfi_frame_data *in_frame) { - if (!cookie || !in_frame->device_addr) + if (!cookie) return -EINVAL; pkt->shdr.hdr.size = sizeof(*pkt); diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 903443a7a757..9fbff40c4568 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -515,7 +515,7 @@ vdec_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd) fdata.buffer_type = HFI_BUFFER_INPUT; fdata.flags |= HFI_BUFFERFLAG_EOS; - fdata.device_addr = 0xdeadb000; + fdata.device_addr = 0; ret = hfi_session_process_buf(inst, &fdata);