From patchwork Fri Apr 6 15:17:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 132924 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp914489ljb; Fri, 6 Apr 2018 08:19:00 -0700 (PDT) X-Google-Smtp-Source: AIpwx49NJ2h0p2d5jfiUwwFBkZ4UwOJn08kLLu4Cw+Jqpx+7xInGJ3N32VsjyFkI8FIfrB3qPqBn X-Received: by 10.55.215.139 with SMTP id t11mr35753618qkt.90.1523027940151; Fri, 06 Apr 2018 08:19:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523027940; cv=none; d=google.com; s=arc-20160816; b=z3lSFUwjCn3aWMMmEVJSajyaHHXyqsSo34GsciHOeTOeufczHhGJGgbguEc/3MuflN M6nJAvS20vQYd1fNXPqJWlvMmRsLlEyVbkohRuaWx5wv8NP5ahC+b1QwT3WXdXgQiiaf xt5lLW/o8cOxICbWnPxeKQBqPWMO0W4BQW7D5BWqb6hZk6XfBJLOMLEASgQ+Jt7EIAUy lizaMTMUd77j5uqZZf9AGsTZY/zryMkt0t/5J62rL8WrMz+zg8//ppS2ueziDMM26Yjo ffiOgSMu7cGuBftYW5e22AveUivWR5WW8VHNyy4VsOUOzdCNvAVZOWkbe9Q/T5wRiXNn PVgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=scXtL4E7tbkr5vR7eDGV4KBNJrsgFpvLkvJcPS0x02c=; b=kfQ1wOjutm1151jUixldQkkNficIzEq4n8dcM9jn5l3O0RRfx3Np9CQ+g1VjxUx/W9 IJt5jFChCueuxAKrOD4T/7QDYLsTz9Uef1F1fL/8oN+Ly+Fe0WQ5UEaGbmDg8t3OiGZk 7I2GBfyT5Yl/Vl+6Wyiy/Xk+pUfKqN1c6VfAfcHbp46rJFnbKNqH453mXwk2zfjsFdSu naT4eXxGM21zC4ulP7IzSI2MyRRUNfvazGXHn3EAV1u7AYylEffQ/1s9sMLVTvQgYfHd 5CYrp8ZC4gD7OIiHNnyfxQcMlLrcGXvC05h3K44hQJ3EsaTj5VvT1s5FAyQiaZg/XNhl CLew== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id j35si11929053qkh.66.2018.04.06.08.18.59 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 06 Apr 2018 08:19:00 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:33931 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f4T8l-0003q3-I1 for patch@linaro.org; Fri, 06 Apr 2018 11:18:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60768) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f4T8C-0003mj-Ah for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:18:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f4T89-0004V2-3R for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:18:24 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:43962) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f4T88-0004Ua-PW for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:18:21 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w36FE8aN020618; Fri, 6 Apr 2018 17:18:19 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2h1ysxp456-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 06 Apr 2018 17:18:19 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id CCB2B3D; Fri, 6 Apr 2018 15:18:18 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9410CA6DF; Fri, 6 Apr 2018 15:18:18 +0000 (GMT) Received: from gnx2104.gnb.st.com (10.75.127.51) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 6 Apr 2018 17:18:18 +0200 From: Christophe Lyon To: , , Date: Fri, 6 Apr 2018 17:17:29 +0200 Message-ID: <20180406151752.10854-2-christophe.lyon@st.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180406151752.10854-1-christophe.lyon@st.com> References: <20180406151752.10854-1-christophe.lyon@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG6NODE1.st.com (10.75.127.16) To SFHDAG5NODE1.st.com (10.75.127.13) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-04-06_08:, , signatures=0 X-MIME-Autoconverted: from 8bit to quoted-printable by mx07-.pphosted.com id w36FE8aN020618 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 62.209.51.94 Subject: [Qemu-devel] [ARM/FDPIC 1/4] linux-user: ARM-FDPIC: Add configure option to support loading of FDPIC binaries X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Adds --enable-fdpic and --disable-fdpic configure options. This feature is disabled by default, that's why it is not described in the "Optional features" help section (which are enabled by default if possible). FDPIC ELF objects are identified with e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC. Co-Authored-By: Mickaël Guêné Signed-off-by: Christophe Lyon -- 2.6.3 diff --git a/configure b/configure index 4d0e92c..af4c14b 100755 --- a/configure +++ b/configure @@ -451,6 +451,7 @@ jemalloc="no" replication="yes" vxhs="" libxml2="" +fdpic="no" supported_cpu="no" supported_os="no" @@ -1374,6 +1375,10 @@ for opt do ;; --disable-git-update) git_update=no ;; + --disable-fdpic) fdpic="no" + ;; + --enable-fdpic) fdpic="yes" + ;; *) echo "ERROR: unknown option $opt" echo "Try '$0 --help' for more information" @@ -1544,6 +1549,8 @@ Advanced options (experts only): xen pv domain builder --enable-debug-stack-usage track the maximum stack usage of stacks created by qemu_alloc_stack + --disable-fdpic disable loading of FDPIC binary (default) + --enable-fdpic enable loading of FDPIC binary Optional features, enabled with --enable-FEATURE and disabled with --disable-FEATURE, default is enabled if available: @@ -7085,6 +7092,9 @@ fi echo "LDFLAGS+=$ldflags" >> $config_target_mak echo "QEMU_CFLAGS+=$cflags" >> $config_target_mak +if [ "$fdpic" = "yes" ]; then + echo "CONFIG_USE_FDPIC=y" >> $config_target_mak +fi done # for target in $targets diff --git a/include/elf.h b/include/elf.h index c0dc9bb..934dbbd 100644 --- a/include/elf.h +++ b/include/elf.h @@ -1483,6 +1483,7 @@ typedef struct elf64_shdr { #define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */ #define ELFOSABI_MODESTO 11 /* Novell Modesto. */ #define ELFOSABI_OPENBSD 12 /* OpenBSD. */ +#define ELFOSABI_ARM_FDPIC 65 /* ARM FDPIC */ #define ELFOSABI_ARM 97 /* ARM */ #define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */ diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 23e3495..7ba3795 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1658,6 +1658,14 @@ static void zero_bss(abi_ulong elf_bss, abi_ulong last_bss, int prot) } #ifdef CONFIG_USE_FDPIC + +#ifdef TARGET_ARM +static int elf_is_fdpic(struct elfhdr *exec) +{ + return exec->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC; +} +#endif + static abi_ulong loader_build_fdpic_loadmap(struct image_info *info, abi_ulong sp) { uint16_t n; From patchwork Fri Apr 6 15:17:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 132925 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp917311ljb; Fri, 6 Apr 2018 08:21:41 -0700 (PDT) X-Google-Smtp-Source: AIpwx49TNeig9aB9/vXgt5a4PtKv6fxQ1ku9oo2Er4iBeuP+udl2nrD+t0AintA69J0lGj/kNnzz X-Received: by 10.55.214.25 with SMTP id t25mr36995510qki.233.1523028100937; Fri, 06 Apr 2018 08:21:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523028100; cv=none; d=google.com; s=arc-20160816; b=RO5jUdbQMA3NaGHTylf/N0uYOM81e607o302EbYswXSoqOvEotbiMx3ZWUZQBCMQFi ZjPvNFz25swt4dZB5xDhFbtgKmM/Y5wDCxPgNwvRnXlJrXJSyIJ5BMJJdx6L1YmgDc5m kotXPSrFP3tVUM+iNd8I3faUhpmdNZCj1UTX4OmCsB5+2aslT+uTc57V1Tcogd8hpFPk CsN9hCAG9cEsM48ls5DE+AoTgGwLRN8Z1JIM3y9J3LmzKtBOD3kSqmprk6XegWlwDgs6 OrYMOons8StvBGrOgco2OwMQFpFYWNTOj3YybyvsGgHJVxilRvptn/X3+Miz6o5eZW5j A3Qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=pf7pmqWn8FDKhTImiECSQdvY6LfzWdy4YKvi/qUAmdI=; b=aCHL4L93MOLV+Q/7i0pQhKZml3r9udKtZsWLKJ+Nd9C5/vTbHzYVHTEeeuOjVwUsXu 3uHL+n3+4ykjHXdyOnLkthwtEZCKreRTW6TWIEp1NTRswe9Zj73YAW6bSJIbbA0HFB5p EkOc0Y49JND9bdjDpod0wfc2C2XfiZpoErZvKtMf113KV9lbTR2QGZQPlF3/q7OCgn1K dnQSJKZonkfRIJKPGIAVThRLwkWTWutWhs91BYf9bmzmhd97HhkDvp1nNoR5Bpa73hf5 ajpNxdnQzR/MvIpzsQjpCHnpe20Egm3joj/MzabCPdmyhcmQs9lUnPSFEkYs+35pHbbd dpog== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id r186si2936446qkb.435.2018.04.06.08.21.40 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 06 Apr 2018 08:21:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:33954 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f4TBM-0006Sy-Bh for patch@linaro.org; Fri, 06 Apr 2018 11:21:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60903) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f4T8W-000467-Vf for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:18:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f4T8T-0004cO-OB for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:18:44 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:54306 helo=mx07-00178001.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f4T8T-0004br-FD for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:18:41 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w36FF2SZ018353; Fri, 6 Apr 2018 17:18:39 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2h1yf7pr8u-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 06 Apr 2018 17:18:39 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E6AAB31; Fri, 6 Apr 2018 15:18:38 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id CC6C7A555; Fri, 6 Apr 2018 15:18:38 +0000 (GMT) Received: from gnx2104.gnb.st.com (10.75.127.51) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 6 Apr 2018 17:18:38 +0200 From: Christophe Lyon To: , , Date: Fri, 6 Apr 2018 17:17:30 +0200 Message-ID: <20180406151752.10854-3-christophe.lyon@st.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180406151752.10854-1-christophe.lyon@st.com> References: <20180406151752.10854-1-christophe.lyon@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG6NODE1.st.com (10.75.127.16) To SFHDAG5NODE1.st.com (10.75.127.13) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-04-06_08:, , signatures=0 X-MIME-Autoconverted: from 8bit to quoted-printable by mx08-.pphosted.com id w36FF2SZ018353 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 91.207.212.93 Subject: [Qemu-devel] [ARM/FDPIC 2/4] linux-user: ARM-FDPIC: Add support of FDPIC for ARM. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add FDPIC info into image_info structure since interpreter info is on stack and needs to be saved to be accessed later on. Co-Authored-By: Mickaël Guêné Signed-off-by: Christophe Lyon -- 2.6.3 diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 7ba3795..363da67 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -287,6 +287,23 @@ static inline void init_thread(struct target_pt_regs *regs, /* For uClinux PIC binaries. */ /* XXX: Linux does this only on ARM with no MMU (do we care ?) */ regs->uregs[10] = infop->start_data; +#ifdef CONFIG_USE_FDPIC + /* Support ARM FDPIC. */ + /* As described in the ABI document, r7 points to the loadmap info + * prepared by the kernel. If an interpreter is needed, r8 points + * to the interpreter loadmap and r9 points to the interpreter + * PT_DYNAMIC info. If no interpreter is needed, r8 is zer0, and + * r9 points to the main program PT_DYNAMIC info. */ + regs->uregs[7] = infop->loadmap_addr; + if (infop->interpreter_loadmap_addr) { + /* Executable is dynamically loaded. */ + regs->uregs[8] = infop->interpreter_loadmap_addr; + regs->uregs[9] = infop->interpreter_pt_dynamic_addr; + } else { + regs->uregs[8] = 0; + regs->uregs[9] = infop->pt_dynamic_addr; + } +#endif } #define ELF_NREG 18 @@ -1692,6 +1709,11 @@ static abi_ulong loader_build_fdpic_loadmap(struct image_info *info, abi_ulong s } #endif +int info_is_fdpic(struct image_info *info) +{ + return (info->personality == PER_LINUX_FDPIC); +} + static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc, struct elfhdr *exec, struct image_info *info, @@ -1719,6 +1741,11 @@ static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc, if (interp_info) { interp_info->other_info = info; sp = loader_build_fdpic_loadmap(interp_info, sp); + info->interpreter_loadmap_addr = interp_info->loadmap_addr; + info->interpreter_pt_dynamic_addr = interp_info->pt_dynamic_addr; + } else { + info->interpreter_loadmap_addr = 0; + info->interpreter_pt_dynamic_addr = 0; } } #endif diff --git a/linux-user/main.c b/linux-user/main.c index ba09b7d..00810d6 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -4868,6 +4868,11 @@ int main(int argc, char **argv, char **envp) env->cp15.sctlr_el[i] |= SCTLR_EE; } #endif + +#if defined(CONFIG_USE_FDPIC) + /* Are we running an FDPIC binary? */ + env->is_fdpic = info_is_fdpic(info); +#endif } #elif defined(TARGET_ARM) { diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 192a0d2..7eaf9e9 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -56,6 +56,8 @@ struct image_info { uint16_t nsegs; void *loadsegs; abi_ulong pt_dynamic_addr; + abi_ulong interpreter_loadmap_addr; + abi_ulong interpreter_pt_dynamic_addr; struct image_info *other_info; #endif }; @@ -182,6 +184,7 @@ abi_ulong loader_build_argptr(int envc, int argc, abi_ulong sp, int loader_exec(int fdexec, const char *filename, char **argv, char **envp, struct target_pt_regs * regs, struct image_info *infop, struct linux_binprm *); +int info_is_fdpic(struct image_info *info); uint32_t get_elf_eflags(int fd); int load_elf_binary(struct linux_binprm *bprm, struct image_info *info); diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 19a0c03..90c8ee1 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -629,6 +629,12 @@ typedef struct CPUARMState { const struct arm_boot_info *boot_info; /* Store GICv3CPUState to access from this struct */ void *gicv3state; + +#if defined(CONFIG_USER_ONLY) && defined(CONFIG_USE_FDPIC) + /* We need to know if we have an FDPIC binary to adapt signal + * syscalls. */ + int is_fdpic; +#endif } CPUARMState; /** From patchwork Fri Apr 6 15:17:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 132926 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp917766ljb; Fri, 6 Apr 2018 08:22:07 -0700 (PDT) X-Google-Smtp-Source: AIpwx497Rf4oVOiiJCaTNrwZupnwtz9X1Osw4K3VdC0L82c0ty9TCrfvIubbKdI53uInSNRx5ZkD X-Received: by 10.200.30.24 with SMTP id n24mr38961781qtl.118.1523028126962; Fri, 06 Apr 2018 08:22:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523028126; cv=none; d=google.com; s=arc-20160816; b=kI6ZrLXen8MWKmXNM4+ziHsGyrPwrxa5+UEuTNo5zCraOVwVhXbSnVVr8MHT7ZNMWX Bv4VCOQgwmzhom8Oe/PrFeLZfw8y0AOsVn7Psix0KrYB5yw3qdII94AehUXk+zIpoZtw uBpNxsDTg8hxTVakHqfsrRnZFBi6GjRoWux0Ukc65EXU89Sw8yixGaDzOdmW+o71C0Of O9neU0dCjDLAihIOpkBemLU03KDLrWljet8HbJFRPTHHl0h96WYP9HxrmHOMIdRvG22L PsuN7IenDG2m2U7v1U9ep9onWwRvlTQawNjLmvSmc6nntIBeZgz6TKZqI2lAnvT0eRqQ 9U6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=fIqHmrivu9vrNuF/nuP4zNGR7fycbu3teq6kuohnzPM=; b=c9mpAGH3AZTXy5vw0+C8lrOwPZuZKf9Z6vuSeInLOi/9iriPm5u9r8MFoSoTmIxpRw HdEmUdfHbybDRNKMUuJmoELzcLz4mbzdNS1ARwhQhGXXzKlYwfJb2TTvuXpJzzteTXIY +8ZKq4votH+IDJLfCgy22eWy2g9BzWmmRVOh3eKWpchiluqZgZ4R6bkxvnlHL+XZLCPx 6v6lVwhniGliKUM9dCWSD/Jasn7gecuutS42qDslTOUer2HveY1DZcSLz0mHdgg7GGOJ pCHN+wzjGMmRjtO0wj41pF36Jy01j32zrpQYc1Um9u0mZNvUjccCJBIDXoWVLNELKI8t hNJw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id s196si8528763qke.94.2018.04.06.08.22.06 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 06 Apr 2018 08:22:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:34016 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f4TBm-0006va-BB for patch@linaro.org; Fri, 06 Apr 2018 11:22:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32776) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f4T8q-0004On-G2 for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:19:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f4T8n-0004hO-8a for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:19:04 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:23918 helo=mx07-00178001.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f4T8m-0004h4-UI for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:19:01 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w36FF60w018365; Fri, 6 Apr 2018 17:18:59 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2h1yf7prat-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 06 Apr 2018 17:18:59 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3221831; Fri, 6 Apr 2018 15:18:59 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 17188A6EA; Fri, 6 Apr 2018 15:18:59 +0000 (GMT) Received: from gnx2104.gnb.st.com (10.75.127.51) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 6 Apr 2018 17:18:58 +0200 From: Christophe Lyon To: , , Date: Fri, 6 Apr 2018 17:17:31 +0200 Message-ID: <20180406151752.10854-4-christophe.lyon@st.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180406151752.10854-1-christophe.lyon@st.com> References: <20180406151752.10854-1-christophe.lyon@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG6NODE1.st.com (10.75.127.16) To SFHDAG5NODE1.st.com (10.75.127.13) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-04-06_08:, , signatures=0 X-MIME-Autoconverted: from 8bit to quoted-printable by mx08-.pphosted.com id w36FF60w018365 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 91.207.212.93 Subject: [Qemu-devel] [ARM/FDPIC 3/4] linux-user: ARM-FDPIC: Add support for signals for FDPIC targets X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The FDPIC restorer needs to deal with a function descriptor, hence we have to extend 'retcode' such that it can hold the instructions needed to perform this. The restorer sequence uses the same thumbness as the exception handler (mainly to support Thumb-only architectures). Co-Authored-By: Mickaël Guêné Signed-off-by: Christophe Lyon -- 2.6.3 diff --git a/linux-user/signal.c b/linux-user/signal.c index 2ea3e03..75643d7 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -2039,13 +2039,13 @@ struct sigframe_v1 { struct target_sigcontext sc; abi_ulong extramask[TARGET_NSIG_WORDS-1]; - abi_ulong retcode; + abi_ulong retcode[4]; }; struct sigframe_v2 { struct target_ucontext_v2 uc; - abi_ulong retcode; + abi_ulong retcode[4]; }; struct rt_sigframe_v1 @@ -2054,14 +2054,14 @@ struct rt_sigframe_v1 abi_ulong puc; struct target_siginfo info; struct target_ucontext_v1 uc; - abi_ulong retcode; + abi_ulong retcode[4]; }; struct rt_sigframe_v2 { struct target_siginfo info; struct target_ucontext_v2 uc; - abi_ulong retcode; + abi_ulong retcode[4]; }; #define TARGET_CONFIG_CPU_32 1 @@ -2084,6 +2084,23 @@ static const abi_ulong retcodes[4] = { SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN }; +#if defined(CONFIG_USE_FDPIC) +/* + * Stub needed to make sure the FD register (r9) contains the right + * value. + */ +static const unsigned long sigreturn_fdpic_codes[3] = { + 0xe59fc004, /* ldr r12, [pc, #4] to read function descriptor */ + 0xe59c9004, /* ldr r9, [r12, #4] to setup GOT */ + 0xe59cf000 /* ldr pc, [r12] to jump into restorer */ +}; + +static const unsigned long sigreturn_fdpic_thumb_codes[3] = { + 0xc008f8df, /* ldr r12, [pc, #8] to read function descriptor */ + 0x9004f8dc, /* ldr r9, [r12, #4] to setup GOT */ + 0xf000f8dc /* ldr pc, [r12] to jump into restorer */ +}; +#endif static inline int valid_user_regs(CPUARMState *regs) { @@ -2143,7 +2160,19 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, { abi_ulong handler = ka->_sa_handler; abi_ulong retcode; + +#ifdef CONFIG_USE_FDPIC + int thumb; + + if (env->is_fdpic) { + thumb = (((abi_ulong *)g2h(ka->_sa_handler))[0]) & 1; + } else { + thumb = handler & 1; + } +#else int thumb = handler & 1; +#endif + uint32_t cpsr = cpsr_read(env); cpsr &= ~CPSR_IT; @@ -2154,8 +2183,37 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, } if (ka->sa_flags & TARGET_SA_RESTORER) { +#ifdef CONFIG_USE_FDPIC + if (env->is_fdpic) { + /* For FDPIC we ensure that the restorer is called with a + * correct r9 value. For that we need to write code on + * the stack that sets r9 and jumps back to restorer + * value. + */ + if (thumb) { + __put_user(sigreturn_fdpic_thumb_codes[0], rc); + __put_user(sigreturn_fdpic_thumb_codes[1], rc + 1); + __put_user(sigreturn_fdpic_thumb_codes[2], rc + 2); + __put_user((abi_ulong)ka->sa_restorer, rc + 3); + } else { + __put_user(sigreturn_fdpic_codes[0], rc); + __put_user(sigreturn_fdpic_codes[1], rc + 1); + __put_user(sigreturn_fdpic_codes[2], rc + 2); + __put_user((abi_ulong)ka->sa_restorer, rc + 3); + } + + retcode = rc_addr + thumb; + } else +#endif retcode = ka->sa_restorer; } else { +#ifdef CONFIG_USE_FDPIC + if (env->is_fdpic) { + qemu_log_mask(LOG_UNIMP, + "arm: FDPIC signal return not implemented"); + abort(); + } else { +#endif unsigned int idx = thumb; if (ka->sa_flags & TARGET_SA_SIGINFO) { @@ -2165,12 +2223,29 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, __put_user(retcodes[idx], rc); retcode = rc_addr + thumb; +#ifdef CONFIG_USE_FDPIC + } +#endif } env->regs[0] = usig; +#ifdef CONFIG_USE_FDPIC + if (env->is_fdpic) { + env->regs[9] = ((abi_ulong *)g2h(ka->_sa_handler))[1]; + } +#endif env->regs[13] = frame_addr; env->regs[14] = retcode; +#ifdef CONFIG_USE_FDPIC + if (env->is_fdpic) { + env->regs[15] = ((abi_ulong *)g2h(ka->_sa_handler))[0] + & (thumb ? ~1 : ~3); + } else { + env->regs[15] = handler & (thumb ? ~1 : ~3); + } +#else env->regs[15] = handler & (thumb ? ~1 : ~3); +#endif cpsr_write(env, cpsr, CPSR_IT | CPSR_T, CPSRWriteByInstr); } @@ -2264,7 +2339,7 @@ static void setup_frame_v1(int usig, struct target_sigaction *ka, __put_user(set->sig[i], &frame->extramask[i - 1]); } - setup_return(regs, ka, &frame->retcode, frame_addr, usig, + setup_return(regs, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct sigframe_v1, retcode)); unlock_user_struct(frame, frame_addr, 1); @@ -2286,7 +2361,7 @@ static void setup_frame_v2(int usig, struct target_sigaction *ka, setup_sigframe_v2(&frame->uc, set, regs); - setup_return(regs, ka, &frame->retcode, frame_addr, usig, + setup_return(regs, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct sigframe_v2, retcode)); unlock_user_struct(frame, frame_addr, 1); @@ -2341,7 +2416,7 @@ static void setup_rt_frame_v1(int usig, struct target_sigaction *ka, __put_user(set->sig[i], &frame->uc.tuc_sigmask.sig[i]); } - setup_return(env, ka, &frame->retcode, frame_addr, usig, + setup_return(env, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct rt_sigframe_v1, retcode)); env->regs[1] = info_addr; @@ -2372,7 +2447,7 @@ static void setup_rt_frame_v2(int usig, struct target_sigaction *ka, setup_sigframe_v2(&frame->uc, set, env); - setup_return(env, ka, &frame->retcode, frame_addr, usig, + setup_return(env, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct rt_sigframe_v2, retcode)); env->regs[1] = info_addr; From patchwork Fri Apr 6 15:17:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 132928 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp920030ljb; Fri, 6 Apr 2018 08:24:14 -0700 (PDT) X-Google-Smtp-Source: AIpwx4865APvqz7IIDJKM0SirxCfufC6nKLLeiV53qPOwb7jReeE1bDrg1dOaE8pNs0eu6Quk6BB X-Received: by 10.55.159.201 with SMTP id i192mr35724780qke.125.1523028254043; Fri, 06 Apr 2018 08:24:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523028254; cv=none; d=google.com; s=arc-20160816; b=hT5SlHFLz0DmuruV2FJ8L+VJe/eNn1m6EKYYXH5g5mesKg/JgU/1M6P4eOEKUBlthy LBL8P67fPZ0X8cJnkNwVcmEGQXvttVnuIO+zAhtlxjEYTEWjc371ohCBifhD3GzMeg7L h3EtWKb/CdrU2ectGzqfVNfL+VFM+3Y0y3x+0Dgr8KF7lj7Sh92YDOZHiOU8jjWYboHD ni+eTTG3dyHsDgRj80mncoI5Q8CBpxuBJhTlXfLGdDdOyl9Xzxnp9Es1vV+4o+5Ubs3U tqAmrHyhoevFGpKrmp2IdRYbeJmQwzjhySuqZMuyG/dGhVhAXO1pimfQNO2qjBICkt8U Tf4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=L4i06E33CBREj3Y62m3bKlbKfvA0KhjnSVjcr3erI/8=; b=Ckw2YDVWK/63O+acLWC+Io/5s2U7d+5zGqUfeTOS5UJsrx90U6Fpr8zgBRECCu3DUN AqDJWshYrwxqiqeVqQaJETawN0/0LBVHUe5KxF/VPZotwh/V86FKgTb686S9jXP94HFR Uo7cyCRVkQNIF6s93PUd3i7GjWNQNBTq8Ge8OaVn07qMZKBMt9dNhy8Phm0ND0nkzuZd zfs5VLeHgKODkJHP86U/5qzz+Ekzw1Gq/JXC56tOXEunjIQpWOgnVtkp+RxGS//nfrMF NORUPq39LBseezzIdU2uLSKxCn6HfmUvE3cFzoJ4nT7WwCKSm6bTH23aZn4xdWEXzdav DftA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id u14si3056013qtc.61.2018.04.06.08.24.13 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 06 Apr 2018 08:24:14 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:34060 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f4TDp-0000JG-Cx for patch@linaro.org; Fri, 06 Apr 2018 11:24:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32915) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f4T9E-0004j3-3w for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:19:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f4T97-0004pX-Ld for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:19:28 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:21758 helo=mx07-00178001.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f4T97-0004p0-Bw for qemu-devel@nongnu.org; Fri, 06 Apr 2018 11:19:21 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w36FF9s8018376; Fri, 6 Apr 2018 17:19:20 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2h1yf7prcq-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 06 Apr 2018 17:19:20 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5B88431; Fri, 6 Apr 2018 15:19:19 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 49049A6EC; Fri, 6 Apr 2018 15:19:19 +0000 (GMT) Received: from gnx2104.gnb.st.com (10.75.127.51) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 6 Apr 2018 17:19:18 +0200 From: Christophe Lyon To: , , Date: Fri, 6 Apr 2018 17:17:32 +0200 Message-ID: <20180406151752.10854-5-christophe.lyon@st.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180406151752.10854-1-christophe.lyon@st.com> References: <20180406151752.10854-1-christophe.lyon@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG6NODE1.st.com (10.75.127.16) To SFHDAG5NODE1.st.com (10.75.127.13) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-04-06_08:, , signatures=0 X-MIME-Autoconverted: from 8bit to quoted-printable by mx08-.pphosted.com id w36FF9s8018376 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 91.207.212.93 Subject: [Qemu-devel] [ARM/FDPIC 4/4] linux-user: ARM-FDPIC: Add arm get tls syscall support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Co-Authored-By: Mickaël Guêné Signed-off-by: Christophe Lyon -- 2.6.3 Reviewed-by: Peter Maydell diff --git a/linux-user/arm/target_syscall.h b/linux-user/arm/target_syscall.h index 94e2a42..afc0772 100644 --- a/linux-user/arm/target_syscall.h +++ b/linux-user/arm/target_syscall.h @@ -16,6 +16,7 @@ struct target_pt_regs { #define ARM_NR_breakpoint (ARM_NR_BASE + 1) #define ARM_NR_cacheflush (ARM_NR_BASE + 2) #define ARM_NR_set_tls (ARM_NR_BASE + 5) +#define ARM_NR_get_tls (ARM_NR_BASE + 6) #define ARM_NR_semihosting 0x123456 #define ARM_NR_thumb_semihosting 0xAB diff --git a/linux-user/main.c b/linux-user/main.c index 00810d6..1814578 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -720,6 +720,9 @@ void cpu_loop(CPUARMState *env) case ARM_NR_breakpoint: env->regs[15] -= env->thumb ? 2 : 4; goto excp_debug; + case ARM_NR_get_tls: + env->regs[0] = cpu_get_tls(env); + break; default: gemu_log("qemu: Unsupported ARM syscall: 0x%x\n", n);