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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id b78sm7038785pfj.6.2018.04.16.12.35.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 16 Apr 2018 12:35:30 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org, corbet@lwn.net Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Ben.Gainey@arm.com Subject: [PATCH 1/3] coresight: Remove obsolete reference to "owner" in CoreSight descriptor Date: Mon, 16 Apr 2018 13:35:25 -0600 Message-Id: <1523907327-20979-2-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523907327-20979-1-git-send-email-mathieu.poirier@linaro.org> References: <1523907327-20979-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Field "owner" of struct coresight_desc has been removed a while back but the documentation was not updated to reflect the changes. Signed-off-by: Mathieu Poirier --- Documentation/trace/coresight.txt | 3 --- 1 file changed, 3 deletions(-) -- 2.7.4 diff --git a/Documentation/trace/coresight.txt b/Documentation/trace/coresight.txt index 6f0120c3a4f1..710c75b6c73f 100644 --- a/Documentation/trace/coresight.txt +++ b/Documentation/trace/coresight.txt @@ -187,9 +187,6 @@ that can be performed on them (see "struct coresight_ops"). The specific to that component only. "Implementation defined" customisations are expected to be accessed and controlled using those entries. -Last but not least, "struct module *owner" is expected to be set to reflect -the information carried in "THIS_MODULE". - How to use the tracer modules ----------------------------- From patchwork Mon Apr 16 19:35:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 133490 Delivered-To: patch@linaro.org Received: by 10.46.84.18 with SMTP id i18csp3927060ljb; Mon, 16 Apr 2018 12:36:07 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+JzwiqVYuhlB/HAWuPUVzBm91L8YcQujcLyyY5Ff0v6XX5aBNt8fBzxm9/c/wxtTN/hMbF X-Received: by 10.98.33.72 with SMTP id h69mr9842071pfh.54.1523907367286; Mon, 16 Apr 2018 12:36:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523907367; cv=none; d=google.com; s=arc-20160816; b=nX+eOwtLCiBkw697AoYUFjye1OclpRrdlm88/OkTGkgrP23uLIC8BljRYw1mnLQiTa Nq4Z1xBTqD2xd/WZpwNhmrWxOGe+iMZS4XGiB+9QYaG842Cd/pubhX6t2UlgaS0HgfgU /obVGOHcrDg4WQeSr//wHdLGNxsO5Qq0p5HZ/SooP8xfeOgKc9i2BEJE++SkZUqUUkWi SO5Q0/js2doKbBsNClY6293YZGLLeQMvtLPwPaXCxD+hlpJF+GLrVMKQv/0RaHJwRwoX DsFtKaqBNMPmGi7B5XPJzJIWrFI69TVsvc/y08Ef8cWY41oZy4Pbi8/vPT4ePcLs741o ycNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=D5mzh5DvKqqKFxogW1rUY3QVLuTlGlqgrQPU91eVHwg=; b=oKCPJTZ07rA1aOxSXlZvVlah8otu94FTsIXnUSQOjbxW/5jbiis8eZxJAaN2aQz91S dsuoVAHLxTzgK0t3J9GimDjPkagOySHN5Jv3PXXnlRUcUguNgsFMxJjf6+snJj+Nc2IG 05orOwkna3TP0ILtJksrdcwGc/TXDhp5ejzqPygH7HATd0W8brPXpvGLOwEbgvts/TMS ZAeFLnYfMujCaUGk6ZOsmN+OdbZ+7fXmMNxf/b4T8dVuVwRmCDRcjdtuOjW8D+oR4StX f2ib3+euxOGLsQOEmh5uFPR2R0+F8rhgUNTYE32SCL4t47eHzxeNXefIXDJ5rI+gi1sK Ns9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZiCW4H7I; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id b78sm7038785pfj.6.2018.04.16.12.35.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 16 Apr 2018 12:35:31 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org, corbet@lwn.net Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Ben.Gainey@arm.com Subject: [PATCH 2/3] coresight: Add section for integration with the perf tools Date: Mon, 16 Apr 2018 13:35:26 -0600 Message-Id: <1523907327-20979-3-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523907327-20979-1-git-send-email-mathieu.poirier@linaro.org> References: <1523907327-20979-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Adding a section that document how to use the Coresight framework and drivers from the perf tools. Signed-off-by: Mathieu Poirier --- Documentation/trace/coresight.txt | 50 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) -- 2.7.4 diff --git a/Documentation/trace/coresight.txt b/Documentation/trace/coresight.txt index 710c75b6c73f..8caae8050a60 100644 --- a/Documentation/trace/coresight.txt +++ b/Documentation/trace/coresight.txt @@ -187,9 +187,18 @@ that can be performed on them (see "struct coresight_ops"). The specific to that component only. "Implementation defined" customisations are expected to be accessed and controlled using those entries. + How to use the tracer modules ----------------------------- +There is two ways to use the Coresight framework: 1) using the perf cmd line +tools and 2) interacting directly with the Coresight devices using the sysFS +interface. Preference is given to the former as using the sysFS interface +requires a deep understanding of the Coresight HW. The following sections +provide details on using both methods. + +1) Using the sysFS interface: + Before trace collection can start, a coresight sink needs to be identify. There is no limit on the amount of sinks (nor sources) that can be enabled at any given moment. As a generic operation, all device pertaining to the sink @@ -295,6 +304,47 @@ Instruction 13570831 0x8026B584 E28DD00C false ADD Instruction 0 0x8026B588 E8BD8000 true LDM sp!,{pc} Timestamp Timestamp: 17107041535 +2) Using perf framework: + +Coresight tracers are represented using the Perf framework's Performance +Monitoring Unit (PMU) abstraction. As such the perf framework takes charge of +controlling when tracing gets enabled based on when the process of interest is +scheduled. When configured in a system, Coresight PMUs will be listed when +queried by the perf command line tool: + + linaro@linaro-nano:~$ ./perf list pmu + + List of pre-defined events (to be used in -e): + + cs_etm// [Kernel PMU event] + + linaro@linaro-nano:~$ + +Regardless of the number of tracers available in a system (usually equal to the +amount of processor core), the "cs_etm" PMU will be listed only once. + +A Coresight PMU works the same way as any other PMUs, i.e the name of the PMU is +listed along with configuration options within forward slashes '/'. Since a +Coresight system will typically have more than one sink, the name of the sink to +work with needs to be specified as an event option. Names for sink to choose +from are listed in sysFS under ($SYSFS)/bus/coresight/devices: + + root@linaro-nano:~# ls /sys/bus/coresight/devices/ + 20010000.etf 20040000.funnel 20100000.stm 22040000.etm + 22140000.etm 230c0000.funnel 23240000.etm 20030000.tpiu + 20070000.etr 20120000.replicator 220c0000.funnel + 23040000.etm 23140000.etm 23340000.etm + + root@linaro-nano:~# perf record -e cs_etm/@20070000.etr/u --per-thread program + +The syntax within the forward slashes '/' is important. The '@' character +tells the parser that a sink is about to be specified and that this is the IP +to use for the trace session. + +More information on the above and other example on how to use Coresight with +the perf tools can be found in the "HOWTO.md" file of the openCSD gitHub +repository [3]. + How to use the STM module ------------------------- From patchwork Mon Apr 16 19:35:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 133489 Delivered-To: patch@linaro.org Received: by 10.46.84.18 with SMTP id i18csp3926704ljb; Mon, 16 Apr 2018 12:35:42 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+hIo5lssVGwmsx3w2HBgj4+3fDT5kf1+0VK9LWLvQsPyXVI5KA5CrX4Bqy4hsK0jg8L2dN X-Received: by 10.98.202.212 with SMTP id y81mr22813555pfk.227.1523907342370; Mon, 16 Apr 2018 12:35:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523907342; cv=none; d=google.com; s=arc-20160816; b=kUr8WzXWzS+1i1g7WVVTbixmFpzZQBYv+BVLLPgxgqYCh6wjin2SF1W2gUlTPlVBmv X6ayBFmnz+NEQmyEkraWv2C+mwPr/FEhWBbET6ydJTmbCMhjrtqS2dK/1u+571SwiOqc gL07SNYJSppyxxdmhYDskDM6DJNJbTn7kekJsKcn68+HD3wSqZVL7GVf0tfsThes4woh sErshtCalcBPgt3eM+Sl8bfzPxQMXo/9biYo72KGZS8T5UDmWz7isd+ekYCQdcQsHFKb xvwwZzoR/dkikyJYlx1esMv3KR+Az8AgxEqZOl6oJL3Hz8yq51dm6skFtKndnpJ8OPJe l4oQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=mwxs/3GSnnpGv40NGEimJRnXh8ZyV7w1diNPqpQj8MM=; b=wsViPL6tOvAVwUdzlMqfPTpWe0Y4/V9H9ehnRxWKy0mPSPjDWb2CBc1Zq/DQcLR0jg 8myBWF5uPJA6xEMgqSWiX2lomivBfD2va93mJItF4Q3LxD8GWmAbY7f4IGSO3eOPph3f wUlck/2Nouvpo283+B3zURxzqTpeZyp57VIfqSGEMF5HMn9iO6630A09kY7mbn9H/InP 6uZs7uHVWaFlB9CUmGx2hzc5BP1UJrvQggRGEmhoTgQcObEeprs8TWEaD941ri2WuNSN TuZnGoEOCkXB4pY+4Nq2CszjlYBRksjSyWXqXhJN62kzkkKh9kAG+M6+m1PZ0gMcOfFe IaPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XaNCUzOz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id b78sm7038785pfj.6.2018.04.16.12.35.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 16 Apr 2018 12:35:33 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org, corbet@lwn.net Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Ben.Gainey@arm.com Subject: [PATCH 3/3] coresight: Grouping all perf tools oriented section together Date: Mon, 16 Apr 2018 13:35:27 -0600 Message-Id: <1523907327-20979-4-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523907327-20979-1-git-send-email-mathieu.poirier@linaro.org> References: <1523907327-20979-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch groups together section pertaining to the perf tools. That way everything is at the same place rather than spread out. Signed-off-by: Mathieu Poirier --- Documentation/trace/coresight.txt | 72 +++++++++++++++++++-------------------- 1 file changed, 36 insertions(+), 36 deletions(-) -- 2.7.4 diff --git a/Documentation/trace/coresight.txt b/Documentation/trace/coresight.txt index 8caae8050a60..32c5b159e8fc 100644 --- a/Documentation/trace/coresight.txt +++ b/Documentation/trace/coresight.txt @@ -345,42 +345,7 @@ More information on the above and other example on how to use Coresight with the perf tools can be found in the "HOWTO.md" file of the openCSD gitHub repository [3]. -How to use the STM module -------------------------- - -Using the System Trace Macrocell module is the same as the tracers - the only -difference is that clients are driving the trace capture rather -than the program flow through the code. - -As with any other CoreSight component, specifics about the STM tracer can be -found in sysfs with more information on each entry being found in [1]: - -root@genericarmv8:~# ls /sys/bus/coresight/devices/20100000.stm -enable_source hwevent_select port_enable subsystem uevent -hwevent_enable mgmt port_select traceid -root@genericarmv8:~# - -Like any other source a sink needs to be identified and the STM enabled before -being used: - -root@genericarmv8:~# echo 1 > /sys/bus/coresight/devices/20010000.etf/enable_sink -root@genericarmv8:~# echo 1 > /sys/bus/coresight/devices/20100000.stm/enable_source - -From there user space applications can request and use channels using the devfs -interface provided for that purpose by the generic STM API: - -root@genericarmv8:~# ls -l /dev/20100000.stm -crw------- 1 root root 10, 61 Jan 3 18:11 /dev/20100000.stm -root@genericarmv8:~# - -Details on how to use the generic STM API can be found here [2]. - -[1]. Documentation/ABI/testing/sysfs-bus-coresight-devices-stm -[2]. Documentation/trace/stm.txt - - -Using perf tools ----------------- +2.1) AutoFDO analysis using the perf tools: perf can be used to record and analyze trace of programs. @@ -428,3 +393,38 @@ sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tuto $ taskset -c 2 ./sort_autofdo Bubble sorting array of 30000 elements 5806 ms + + +How to use the STM module +------------------------- + +Using the System Trace Macrocell module is the same as the tracers - the only +difference is that clients are driving the trace capture rather +than the program flow through the code. + +As with any other CoreSight component, specifics about the STM tracer can be +found in sysfs with more information on each entry being found in [1]: + +root@genericarmv8:~# ls /sys/bus/coresight/devices/20100000.stm +enable_source hwevent_select port_enable subsystem uevent +hwevent_enable mgmt port_select traceid +root@genericarmv8:~# + +Like any other source a sink needs to be identified and the STM enabled before +being used: + +root@genericarmv8:~# echo 1 > /sys/bus/coresight/devices/20010000.etf/enable_sink +root@genericarmv8:~# echo 1 > /sys/bus/coresight/devices/20100000.stm/enable_source + +From there user space applications can request and use channels using the devfs +interface provided for that purpose by the generic STM API: + +root@genericarmv8:~# ls -l /dev/20100000.stm +crw------- 1 root root 10, 61 Jan 3 18:11 /dev/20100000.stm +root@genericarmv8:~# + +Details on how to use the generic STM API can be found here [2]. + +[1]. Documentation/ABI/testing/sysfs-bus-coresight-devices-stm +[2]. Documentation/trace/stm.txt +[3]. https://github.com/Linaro/perf-opencsd