From patchwork Tue Apr 24 09:39:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 134058 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp2011055lji; Tue, 24 Apr 2018 02:39:57 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpK7NbOOCQLPRFiTDKmfffO/5OZ9xbYXDpC0gm9Gd0WPk6I3XYSSsl2QLxg1Qz9MuAjpKi9 X-Received: by 10.98.174.19 with SMTP id q19mr3497895pff.155.1524562797030; Tue, 24 Apr 2018 02:39:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524562797; cv=none; d=google.com; s=arc-20160816; b=kwq+qT192ABNROp4VCayIgw8dd1j4cTqQtByiUpBlyXVxntye1y8U+2BDxCMr/wiJw MVhNdpxaHORMJITE/4CDSZ65riLzDdxkdTOhWc6OdZw19YJCg7hLQYp0dFrKxrvsL34B 7HjvQnQPboyT96XWei6m8usoObHDBdSy/9oOhqwFj8NpNXRn7lsLVaqxRhjfZMIbc/A1 zNLtuQiyDUHu6a8JSTtPYi+CGcZaJWlndcEUNpgdWVH4HLANifZ5KXzbfmtaVEG7/KGT lnC4XORiCjhGD1aZw2y4HJ8EZ8uSIxB5S50qsLbKvGewbzN9m8KzK+9BNfopizcnwMh9 at/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=KWWUmJiLNpNSPX5mV1xGbZockPPfYejV3aX3lkA0Q1E=; b=fQi9YCdam6U2aA8xWrJgzOKyVcU+z5iJUcHVQWt248HFnEb/W0rlpaUge3UnZeknNY tqpKZiMAXE3jPOuVF9dZnuwfjnmRfzX+qgoTDztjrxKgPCbjSHxTqwsrwuSgn1YB+ujC BSmzYg/VT4YQMWreZQK/csWrfbQQJH1tZl2FByBxELh7YQxDNBMutTeVE+fPdT3rF2AS M9pfBELxWO7mixW1h9+go3XImSNRlVnCevv+guDQ8Ztf/KT5DeAB65pNTzkcX2cPtnO2 Dggt1iuDpL5FR1wsGLmShp0x+LPst2QiTdkuQ5Rqm0HUDYtdyxzGBRJwMasBREgCTcOD Tnfw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HlCgB5NY; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m18si11109785pgu.352.2018.04.24.02.39.56; Tue, 24 Apr 2018 02:39:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HlCgB5NY; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752276AbeDXJjz (ORCPT + 11 others); Tue, 24 Apr 2018 05:39:55 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:34407 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751994AbeDXJjx (ORCPT ); Tue, 24 Apr 2018 05:39:53 -0400 Received: by mail-pf0-f193.google.com with SMTP id a14so1280306pfi.1 for ; Tue, 24 Apr 2018 02:39:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=KWWUmJiLNpNSPX5mV1xGbZockPPfYejV3aX3lkA0Q1E=; b=HlCgB5NYOW28agxszk5GpjYBUntgUp6KCdatg06iDioRP/Da1/10ZhsAaZUf+tSSiq iFgHIB61PdLZ8gP97eDynmlDSzA1++lA/2LTn8eYU/qv14egF8k9Hs0T837kLk/x2pLl Iq5ue9sZdK6elWhKQ+ME2VzgeSeSA7EAG4YT0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=KWWUmJiLNpNSPX5mV1xGbZockPPfYejV3aX3lkA0Q1E=; b=r9abczmGiKNCITXhTy22KFAxEnWKkGsIx2kbQLEx1okMQpC+B4xNU74G6WGo0jx+SG H/mA7rBm8gKgp6Ocad4hoSgUjW3g/sDmN1a/Odlm3l9fEJlCU/oAds0OuEpvWVquHzNy MZJDH+3nWfyhhe7kwGvcT8kR6kt+Mu78kq0FAUW/mIO5AiuxlRodyIks40evWMnrdlnX uROU9v5976FzAwZeSTWnxq4o0yTKbK3saziQ/AqOjnlO1CUnyRHGfkxXuBBSGrTUjvG9 WNmX0BiSqN5juMS7ACnFF0A/Emu0nkwVqwQEaiFCGYkzasbbwu/kssk4SxEmMhlCIn31 Xnww== X-Gm-Message-State: ALQs6tCb4qlz3SVn2l0mtiZHxxY58tGPPuOYXhkOUPY+XzzWNXR3delZ nyMLTznvj2pwCWjdbrlXjd69ja1dB+c= X-Received: by 10.98.156.7 with SMTP id f7mr23305978pfe.104.1524562792899; Tue, 24 Apr 2018 02:39:52 -0700 (PDT) Received: from localhost ([122.172.61.40]) by smtp.gmail.com with ESMTPSA id a3sm21551405pgc.2.2018.04.24.02.39.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Apr 2018 02:39:52 -0700 (PDT) From: Viresh Kumar To: Rafael Wysocki , Miquel Raynal Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot Subject: [PATCH V3 1/3] cpufreq: dt: Allow platform specific suspend/resume callbacks Date: Tue, 24 Apr 2018 15:09:45 +0530 Message-Id: <012d28b80a343dd3cf2dc369f0f9cca2699536e2.1524561482.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Platforms may need to implement platform specific suspend/resume hooks. Update cpufreq-dt driver's platform data to contain those for such platforms. Signed-off-by: Viresh Kumar Tested-by: Miquel Raynal --- drivers/cpufreq/cpufreq-dt.c | 10 ++++++++-- drivers/cpufreq/cpufreq-dt.h | 5 +++++ 2 files changed, 13 insertions(+), 2 deletions(-) -- 2.15.0.194.g9af6a3dea062 diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c index 190ea0dccb79..0a9ebf00be46 100644 --- a/drivers/cpufreq/cpufreq-dt.c +++ b/drivers/cpufreq/cpufreq-dt.c @@ -346,8 +346,14 @@ static int dt_cpufreq_probe(struct platform_device *pdev) if (ret) return ret; - if (data && data->have_governor_per_policy) - dt_cpufreq_driver.flags |= CPUFREQ_HAVE_GOVERNOR_PER_POLICY; + if (data) { + if (data->have_governor_per_policy) + dt_cpufreq_driver.flags |= CPUFREQ_HAVE_GOVERNOR_PER_POLICY; + + dt_cpufreq_driver.resume = data->resume; + if (data->suspend) + dt_cpufreq_driver.suspend = data->suspend; + } ret = cpufreq_register_driver(&dt_cpufreq_driver); if (ret) diff --git a/drivers/cpufreq/cpufreq-dt.h b/drivers/cpufreq/cpufreq-dt.h index 54d774e46c43..d5aeea13433e 100644 --- a/drivers/cpufreq/cpufreq-dt.h +++ b/drivers/cpufreq/cpufreq-dt.h @@ -12,8 +12,13 @@ #include +struct cpufreq_policy; + struct cpufreq_dt_platform_data { bool have_governor_per_policy; + + int (*suspend)(struct cpufreq_policy *policy); + int (*resume)(struct cpufreq_policy *policy); }; #endif /* __CPUFREQ_DT_H__ */ From patchwork Tue Apr 24 09:39:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 134059 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp2011080lji; Tue, 24 Apr 2018 02:39:58 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+gLajV6DU3dABvaDskZM6X4Jat2hGbUtW4Mm4pwW05Pb33zD42h8XBqnJUowtDhmohLotb X-Received: by 2002:a17:902:70c4:: with SMTP id l4-v6mr24007814plt.382.1524562798427; Tue, 24 Apr 2018 02:39:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524562798; cv=none; d=google.com; s=arc-20160816; b=SVu3K2SZpd598Suc4E5lCJiJYqu00UmVpDnGL+A5rE4xRzKJzBXr0XEMWvOps7b7Bj VtkhQ0KyTGTJ3QcXR19Cuzn6bj/DfWs/0Tsa62EfUY82Ff05yBOCRY2SADLjBo6vixnZ NYcAmRKJnrOxP5cCra6GMIVPJpJYDh57mjWkyTNry+lhi+0ZlSxsbhVcllZAsSr4wgYu 5thzrMsBaH/IxpNkCJtoBQ+VprWxvmPGpZQgxP4XcbE4gukB0NTdDE0QCGEbN4SLTVdc ljPUtDfa0RQaQ6EJPZKeZE+up7DNCFgdgMA6DOhoyb1PUzRd5I+ycB+BnRKiQiEGukrX XEWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=U8XkeD5wZ4vKZyjeozXbrNX7G7V2nRsoJevxMxLxH5k=; b=QmpbLF98+qjborhmfzkaLqrTTZyt75QwvsEn6b0jUD3i3SM+vBQDxkZEva9tNG1lRu 2MAomnysXMpBYq9ki5tq+8KEpkvTQ0MUNC8egZITxgtda6GmQ9lqq1N5ufzbxAi17ecR gQpxkmeR7yBpDiuLWtFiTgVo9xEfMIXFgb5lhmQOoaQ2iY+CGe3kPhOEhO5DtL6GfN6+ elAmlKVnWApQJ3d+ouvtvrEhDlqXcURa/uwOYKaQ9kGtyvLADI1zYfIyKVBy9ZeZ0DoT M9TdkgZYg3f3tijXOl2d7k/+wfZwi9y1YRywshLMYLWTfXX4QcPE6ud2/rfnxC7ngt76 zZJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FOggZ88u; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m18si11109785pgu.352.2018.04.24.02.39.58; Tue, 24 Apr 2018 02:39:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FOggZ88u; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752949AbeDXJj5 (ORCPT + 11 others); Tue, 24 Apr 2018 05:39:57 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:39366 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752549AbeDXJj4 (ORCPT ); Tue, 24 Apr 2018 05:39:56 -0400 Received: by mail-pf0-f194.google.com with SMTP id z9so11789734pfe.6 for ; Tue, 24 Apr 2018 02:39:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=U8XkeD5wZ4vKZyjeozXbrNX7G7V2nRsoJevxMxLxH5k=; b=FOggZ88u6TEFvKjRoNQ+M7pRHH9O1XKZuC/6Y3EuuExcvditf+kr8/pFO9+heMQzuQ l6Vi1n5eJmmuJhX3zdWbBJPoFQ6u1cib8CV2Nb7dP/p72oQ5W6NpevYHEFW6OoAebinW pn91xExvfwT4xnvZhDqZibbOQsdwc8wXrQOxM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=U8XkeD5wZ4vKZyjeozXbrNX7G7V2nRsoJevxMxLxH5k=; b=NfD95XNKmDzynwDfwgyxuyDGnhTm6CFr42VkAxhpbRgyuClfaqwWS/nhSSDW+AjxR/ JTzeAo2LVQgNpgPy0nOUABd3sw/HHzD5XYtldVji/A0lMMcaNFJJJtYyg+0GtxpY8H+1 3Kj1c5w+R5f6vgo8wk3XjBOR02t1RE5bufnmmDPjDe/M0501hhL1E890DXyGpJb8u6rE YJARn9UeUw0r5Sg0PS6EU6s+ijhoRig0MlssK5GG8hnHpoNzBxfXYgVzXo2w203nquns QiBornO6HXaEfxdD+PJHpi/J7ItBz68NQTQUR5FENDR32YB69HqgBn70Xyq/YSJXyQBd 1/1w== X-Gm-Message-State: ALQs6tCNfXSuUheOdB+I4zX9lyvfnaPeSVC3Gblip0aVx+2f5q9erVLg ZT/ZD77HTd+Iz3TL0rMKDGocSA== X-Received: by 2002:a17:902:59ce:: with SMTP id d14-v6mr22583915plj.253.1524562795685; Tue, 24 Apr 2018 02:39:55 -0700 (PDT) Received: from localhost ([122.172.61.40]) by smtp.gmail.com with ESMTPSA id c7sm45188562pfg.81.2018.04.24.02.39.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Apr 2018 02:39:55 -0700 (PDT) From: Viresh Kumar To: Rafael Wysocki , Miquel Raynal , Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , linux-arm-kernel@lists.infradead.org Subject: [PATCH V3 2/3] cpufreq: armada: Free resources on error paths Date: Tue, 24 Apr 2018 15:09:46 +0530 Message-Id: X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The resources weren't freed on failures, free them properly. Signed-off-by: Viresh Kumar Tested-by: Miquel Raynal --- drivers/cpufreq/armada-37xx-cpufreq.c | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-) -- 2.15.0.194.g9af6a3dea062 diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c index 72a2975499db..1d5db6f6ace9 100644 --- a/drivers/cpufreq/armada-37xx-cpufreq.c +++ b/drivers/cpufreq/armada-37xx-cpufreq.c @@ -166,6 +166,7 @@ static int __init armada37xx_cpufreq_driver_init(void) { struct armada_37xx_dvfs *dvfs; struct platform_device *pdev; + unsigned long freq; unsigned int cur_frequency; struct regmap *nb_pm_base; struct device *cpu_dev; @@ -207,33 +208,43 @@ static int __init armada37xx_cpufreq_driver_init(void) } dvfs = armada_37xx_cpu_freq_info_get(cur_frequency); - if (!dvfs) + if (!dvfs) { + clk_put(clk); return -EINVAL; + } armada37xx_cpufreq_dvfs_setup(nb_pm_base, clk, dvfs->divider); clk_put(clk); for (load_lvl = ARMADA_37XX_DVFS_LOAD_0; load_lvl < LOAD_LEVEL_NR; load_lvl++) { - unsigned long freq = cur_frequency / dvfs->divider[load_lvl]; + freq = cur_frequency / dvfs->divider[load_lvl]; ret = dev_pm_opp_add(cpu_dev, freq, 0); - if (ret) { - /* clean-up the already added opp before leaving */ - while (load_lvl-- > ARMADA_37XX_DVFS_LOAD_0) { - freq = cur_frequency / dvfs->divider[load_lvl]; - dev_pm_opp_remove(cpu_dev, freq); - } - return ret; - } + if (ret) + goto remove_opp; } /* Now that everything is setup, enable the DVFS at hardware level */ armada37xx_cpufreq_enable_dvfs(nb_pm_base); pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0); + ret = PTR_ERR_OR_ZERO(pdev); + if (ret) + goto disable_dvfs; + + return 0; + +disable_dvfs: + armada37xx_cpufreq_disable_dvfs(nb_pm_base); +remove_opp: + /* clean-up the already added opp before leaving */ + while (load_lvl-- > ARMADA_37XX_DVFS_LOAD_0) { + freq = cur_frequency / dvfs->divider[load_lvl]; + dev_pm_opp_remove(cpu_dev, freq); + } - return PTR_ERR_OR_ZERO(pdev); + return ret; } /* late_initcall, to guarantee the driver is loaded after A37xx clock driver */ late_initcall(armada37xx_cpufreq_driver_init); From patchwork Tue Apr 24 09:39:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 134060 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp2011132lji; Tue, 24 Apr 2018 02:40:02 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+0IOh6lM6b9X/L/0+QaLxj8V23NsLfAQ3gIUrZNFT+ilq8UZBgzeNBUun6wdZwzdsvN6gp X-Received: by 10.101.102.143 with SMTP id b15mr19189718pgw.183.1524562801907; Tue, 24 Apr 2018 02:40:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524562801; cv=none; d=google.com; s=arc-20160816; b=My0r/gIYcndeVjTYiEt/Dn4OzumXxXL04aEVxInp7mQpBX9rnvfOGGiYIdFegIfua6 QdqeG32J32y12yUk/QFxNoSenECCZKlmvdzshN24fgaBnksyJxWrz3xch/zgo/FslvJi 4ymbVHLLqeW3xgCO4bklcQa8lnPXyHXyDwfAs9uRmO5RANsmF5f4HHFBBXxCmj/yd9M1 CM6VZDRyuNYb96Ot1bLcQ1NA9huSXXvR/hBqw+oD8wlFoDArddd78Yjnki76ZNg/iqAt mOa/E99bUeAEkzekO0JQPWr7KFjmlsoMrsSHpg8yTrWgGN1b0kq9io/YJltMoYrmoK3V rjkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=pFjwJAvEkaGMhSBRU2A6wkAG/nsTdz/Y7VYE8+1+HIE=; b=bGZmkCmF3uu6lG/06ycqgpZx1vwgOf320hkC7MoM4b8lzMah1CGus/D57e1Oic8Cak sSSkBNG0Oktqfh6CH07WZj82qr6JRbQIUNFqE6I5uxLj7HbGqwNx1vDWC1uWqBkU8tlN cRrITOc0iCvGUowNu4Wyq2wGb+HqldNSRloihv/04F/i5Z9FKg+nsZKOqTAopkHPoq61 tLNpmvycDjzWUfQ4Zfh8ifDUdE/OfnCUomjbdnj3HphPXWZQvbBhZKA+ySUyYWwt/fmi 1QNph9xEMgGButEf0xLs6Md3HzWXYivom11frpRsizVYL85tH+A4/Ofi8naOpXCkLyUV syzw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IDVe8PXR; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m18si11109785pgu.352.2018.04.24.02.40.01; Tue, 24 Apr 2018 02:40:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IDVe8PXR; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751440AbeDXJkB (ORCPT + 11 others); Tue, 24 Apr 2018 05:40:01 -0400 Received: from mail-pg0-f67.google.com ([74.125.83.67]:40964 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753088AbeDXJj7 (ORCPT ); Tue, 24 Apr 2018 05:39:59 -0400 Received: by mail-pg0-f67.google.com with SMTP id m21so7451098pgv.8 for ; Tue, 24 Apr 2018 02:39:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=pFjwJAvEkaGMhSBRU2A6wkAG/nsTdz/Y7VYE8+1+HIE=; b=IDVe8PXR1409UfzXnWInnrvHCLnsr2q6ppl/IhfwVsAZhaLrIL+lT+415d5ob8d5vS 5/7pE2n63ODLfQfovqKrVsCwez7RLkciK1WbE1HZk18hWBXTtaFXdPnJdkPw2DosjRwP lN4Rxm4m/nAkO8iq61GkBGkhxpVaRvQA908bQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=pFjwJAvEkaGMhSBRU2A6wkAG/nsTdz/Y7VYE8+1+HIE=; b=LiPKJZDy9ShLo2A1fGyTMqAqfCLlpU60P+EgvJ1Wf/n97c7G+h9KEYXaAi2vhOM359 La9lyVxbyWgnT8cr6/kVQroGapfFd47NsDj6SVd7IbqXYLsS5Bz4mouKciJuqiRIjp1z GMx4S3LJYmPKqiYfAtQEBL1GTluoRAdqNFC+Mjlx3MoY7LpFO+jobsOW28LsiYd2iPaB nWoRi27qaC5mrEvN0oaLQP1JseHPEWE5nT+tcopyb3r2+alOqshw2kdxdadxfg6+2B9h PPOcn14DY/xBJQcfTxgCUxOhTjSuv+E5pC8LKn9dnDFVIFlt9MoWlLKWbd5uZzf+4SQz 4xGA== X-Gm-Message-State: ALQs6tDp1irFv2OlhBD6moMdFLRrmNiknBbFXh0p2KgtoKWsWXLlyNwT JUk3E1rplMBFsJhyOhu+B3Xw+Q== X-Received: by 10.101.100.132 with SMTP id e4mr14581844pgv.102.1524562798760; Tue, 24 Apr 2018 02:39:58 -0700 (PDT) Received: from localhost ([122.172.61.40]) by smtp.gmail.com with ESMTPSA id l129sm21884767pgl.89.2018.04.24.02.39.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Apr 2018 02:39:58 -0700 (PDT) From: Viresh Kumar To: Rafael Wysocki , Miquel Raynal , Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , linux-arm-kernel@lists.infradead.org Subject: [PATCH V3 3/3] cpufreq: add suspend/resume support in Armada 37xx DVFS driver Date: Tue, 24 Apr 2018 15:09:47 +0530 Message-Id: X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Miquel Raynal Add suspend/resume hooks in Armada 37xx DVFS driver to handle S2RAM operations. As there is currently no 'driver' structure, create one to store both the regmap and the register values during suspend operation. Signed-off-by: Miquel Raynal Signed-off-by: Viresh Kumar --- drivers/cpufreq/armada-37xx-cpufreq.c | 67 +++++++++++++++++++++++++++++++++-- 1 file changed, 65 insertions(+), 2 deletions(-) -- 2.15.0.194.g9af6a3dea062 diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c index 1d5db6f6ace9..5b808882ac8b 100644 --- a/drivers/cpufreq/armada-37xx-cpufreq.c +++ b/drivers/cpufreq/armada-37xx-cpufreq.c @@ -23,6 +23,8 @@ #include #include +#include "cpufreq-dt.h" + /* Power management in North Bridge register set */ #define ARMADA_37XX_NB_L0L1 0x18 #define ARMADA_37XX_NB_L2L3 0x1C @@ -56,6 +58,16 @@ */ #define LOAD_LEVEL_NR 4 +struct armada37xx_cpufreq_state { + struct regmap *regmap; + u32 nb_l0l1; + u32 nb_l2l3; + u32 nb_dyn_mod; + u32 nb_cpu_load; +}; + +static struct armada37xx_cpufreq_state *armada37xx_cpufreq_state; + struct armada_37xx_dvfs { u32 cpu_freq_max; u8 divider[LOAD_LEVEL_NR]; @@ -136,7 +148,7 @@ static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base, clk_set_parent(clk, parent); } -static void __init armada37xx_cpufreq_disable_dvfs(struct regmap *base) +static void armada37xx_cpufreq_disable_dvfs(struct regmap *base) { unsigned int reg = ARMADA_37XX_NB_DYN_MOD, mask = ARMADA_37XX_NB_DFS_EN; @@ -162,8 +174,44 @@ static void __init armada37xx_cpufreq_enable_dvfs(struct regmap *base) regmap_update_bits(base, reg, mask, mask); } +static int armada37xx_cpufreq_suspend(struct cpufreq_policy *policy) +{ + struct armada37xx_cpufreq_state *state = armada37xx_cpufreq_state; + + regmap_read(state->regmap, ARMADA_37XX_NB_L0L1, &state->nb_l0l1); + regmap_read(state->regmap, ARMADA_37XX_NB_L2L3, &state->nb_l2l3); + regmap_read(state->regmap, ARMADA_37XX_NB_CPU_LOAD, + &state->nb_cpu_load); + regmap_read(state->regmap, ARMADA_37XX_NB_DYN_MOD, &state->nb_dyn_mod); + + return 0; +} + +static int armada37xx_cpufreq_resume(struct cpufreq_policy *policy) +{ + struct armada37xx_cpufreq_state *state = armada37xx_cpufreq_state; + + /* Ensure DVFS is disabled otherwise the following registers are RO */ + armada37xx_cpufreq_disable_dvfs(state->regmap); + + regmap_write(state->regmap, ARMADA_37XX_NB_L0L1, state->nb_l0l1); + regmap_write(state->regmap, ARMADA_37XX_NB_L2L3, state->nb_l2l3); + regmap_write(state->regmap, ARMADA_37XX_NB_CPU_LOAD, + state->nb_cpu_load); + + /* + * NB_DYN_MOD register is the one that actually enable back DVFS if it + * was enabled before the suspend operation. This must be done last + * otherwise other registers are not writable. + */ + regmap_write(state->regmap, ARMADA_37XX_NB_DYN_MOD, state->nb_dyn_mod); + + return 0; +} + static int __init armada37xx_cpufreq_driver_init(void) { + struct cpufreq_dt_platform_data pdata; struct armada_37xx_dvfs *dvfs; struct platform_device *pdev; unsigned long freq; @@ -213,6 +261,15 @@ static int __init armada37xx_cpufreq_driver_init(void) return -EINVAL; } + armada37xx_cpufreq_state = kmalloc(sizeof(*armada37xx_cpufreq_state), + GFP_KERNEL); + if (!armada37xx_cpufreq_state) { + ret = -ENOMEM; + goto put_clk; + } + + armada37xx_cpufreq_state->regmap = nb_pm_base; + armada37xx_cpufreq_dvfs_setup(nb_pm_base, clk, dvfs->divider); clk_put(clk); @@ -228,7 +285,11 @@ static int __init armada37xx_cpufreq_driver_init(void) /* Now that everything is setup, enable the DVFS at hardware level */ armada37xx_cpufreq_enable_dvfs(nb_pm_base); - pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0); + pdata.suspend = armada37xx_cpufreq_suspend; + pdata.resume = armada37xx_cpufreq_resume; + + pdev = platform_device_register_data(NULL, "cpufreq-dt", -1, &pdata, + sizeof(pdata)); ret = PTR_ERR_OR_ZERO(pdev); if (ret) goto disable_dvfs; @@ -244,6 +305,8 @@ static int __init armada37xx_cpufreq_driver_init(void) dev_pm_opp_remove(cpu_dev, freq); } + kfree(armada37xx_cpufreq_state); + return ret; } /* late_initcall, to guarantee the driver is loaded after A37xx clock driver */