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[139.162.83.109]) by smtp.gmail.com with ESMTPSA id r77sm8196394pfe.105.2017.04.11.02.10.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Apr 2017 02:10:44 -0700 (PDT) From: Leo Yan To: Mathieu Poirier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Leo Yan , Mike Leach , Suzuki K Poulose Subject: [PATCH RFC 1/4] coresight: tmc: check dump buffer is overflow Date: Tue, 11 Apr 2017 17:10:26 +0800 Message-Id: <1491901829-18477-2-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491901829-18477-1-git-send-email-leo.yan@linaro.org> References: <1491901829-18477-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the code dumping ETB buffer is terminated when read back value 0xFFFF_FFFF. This is not safe and introduce infinite looping for some cases, e.g. when reset the CPU and read out ETB RAM. Cc: Mathieu Poirier Cc: Mike Leach Cc: Suzuki K Poulose Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 3a1c181..6150dac 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -54,6 +54,13 @@ static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata) read_data = readl_relaxed(drvdata->base + TMC_RRD); if (read_data == 0xFFFFFFFF) return; + + /* Check if allocated buffer is overflow */ + if (drvdata->len >= drvdata->size) { + dev_info(drvdata->dev, "TMC dump overflow!\n"); + return; + } + memcpy(bufp, &read_data, 4); bufp += 4; drvdata->len += 4; From patchwork Tue Apr 11 09:10:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 97228 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp1717212qgd; Tue, 11 Apr 2017 02:12:07 -0700 (PDT) X-Received: by 10.98.40.5 with SMTP id o5mr59458609pfo.262.1491901927485; Tue, 11 Apr 2017 02:12:07 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[139.162.83.109]) by smtp.gmail.com with ESMTPSA id r77sm8196394pfe.105.2017.04.11.02.10.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Apr 2017 02:10:48 -0700 (PDT) From: Leo Yan To: Mathieu Poirier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Leo Yan , Mike Leach , Suzuki K Poulose Subject: [PATCH RFC 2/4] coresight: tmc: set read pointer before dump RAM Date: Tue, 11 Apr 2017 17:10:27 +0800 Message-Id: <1491901829-18477-3-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491901829-18477-1-git-send-email-leo.yan@linaro.org> References: <1491901829-18477-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When dump RAM, we need set read pointer so can make sure every time read the consistent content. If the RAM is full by checking status register (STS), so set the read pointer to same value with write pointer, otherwise set read point to 0 so can read from the start of RAM. Cc: Mathieu Poirier Cc: Mike Leach Cc: Suzuki K Poulose Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 6150dac..43cfeaa 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -43,10 +43,28 @@ static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata) static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata) { + u32 write_ptr, status; char *bufp; u32 read_data; int i; + write_ptr = readl_relaxed(drvdata->base + TMC_RWP); + + /* + * Get a hold of the status register and see if a wrap around + * has occurred. If so adjust things accordingly. + */ + status = readl_relaxed(drvdata->base + TMC_STS); + if (status & TMC_STS_FULL) + /* Tell the HW the reading start point */ + writel_relaxed(write_ptr, drvdata->base + TMC_RRP); + else + /* + * In case this is not first time to read ETB RAM, + * always write 0 for reading pointer. + */ + writel_relaxed(0x0, drvdata->base + TMC_RRP); + bufp = drvdata->buf; drvdata->len = 0; while (1) { From patchwork Tue Apr 11 09:10:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 97227 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp1716862qgd; Tue, 11 Apr 2017 02:11:08 -0700 (PDT) X-Received: by 10.99.115.75 with SMTP id d11mr6722345pgn.101.1491901868892; Tue, 11 Apr 2017 02:11:08 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[139.162.83.109]) by smtp.gmail.com with ESMTPSA id r77sm8196394pfe.105.2017.04.11.02.10.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Apr 2017 02:10:52 -0700 (PDT) From: Leo Yan To: Mathieu Poirier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Leo Yan , Mike Leach , Suzuki K Poulose Subject: [PATCH RFC 3/4] coresight: tmc: dump RAM when device is disabled Date: Tue, 11 Apr 2017 17:10:28 +0800 Message-Id: <1491901829-18477-4-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491901829-18477-1-git-send-email-leo.yan@linaro.org> References: <1491901829-18477-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Coresight framework creates /dev nodes for ETB/ETF devices, these nodes cannot read out data if without enable the coresight path. Finally we lose chance to dump RAM if there have some old data kept in it. So this patch is to add support to dump RAM when device is disabled, with this small change we can easily read out ETB RAM data before there have new data has been sent to it. These dump data may come from the previous system running, so it will be very helpful to analyze some hang issue before system dead. Cc: Mathieu Poirier Cc: Mike Leach Cc: Suzuki K Poulose Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 43cfeaa..5e709af 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -95,7 +95,7 @@ static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) * When operating in sysFS mode the content of the buffer needs to be * read before the TMC is disabled. */ - if (drvdata->mode == CS_MODE_SYSFS) + if (drvdata->mode != CS_MODE_PERF) tmc_etb_dump_hw(drvdata); tmc_disable_hw(drvdata); @@ -557,6 +557,10 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) goto out; } + /* Try to dump RAM even for disabled state */ + if (drvdata->mode == CS_MODE_DISABLED) + drvdata->buf = kzalloc(drvdata->size, GFP_KERNEL); + /* If drvdata::buf is NULL the trace data has been read already */ if (drvdata->buf == NULL) { ret = -EINVAL; @@ -564,8 +568,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) } /* Disable the TMC if need be */ - if (drvdata->mode == CS_MODE_SYSFS) - tmc_etb_disable_hw(drvdata); + tmc_etb_disable_hw(drvdata); drvdata->reading = true; out: From patchwork Tue Apr 11 09:10:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 97226 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp1716860qgd; Tue, 11 Apr 2017 02:11:08 -0700 (PDT) X-Received: by 10.98.212.7 with SMTP id a7mr61012120pfh.34.1491901868552; Tue, 11 Apr 2017 02:11:08 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[139.162.83.109]) by smtp.gmail.com with ESMTPSA id r77sm8196394pfe.105.2017.04.11.02.10.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Apr 2017 02:10:56 -0700 (PDT) From: Leo Yan To: Mathieu Poirier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Leo Yan , Mike Leach , Suzuki K Poulose Subject: [PATCH RFC 4/4] coresight: tmc: dump RAM for panic Date: Tue, 11 Apr 2017 17:10:29 +0800 Message-Id: <1491901829-18477-5-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491901829-18477-1-git-send-email-leo.yan@linaro.org> References: <1491901829-18477-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If coresight ETB/ETF have been enabled by 'sysfs' or 'perf' modes and we can rely on panic notifier to save all ETB RAM data into memory. Relies on Kdump, finally the ETB RAM data can be extracted from kernel's vmcore, so we can analyse panic reason from dumped ETB RAM data. Cc: Mathieu Poirier Cc: Mike Leach Cc: Suzuki K Poulose Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 52 +++++++++++++++++++++++++ drivers/hwtracing/coresight/coresight-tmc.h | 2 + 2 files changed, 54 insertions(+) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 5e709af..bc52cad 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -102,6 +102,47 @@ static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) CS_LOCK(drvdata->base); } +static int tmc_etb_notify(struct notifier_block *nb, + unsigned long mode, void *_unused) +{ + struct tmc_drvdata *drvdata = container_of(nb, struct tmc_drvdata, + panic_nb); + unsigned long flags; + int ret = 0; + + if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETB && + drvdata->config_type != TMC_CONFIG_TYPE_ETF)) + return -EINVAL; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + /* There is no point in reading a TMC in HW FIFO mode */ + mode = readl_relaxed(drvdata->base + TMC_MODE); + if (mode != TMC_MODE_CIRCULAR_BUFFER) { + ret = -EINVAL; + goto out; + } + + /* If drvdata::buf is NULL the trace data has been read already */ + if (drvdata->buf == NULL) { + ret = -EINVAL; + goto out; + } + + CS_UNLOCK(drvdata->base); + + tmc_flush_and_stop(drvdata); + tmc_etb_dump_hw(drvdata); + + dev_info(drvdata->dev, "Flush ETB buffer 0x%x@0x%p\n", + drvdata->len, drvdata->buf); + + CS_LOCK(drvdata->base); +out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return ret; +} + static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); @@ -245,6 +286,12 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) if (ret) return ret; + drvdata->panic_nb.notifier_call = tmc_etb_notify; + ret = atomic_notifier_chain_register(&panic_notifier_list, + &drvdata->panic_nb); + if (ret) + return ret; + dev_info(drvdata->dev, "TMC-ETB/ETF enabled\n"); return 0; } @@ -262,6 +309,11 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev) /* Disable the TMC only if it needs to */ if (drvdata->mode != CS_MODE_DISABLED) { + /* Unregister panic notifier */ + drvdata->panic_nb.notifier_call = NULL; + atomic_notifier_chain_unregister(&panic_notifier_list, + &drvdata->panic_nb); + tmc_etb_disable_hw(drvdata); drvdata->mode = CS_MODE_DISABLED; } diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 51c0185..bb563b8 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -93,6 +93,7 @@ enum tmc_mem_intf_width { * @base: memory mapped base address for this component. * @dev: the device entity associated to this component. * @csdev: component vitals needed by the framework. + * @panic_nb: notifier callback for panic. * @miscdev: specifics to handle "/dev/xyz.tmc" entry. * @spinlock: only one at a time pls. * @buf: area of memory where trace data get sent. @@ -109,6 +110,7 @@ struct tmc_drvdata { void __iomem *base; struct device *dev; struct coresight_device *csdev; + struct notifier_block panic_nb; struct miscdevice miscdev; spinlock_t spinlock; bool reading;