From patchwork Wed May 2 22:15:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134862 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1201123lji; Wed, 2 May 2018 15:17:05 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrw9fY3e0unl9hfiu9S5SQO7P/YomTKj84JQv2PLqM3xu1fQu4VkdJ/KnJ90V4tkg3wq64L X-Received: by 2002:a0c:d2f9:: with SMTP id x54-v6mr16863733qvh.245.1525299425440; Wed, 02 May 2018 15:17:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525299425; cv=none; d=google.com; s=arc-20160816; b=hChC74MwVnDduxTcDtoEVJNCk46tM2/yYpXzgOwzAgwErR5+9HnQT6nVOuDhDf3YW8 JzlYYmqQ09pqUxn37bqZlwu2hkZLd6nlE720Txy4ZBpFPNDvlxuWShPbrlrkY0WuPbP7 KtOMWIhK0OJeAcZ2bftPpsrlNwthSOgohmkJc2QIpqicyxsRlEnNlpzp2K9MQRQZ8UCO ADxCuubZFHONB9gwePvq57ILmrbcRoxUcsWfUPLXLSfhSAo8V3Ph1AHBPAyYQM7Smkrs 5Y0w5JC6cX4eWUwfHZoVuae6zy/Vuv/6q66T4t5FrtBQYPzelP+WgmQjYCJWpQVDNYzC 283Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=ttF+PGQCCRk+6WGb0b/LmzzNUpVRejL7hhsfT7m+hVs=; b=0HOV8/dvOPFSzO1B+MHPaQBnq7bvozIifekzEC6kLrZPon+8+hx0cyozSbqLze/KAp Umz2jgwLw41a3kT1/pBETLIOqmApQfMdJOZVj6Il/rVoCs8MPT6iUyVOFUkaUJxFMtue ucsxKJv4IairwWZQBQbkOPLceXbzCxSXk9KLYMsQqKsqwLgBh4aOSXouqrA1GC0Tp3pB ayUyJ7znFuFQxXo0qN2CKBFUPNRqBr5wVXP7y/D15u774e3xIDO+DkY4la3SWjFXNN8k 5XGUdyzLaEAKZCoSS/s5A2+h+HTfzdegdmwSASZxob1OM1BJbLIQCa3IchgzXK6IN+ID Ia/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=P97L7+WA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id e91-v6si914995qva.247.2018.05.02.15.17.05 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:17:05 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=P97L7+WA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52785 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE03c-00016v-Rl for patch@linaro.org; Wed, 02 May 2018 18:17:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58575) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02Z-0000ap-DF for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02X-0007pA-Gt for qemu-devel@nongnu.org; Wed, 02 May 2018 18:15:59 -0400 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]:43068) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02X-0007oK-BS for qemu-devel@nongnu.org; Wed, 02 May 2018 18:15:57 -0400 Received: by mail-pf0-x244.google.com with SMTP id b26so199724pfi.10 for ; Wed, 02 May 2018 15:15:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ttF+PGQCCRk+6WGb0b/LmzzNUpVRejL7hhsfT7m+hVs=; b=P97L7+WAfrFaZJHhzeNQe46cRIyFVwkBymc4n1oguuZzDSzh35LSFEsb3ExIO9rOS3 F4GkDWZUqGEYB//Mm24FfRgO5KozZVN7ioITIwtmNajDMiige4++JGH2kydmOhNpsncr G0G01uGBpHI+/o4fAxSDZekAsrj6C4NpSqtOA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ttF+PGQCCRk+6WGb0b/LmzzNUpVRejL7hhsfT7m+hVs=; b=TN03EQe1AVw2uDEfLu4VapDkJQreW0BddzZEd6TGfVpBWblPscwWPiWFq6AfBfGsbJ d4IcNe+C+RZz2fwivVUSPDspZKKaj9yf9nMEm1ImQp8/kRV0ZpasawMyRJi4YSjnXMbR LH8DMXDXeVGTMpw27++9QlS/6k/EiQLZVis94KYkzjDtQDULNkxPJnaGxK8Wspvo5ZVE 2OzMyT2zsCcGnnMuNZ+yE6W42VPH/thvRZx9AJumRyaav79PKbg+BQcys91BMoz1ife8 6QdUFxaKZe01l8YmuK7KGksLCRGxE/3pWg4v16c74JvGNvwCGa0OEucvrYQ9iB31wNzR 7aYA== X-Gm-Message-State: ALQs6tACSFS6mF4xa5gMHeo5TFebcLJMt7W92AR/++81OpAmW4PBl/J5 zD9CH6EFK4zdvY84ml6MQIaTCYxF6C8= X-Received: by 2002:a65:6027:: with SMTP id p7-v6mr3856905pgu.210.1525299356105; Wed, 02 May 2018 15:15:56 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.15.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:15:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:39 -0700 Message-Id: <20180502221552.3873-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::244 Subject: [Qemu-devel] [PATCH v2 01/14] target/arm: Implement vector shifted SCVF/UCVF for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" While we have some of the scalar paths for *CVF for fp16, we failed to decode the fp16 version of these instructions. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson --- v2: Use parens with (x << y) >> z. --- target/arm/translate-a64.c | 33 ++++++++++++++++++++------------- 1 file changed, 20 insertions(+), 13 deletions(-) -- 2.14.3 Reviewed-by: Peter Maydell diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index bff4e13bf6..68ca445691 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -7165,13 +7165,26 @@ static void handle_simd_shift_intfp_conv(DisasContext *s, bool is_scalar, int immh, int immb, int opcode, int rn, int rd) { - bool is_double = extract32(immh, 3, 1); - int size = is_double ? MO_64 : MO_32; - int elements; + int size, elements, fracbits; int immhb = immh << 3 | immb; - int fracbits = (is_double ? 128 : 64) - immhb; - if (!extract32(immh, 2, 2)) { + if (immh & 8) { + size = MO_64; + if (!is_scalar && !is_q) { + unallocated_encoding(s); + return; + } + } else if (immh & 4) { + size = MO_32; + } else if (immh & 2) { + size = MO_16; + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + } else { + /* immh == 0 would be a failure of the decode logic */ + g_assert(immh == 1); unallocated_encoding(s); return; } @@ -7179,20 +7192,14 @@ static void handle_simd_shift_intfp_conv(DisasContext *s, bool is_scalar, if (is_scalar) { elements = 1; } else { - elements = is_double ? 2 : is_q ? 4 : 2; - if (is_double && !is_q) { - unallocated_encoding(s); - return; - } + elements = (8 << is_q) >> size; } + fracbits = (16 << size) - immhb; if (!fp_access_check(s)) { return; } - /* immh == 0 would be a failure of the decode logic */ - g_assert(immh); - handle_simd_intfp_conv(s, rd, rn, elements, !is_u, fracbits, size); } From patchwork Wed May 2 22:15:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134865 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1203179lji; Wed, 2 May 2018 15:19:40 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrcRQBzSO5jLFHlmDZk1pEVqs+mjOHfyZUDdHylim5KMLMrBPdQhStx9umhvHBIUBpu9eV2 X-Received: by 2002:ac8:18c8:: with SMTP id o8-v6mr9586007qtk.400.1525299580867; Wed, 02 May 2018 15:19:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525299580; cv=none; d=google.com; s=arc-20160816; b=QJyzkm+dns7Yg3TCeYpl1UH1uIWUMt+mJTMVoLkdrYamxDGBw9CnhZYuKBxr+Kguug Y6SDt6JarWT3iweFJtEx/1ZkEvWrj7AlMyx+/V4jAng6OrryI+/tDPHLiPMP6NfahYUO G6laKxPwqBqO4JrFFxKseFjXRbyKXckkbDnzR+HFP8uvyMj3qyXpO/MoNsYoi2A3hQn3 UA58vpY82o14+h8eBW68u5qGABUqe13k4dOcF53z6SzkSzL4t2vmaWx1K2ROr6TjwBNu KsZEEfi5fMrT2LYyzWq9HfxckJqQBuulvz6W7vzpQRHG/9MqgIfqlS4wRVqeA+qj/O2u Ba6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=/7Is7JNJJAWMsuntBwVi2s5wQjfXgdNNCqqq9DMfcWs=; b=RY10s3s6bMeGdEipkn9AuZEWoeoBALWpXYXFLt1Nk5nvbVWJbJFOJFg/eGnZRTUab5 HfrXdCwEsLVwkQmIr3HwclNkFH+1r+iPTEVkI1irtkfFvtUhXYMJ6MR+A7KYs23gfntZ iw9lnTdb9bAHJgKdbkT6KZm3yhYtQGIIw+ko/upHG+1ULgTO7PDmw1kY89K+yLIffxGf KTNIykaO4xYq7Gk4bJM+Yb/8SIQfC4CXjFhES4lnJ1rbemEPs18ToC/WfJEWX5ZbGief gAvVfgh0ey8kRE7F9hV2sDykk8HV50MpjDmLupFbgpoQpYoV97AnUZ63hZdZNCmMpjLF 19pw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Dib89hnS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id v68si4552621qkv.99.2018.05.02.15.19.40 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:19:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Dib89hnS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52803 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE068-0002v3-Bi for patch@linaro.org; Wed, 02 May 2018 18:19:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58608) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02a-0000at-BS for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02Y-0007qJ-RC for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:00 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:42513) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02Y-0007pV-L3 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:15:58 -0400 Received: by mail-pf0-x242.google.com with SMTP id p14so1579040pfh.9 for ; Wed, 02 May 2018 15:15:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/7Is7JNJJAWMsuntBwVi2s5wQjfXgdNNCqqq9DMfcWs=; b=Dib89hnSudeq1lR9lqlhhXVKPx83azCNoCDwFPf98GK0UNgQ4Z4+VHEHoiLeY998kt +J8QsjiEzPL9mxKpSYN7RU46lzMn0Nkg453QDOZmLE6p2ktdHzgxJfECBZKzkmxjItpw AVu2WPLKgJP9XRyND5hUxRsU9Tr9MBYtnC5/U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/7Is7JNJJAWMsuntBwVi2s5wQjfXgdNNCqqq9DMfcWs=; b=JVvKmcDab4v5hIMzoz92yd+CBY+HehhUUkZAa2cE0x8AhKk7zz4e9FDmWXtNuuZqdv 1kNDF0nhSHHOJ/kKigH/O1XI1oTM7fuX8jqVj8qgnzknrhozyIvN9Kn0i/Jy7qz6ijxd /vtQkaPWxTEiMu8lHTHcGMtC8RdRY+d/wwB6/zX4uNxmjfLunTiIJvB9luJGcdakKXpl HBBYMW3DMa69dj8VopVG5/iYb8X+o7pHrQmh1mJHunVOsiIOEzeY5SpnOyXumEnytfKU ilpxIG8rsKV8mmqg6GdaPhPLnhmzbiDmBQGfZX0ztkdd8uF4143TH4XDxyVYIMm5FF7i 9PmQ== X-Gm-Message-State: ALQs6tD1WSjSqa/qiMAjLK98mHOgm38ivEP1MgsQNkY6O/TmbfQtgrNB o5O2UEqO0PiGJ3b/FBcxnSJHUBZ3BBU= X-Received: by 2002:a65:6117:: with SMTP id z23-v6mr17103294pgu.72.1525299357362; Wed, 02 May 2018 15:15:57 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.15.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:15:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:40 -0700 Message-Id: <20180502221552.3873-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 02/14] target/arm: Implement vector shifted FCVT for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" While we have some of the scalar paths for FCVT for fp16, we failed to decode the fp16 version of these instructions. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson --- v2: Use parens with (x << y) >> z. --- target/arm/translate-a64.c | 65 ++++++++++++++++++++++++++++++++-------------- 1 file changed, 46 insertions(+), 19 deletions(-) -- 2.14.3 Reviewed-by: Peter Maydell diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 68ca445691..a64673575a 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -7208,19 +7208,28 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar, bool is_q, bool is_u, int immh, int immb, int rn, int rd) { - bool is_double = extract32(immh, 3, 1); int immhb = immh << 3 | immb; - int fracbits = (is_double ? 128 : 64) - immhb; - int pass; + int pass, size, fracbits; TCGv_ptr tcg_fpstatus; TCGv_i32 tcg_rmode, tcg_shift; - if (!extract32(immh, 2, 2)) { - unallocated_encoding(s); - return; - } - - if (!is_scalar && !is_q && is_double) { + if (immh & 0x8) { + size = MO_64; + if (!is_scalar && !is_q) { + unallocated_encoding(s); + return; + } + } else if (immh & 0x4) { + size = MO_32; + } else if (immh & 0x2) { + size = MO_16; + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + } else { + /* Should have split out AdvSIMD modified immediate earlier. */ + assert(immh == 1); unallocated_encoding(s); return; } @@ -7232,11 +7241,12 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar, assert(!(is_scalar && is_q)); tcg_rmode = tcg_const_i32(arm_rmode_to_sf(FPROUNDING_ZERO)); - tcg_fpstatus = get_fpstatus_ptr(false); + tcg_fpstatus = get_fpstatus_ptr(size == MO_16); gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); + fracbits = (16 << size) - immhb; tcg_shift = tcg_const_i32(fracbits); - if (is_double) { + if (size == MO_64) { int maxpass = is_scalar ? 1 : 2; for (pass = 0; pass < maxpass; pass++) { @@ -7253,20 +7263,37 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar, } clear_vec_high(s, is_q, rd); } else { - int maxpass = is_scalar ? 1 : is_q ? 4 : 2; + void (*fn)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_ptr); + int maxpass = is_scalar ? 1 : ((8 << is_q) >> size); + + switch (size) { + case MO_16: + if (is_u) { + fn = gen_helper_vfp_toulh; + } else { + fn = gen_helper_vfp_toslh; + } + break; + case MO_32: + if (is_u) { + fn = gen_helper_vfp_touls; + } else { + fn = gen_helper_vfp_tosls; + } + break; + default: + g_assert_not_reached(); + } + for (pass = 0; pass < maxpass; pass++) { TCGv_i32 tcg_op = tcg_temp_new_i32(); - read_vec_element_i32(s, tcg_op, rn, pass, MO_32); - if (is_u) { - gen_helper_vfp_touls(tcg_op, tcg_op, tcg_shift, tcg_fpstatus); - } else { - gen_helper_vfp_tosls(tcg_op, tcg_op, tcg_shift, tcg_fpstatus); - } + read_vec_element_i32(s, tcg_op, rn, pass, size); + fn(tcg_op, tcg_op, tcg_shift, tcg_fpstatus); if (is_scalar) { write_fp_sreg(s, rd, tcg_op); } else { - write_vec_element_i32(s, tcg_op, rd, pass, MO_32); + write_vec_element_i32(s, tcg_op, rd, pass, size); } tcg_temp_free_i32(tcg_op); } From patchwork Wed May 2 22:15:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134869 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1206242lji; Wed, 2 May 2018 15:23:58 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrTr/YKRniEnYXwhyceJOZXlyFdjEvKBuQzxjw1NotuaQfuPj9Ag/kVqR4YBTH+vrLhalmy X-Received: by 2002:a0c:e002:: with SMTP id j2-v6mr1629047qvk.62.1525299838721; Wed, 02 May 2018 15:23:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525299838; cv=none; d=google.com; s=arc-20160816; b=oXevlrDbercjEn4I3mMtAbb3moCAxlX2P2GW8YhSKTZTLwUo4B6UFwNRVG7fRu5YoI sZ2wnFPp+XPdkDktVwoPycq2DGsm67yrzIVC+ykKw94qXcPs60VZvADPXbnKpTsPFApL XiaOqRufjqcTVb+2yE0tA5yhRysh085RsGdOMLEGY/81xZ9jl5cIg8+LoFALWPqg8+q7 +Wpq6oIOR8Q8Y1j3JB1rXpZ1cZoazMpZt2OxpdlPj3DiqKbmS7rrxbz8F7DWcQioWYAW jyvY1LfaZD6FdunB1EvLF9pbqjbjstYuuWrbLlUqhvNJP+UzDRalV22ztmC754MzpYxj 0M6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=6YuI3pbqAJMHNcfp1+D7vk2rPkV7s0a8qv8kSCgMDvI=; b=gBFc/6FtUIp7RTXxfPHZumko9CB/S3+q1DkY5IfSiPqQx0kXE9TJS3V3YlFogetTdp hgP8dvFjc/fMZEKtjCZakGr+LNhHdys6tm2xmM0JSq9oojBCcmo+4s6x3+fCIgOa3TIA yLGdli4S3Jt8BkT/7nkVao/OhVtDZUQXu26RZBgoHEwn1TghNGqfSL8iOJSle5gFdHdw dWI6nKOlfpJPubdB8xrjxfTm4CCCMRjtA6DiWgWdd0AYy4AyQtUIvUVuCQ7cSWrvhIxu DeuNXdNvncsWNyKeUNtG/9tYoGONJRbDNG6jmxsyibRwkQ2ExNr5baAAszKjvjg7YrGf 9tpQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AWA4CST/; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id c40-v6si11508578qte.106.2018.05.02.15.23.58 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:23:58 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AWA4CST/; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52835 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0AI-000780-7P for patch@linaro.org; Wed, 02 May 2018 18:23:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58653) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02b-0000bc-GE for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02a-0007rZ-5N for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:01 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:44362) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02Z-0007qu-Sc for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:00 -0400 Received: by mail-pf0-x242.google.com with SMTP id q22so12956785pff.11 for ; Wed, 02 May 2018 15:15:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6YuI3pbqAJMHNcfp1+D7vk2rPkV7s0a8qv8kSCgMDvI=; b=AWA4CST/V4XCKqnOsjV9w1VyzjERzkP1xDePT8NlgfNdxDk9ChufuoSwMynN0P4SLu le0sI22Sb7t1R0nyITHGwMxO0wKgSlSecZU/we1mT034xGAt7nAh/LVQvEnAmrAv4R9A edZT8vltTh/9JKqX/+gt6udT65adO8eqN3dTo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6YuI3pbqAJMHNcfp1+D7vk2rPkV7s0a8qv8kSCgMDvI=; b=LMp7Tad9ijqFDkcGcWcPQcZzdwXU5x+6OUMaHIi09GUYB6ec2t9r6H16yc9heDm3ox g3/CDAo6RN3Dqr6od5G4xgnRaK02igsb+gHf7hxib/Hqeh/CruFLnW6r/mjc9mGUMkNU NpaVzkC1SocCGpn2N8M8+Ph+eOz4bHOQT4y2WtXdz1hIeqdSfVtq29pPMXqz7hzBKesF /hMJZx+VdsFXeg2x6WDljtbJnLGoTxQ331u4IJZQwq/Ih7Hmn4k7h3Yi8IDnzOiaKGXW cQ6nwVdbxxFcqFLLZSFa6KYLoixJ+F5sJsir7/qqqQffGCxPHbf1N25BMD6dW2NmCIWl Jzgg== X-Gm-Message-State: ALQs6tDl/BIcDEm0m+M0Wwu8EbyTNLfGDxyfmyG5zgxpGnChs17W5A+b kvPOtEHUwZ6XScrGqCCKil3YxOrk04Y= X-Received: by 2002:a63:5fd1:: with SMTP id t200-v6mr17819822pgb.246.1525299358617; Wed, 02 May 2018 15:15:58 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.15.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:15:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:41 -0700 Message-Id: <20180502221552.3873-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 03/14] target/arm: Fix float16 to/from int16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The instruction "ucvtf v0.4h, v04h, #2", with input 0x8000u, overflows the intermediate float16 to infinity before we have a chance to scale the output. Use float64 as the intermediate type so that no input argument (uint32_t in this case) can overflow or round before scaling. Given the declared argument, the signed int32_t function has the same problem. When converting from float16 to integer, using u/int32_t instead of u/int16_t means that the bounding is incorrect. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.h | 4 ++-- target/arm/helper.c | 53 ++++++++++++++++++++++++++++++++++++++++++++-- target/arm/translate-a64.c | 4 ++-- 3 files changed, 55 insertions(+), 6 deletions(-) -- 2.14.3 diff --git a/target/arm/helper.h b/target/arm/helper.h index 34e8cc8904..1969b37f2d 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -149,8 +149,8 @@ DEF_HELPER_3(vfp_toshd_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_tosld_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_touhd_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_tould_round_to_zero, i64, f64, i32, ptr) -DEF_HELPER_3(vfp_toulh, i32, f16, i32, ptr) -DEF_HELPER_3(vfp_toslh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_touhh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toshh, i32, f16, i32, ptr) DEF_HELPER_3(vfp_toshs, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosls, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosqs, i64, f32, i32, ptr) diff --git a/target/arm/helper.c b/target/arm/helper.c index 52a88e0297..ba04cddda0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11420,11 +11420,60 @@ VFP_CONV_FIX_A64(sq, s, 32, 64, int64) VFP_CONV_FIX(uh, s, 32, 32, uint16) VFP_CONV_FIX(ul, s, 32, 32, uint32) VFP_CONV_FIX_A64(uq, s, 32, 64, uint64) -VFP_CONV_FIX_A64(sl, h, 16, 32, int32) -VFP_CONV_FIX_A64(ul, h, 16, 32, uint32) + #undef VFP_CONV_FIX #undef VFP_CONV_FIX_FLOAT #undef VFP_CONV_FLOAT_FIX_ROUND +#undef VFP_CONV_FIX_A64 + +/* Conversion to/from f16 can overflow to infinity before/after scaling. + * Therefore we convert to f64 (which does not round), scale, + * and then convert f64 to f16 (which may round). + */ + +static float16 do_postscale_fp16(float64 f, int shift, float_status *fpst) +{ + return float64_to_float16(float64_scalbn(f, -shift, fpst), true, fpst); +} + +float16 HELPER(vfp_sltoh)(uint32_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(int32_to_float64(x, fpst), shift, fpst); +} + +float16 HELPER(vfp_ultoh)(uint32_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(uint32_to_float64(x, fpst), shift, fpst); +} + +static float64 do_prescale_fp16(float16 f, int shift, float_status *fpst) +{ + if (unlikely(float16_is_any_nan(f))) { + float_raise(float_flag_invalid, fpst); + return 0; + } else { + int old_exc_flags = get_float_exception_flags(fpst); + float64 ret; + + ret = float16_to_float64(f, true, fpst); + ret = float64_scalbn(ret, shift, fpst); + old_exc_flags |= get_float_exception_flags(fpst) + & float_flag_input_denormal; + set_float_exception_flags(old_exc_flags, fpst); + + return ret; + } +} + +uint32_t HELPER(vfp_toshh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int16(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint32_t HELPER(vfp_touhh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint16(do_prescale_fp16(x, shift, fpst), fpst); +} /* Set the current fp rounding mode and return the old one. * The argument is a softfloat float_round_ value. diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index a64673575a..7021a31b89 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -7269,9 +7269,9 @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar, switch (size) { case MO_16: if (is_u) { - fn = gen_helper_vfp_toulh; + fn = gen_helper_vfp_touhh; } else { - fn = gen_helper_vfp_toslh; + fn = gen_helper_vfp_toshh; } break; case MO_32: From patchwork Wed May 2 22:15:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134863 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1201408lji; Wed, 2 May 2018 15:17:26 -0700 (PDT) X-Google-Smtp-Source: AB8JxZq51hnDUAh1K29tLV5UXlvpmldn9U1WmXGEEuVmNxVtNXNewBhZkj1C1KkM7kcoGgMDAQ+O X-Received: by 10.55.37.140 with SMTP id l12mr17231917qkl.131.1525299446445; Wed, 02 May 2018 15:17:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525299446; cv=none; d=google.com; s=arc-20160816; b=OIiy2snJjxB8oK9iyTQrNujb9SNcvxFtqqzw1kOlkOEAx0K3CvMLfRP0VQzNBEZIfN tIIFb5i2t5HLA6U0qeFaoeKZ+ntLNGItjjFnFUJ90ehYaBOJhrzwAvhe4gC+Ri8TNGUQ G1vb8Yv5L4sC8Q+zdRLAYuJMU4KwELml+lbezpKsXre2U9PXL8cmthcUaTQT/S29MKpp VRbYohxlipnOOyjGiZ5vEQy1g810HGu+hRKm+wmRIUtUueUNSpDySA1B4gR41BhIssTw aIVhBWlQPeIwZ3+YxWzOKLyHeXPM4nv9bzsEWttIQhwcxBU9VA8D53Tat1RIjDJ6ANNL Ar1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=HhI4bpwSZ0GekzoXGS7KrVmo2AaxCWuHnRf4OdGfNGI=; b=UEo9Vko8scQLbO3zIsNad70dL8wr3MDRH5NdG2LJxksV9Jxy/bON+tqd/pvVA8k6Jg H+3SzL/kH7TX9oG0En0VgbkvTE3F/mSslKplwxlYYJ3c09Cs/0QnwnO2hxIy/vBXgtML OtOYe7zr9o49HW4weBV89huhZ+GiUz/CVde5wPDEvISbVW3GjGyk2aRTEWKsA/dFFDm3 Ai9uP3YZPU/z7J446kUw4dky7SxF+IBcGK6JfR8hvfC78GgYdwMa8C8OPhTYZCovRzDF RQ5VPJlJK+Vq+b/ubu+sTR9jtyBM0imXQYHt1B/I5cbIsLKF997P0BmLJZ2orxPunjEg LDVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=aLbn7kyN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id v15-v6si942641qtp.366.2018.05.02.15.17.26 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:17:26 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=aLbn7kyN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52794 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE03x-0001NL-W6 for patch@linaro.org; Wed, 02 May 2018 18:17:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58676) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02c-0000ce-72 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02b-0007sK-E5 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:02 -0400 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]:44364) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02b-0007rp-6O for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:01 -0400 Received: by mail-pf0-x244.google.com with SMTP id q22so12956834pff.11 for ; Wed, 02 May 2018 15:16:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HhI4bpwSZ0GekzoXGS7KrVmo2AaxCWuHnRf4OdGfNGI=; b=aLbn7kyNaVYO6PcXgcDlLp/AMICfWsnLrkXRzWDxvJP94iSkylV2LbSZFyZbNpE4fW YjAxP/tb4gL2/pDTJbTX0dj8CgoL0goLcZiE4HE0r5w8qFCjrkMbQGk2axs8qR/+4Gxx burI5cI/MmqTzzBmyzQwiNge+q+HCShadKwHQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HhI4bpwSZ0GekzoXGS7KrVmo2AaxCWuHnRf4OdGfNGI=; b=cm+TUSWw+QOVWVkEWzQtsjmmjkiXxja0kXxnKE24IztvS6H5bnll13TOULt+KWOIlL kLBVqjJOzUXDy3PQnP84EIta80uxh8GMiouX00ASzCl7PmI99GsfzqP7H7ncS4xkYpsQ eQEq9CaXE6uyE/H4XdclGmXFSdahwVr3QXaeJN26tEbRDjeCin8cT9MV5j2Yp69VUN5o NNjq+utQcDz/LR/8Ttj1mSJjAvS8dFV0mxx2Eo7QULOxR95EPJPZcCYxF91ESvaRaa0b ULrT+3H5TyYL4WnSxfLeVxsYXNTrERoT5DvvTGa9mLPmn4BC0ACo2lMqWgozrCEIRv/a uMVA== X-Gm-Message-State: ALQs6tC2XgRReU3mY1iGx7blADzeWNMIQye8M8IjFlM6MJPJdeE14zuj ao6HCRdvmlLHBgWvEEo38KtHlXejg1M= X-Received: by 10.98.72.29 with SMTP id v29mr15252295pfa.57.1525299359937; Wed, 02 May 2018 15:15:59 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.15.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:15:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:42 -0700 Message-Id: <20180502221552.3873-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::244 Subject: [Qemu-devel] [PATCH v2 04/14] target/arm: Clear SVE high bits for FMOV X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Use write_fp_dreg and clear_vec_high to zero the bits that need zeroing for these cases. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) -- 2.14.3 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 7021a31b89..c64c3ed99d 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5444,31 +5444,24 @@ static void handle_fmov(DisasContext *s, int rd, int rn, int type, bool itof) if (itof) { TCGv_i64 tcg_rn = cpu_reg(s, rn); + TCGv_i64 tmp; switch (type) { case 0: - { /* 32 bit */ - TCGv_i64 tmp = tcg_temp_new_i64(); + tmp = tcg_temp_new_i64(); tcg_gen_ext32u_i64(tmp, tcg_rn); - tcg_gen_st_i64(tmp, cpu_env, fp_reg_offset(s, rd, MO_64)); - tcg_gen_movi_i64(tmp, 0); - tcg_gen_st_i64(tmp, cpu_env, fp_reg_hi_offset(s, rd)); + write_fp_dreg(s, rd, tmp); tcg_temp_free_i64(tmp); break; - } case 1: - { /* 64 bit */ - TCGv_i64 tmp = tcg_const_i64(0); - tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_offset(s, rd, MO_64)); - tcg_gen_st_i64(tmp, cpu_env, fp_reg_hi_offset(s, rd)); - tcg_temp_free_i64(tmp); + write_fp_dreg(s, rd, tcg_rn); break; - } case 2: /* 64 bit to top half. */ tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_hi_offset(s, rd)); + clear_vec_high(s, true, rd); break; } } else { From patchwork Wed May 2 22:15:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134866 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1203731lji; Wed, 2 May 2018 15:20:24 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpNc8PDpERIO+j5S/MfV3o5/vlkRKuSl79lqrJIrRLRc+ychCW9Kcyg9YZZ/x/D2fjrHqJa X-Received: by 10.233.225.13 with SMTP id g13mr16333191qkm.113.1525299623979; Wed, 02 May 2018 15:20:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525299623; cv=none; d=google.com; s=arc-20160816; b=e5PkVP6qFkumkfoS1BiLivFkYD0qY9rBJksuC5xGFYpTWU9zSZJBQGM4VrxZJCqFzx JlVcBW5U6WNFM6+JywmP9lwU0p2OR269djSK6gDmnv3Zt8kvrVI+aRzvmIJ33bThIQ4M 9/BoA6peWZSF33AaXmWg3ON4cc+nYaHnLNaWZzc/KRlJzzVXDrmtwehLfrY3F96Q7XNG HQbM88elJ+MonWXWs9tAGIElhkIEfq6Jfruz/cSVqy009ADSo7Phc8ivnEIdZ9S3zN8R AS8dvML6/M8zL4Ouq/ASGYtRoL6LS6ScwXj2C/kfus0PQqMlZagUxZeFgtxHxB3NOvrW IhiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=WwqWFnklKjiIuffvTXcb3kCGinNAr4T/DUG63Bdts3w=; b=TdBLm9B5Kg2bpf58h6BFoq3zwI37RTWgufALsgRvQ/ZYyvEt00cYVtPxqQoB3FGOE3 qHnHt0b969HXOyOcyqJgjIYHv/P1mx+OxK6enVx3n7HNeTMf/xCEwSsNoz0F9sLmb+Lm EHnafXoBsDjLckLrGLEmCcW9afPEQcB1Xf0ybKUFsz+/xoQO2EPBzoqLTaAU5plJvpOP Vb8G9GW3GbpabgPUAZdrT3VpQJwywCJPjcPzcDd3u6JGxuOWMhvXPylvKrVwi3DuJ1PA MfenjNtsOzlGmMZFpHenTSt8ewEflcT4b0ceVI2IEX517OckqAPqlysgnwarwQpSCuis cRdA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=a5N2jNNj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id j4-v6si8123qvb.41.2018.05.02.15.20.23 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:20:23 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=a5N2jNNj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52810 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE06p-0003U6-EQ for patch@linaro.org; Wed, 02 May 2018 18:20:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58725) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02d-0000em-MX for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02c-0007tR-MM for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:03 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:39709) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02c-0007sv-HI for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:02 -0400 Received: by mail-pf0-x242.google.com with SMTP id z9so12955528pfe.6 for ; Wed, 02 May 2018 15:16:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WwqWFnklKjiIuffvTXcb3kCGinNAr4T/DUG63Bdts3w=; b=a5N2jNNj+fXoT9hLC83Eyxc2IWCv6rCTxhDJjcPO3+OfocOxmBvRUuYrB51fIriE22 jQ8FMNWLZvK1o8x23nUrzQPllbnqGU/wblJqZZeD/1OsCj7pa05sPiwnV2dYf8zsFeDj h9wDNh43AjydGfcplR7S+wxxBqgfuV76Q8Ih4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WwqWFnklKjiIuffvTXcb3kCGinNAr4T/DUG63Bdts3w=; b=V0lO2JfJlloxy0WjIuaysTU06dSfV5K4jJHcHSTENighm6dD40kKzO1cN2+YbZKQaI WGsblTszOGoenLMP/9wLu3a5AFBNYEg5SU0hrPIoFcEMrg7SbIdNRNxu2S6iqZwtbo0p vmgK2wtKAhMusHlfF7+IAHwVl42VZu7gbL+M92vtZj6DHegqQCwTqmqABoXrRH64KQtI sv2pcdt+NcHoCp6y3Wv5bVC1jl3RvfmM/72MlPHWi8210IBUGMWBjwoz3IwUop8avJWn rPP/B4OjAcH2AqkXhhd4lOO8QsVUmSde3KWE+orB5DYQn+4Xho/PvybQ+vAp4iIyrJwf MoeA== X-Gm-Message-State: ALQs6tCoVy4bfPUUCpNC3kV/mbPgzCDDGiSwOrgcefCyandOoNFTbv60 ztouSPYmW+/Gagp90WpeaQ0jNX/Tvh0= X-Received: by 10.98.201.92 with SMTP id k89mr20787451pfg.47.1525299361286; Wed, 02 May 2018 15:16:01 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:43 -0700 Message-Id: <20180502221552.3873-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 05/14] target/arm: Implement FMOV (general) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Adding the fp16 moves to/from general registers. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) -- 2.14.3 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index c64c3ed99d..247a4f0cce 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5463,6 +5463,15 @@ static void handle_fmov(DisasContext *s, int rd, int rn, int type, bool itof) tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_hi_offset(s, rd)); clear_vec_high(s, true, rd); break; + case 3: + /* 16 bit */ + tmp = tcg_temp_new_i64(); + tcg_gen_ext16u_i64(tmp, tcg_rn); + write_fp_dreg(s, rd, tmp); + tcg_temp_free_i64(tmp); + break; + default: + g_assert_not_reached(); } } else { TCGv_i64 tcg_rd = cpu_reg(s, rd); @@ -5480,6 +5489,12 @@ static void handle_fmov(DisasContext *s, int rd, int rn, int type, bool itof) /* 64 bits from top half */ tcg_gen_ld_i64(tcg_rd, cpu_env, fp_reg_hi_offset(s, rn)); break; + case 3: + /* 16 bit */ + tcg_gen_ld16u_i64(tcg_rd, cpu_env, fp_reg_offset(s, rn, MO_16)); + break; + default: + g_assert_not_reached(); } } } @@ -5519,10 +5534,15 @@ static void disas_fp_int_conv(DisasContext *s, uint32_t insn) case 0xa: /* 64 bit */ case 0xd: /* 64 bit to top half of quad */ break; + case 0x6: /* 16-bit */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ default: /* all other sf/type/rmode combinations are invalid */ unallocated_encoding(s); - break; + return; } if (!fp_access_check(s)) { From patchwork Wed May 2 22:15:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134867 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1205023lji; Wed, 2 May 2018 15:22:09 -0700 (PDT) X-Google-Smtp-Source: AB8JxZopmRdwS/yA9fqtQakFdBMpbEeiCdcJY/ESEOH4ObTXveh93MFJ95jbsM5/hnrbzkEXfPyu X-Received: by 10.55.65.79 with SMTP id o76mr16444629qka.24.1525299728956; Wed, 02 May 2018 15:22:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525299728; cv=none; d=google.com; s=arc-20160816; b=MG82SiUXTxkidMCFMZEgmASMtlnB7N1R5sniRjjWhyzQG9TpbTCYngVYmmtNMQ7b8C bRGesWNJlMHgOtTQsv5MJp3uD1nUnWG4M6cKsXQ0431sL0gI+gqSjOJ9YpwlqPoKoIf9 4AtpSGCD71fF7oXZLsEVzVGSZy+Swc3JxUJ02bIcQFFlJQqiy/RNlCMjVc0DvN5rspvN lt1gRlMJ3lK+7KdUnh0geE/liP4ye5Zj8QWAO2TBO/ep5o1Mcs/L8vj0eqV9HNdIH6mM JX1RFgrZo4Btx144DRzbi9Mv3uThaGwfJPhv3/QMimPfC3oxdRm+lxGJd1PtBEc5UP+U G/Dw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=f8miKIJRLY9NrBo+16MHxogxHquu/1wJws6BUD0nnSY=; b=Si2a95fbv14/8bDYYGGn9oCOwV2TL4J9PgKPu+RpXJzy+9X6Jl2bUA1qELGUqRbYlR TazGe8equhiw3EzGERedXUGIcb5r3MKmca2dB4s8XU4LdzU4ky+m4eZp++JGTe4s4uqL 1cos5DCqH+JGkLBp2iZpebdEnvT6+whXuZIIYvCuUJ8RronRAjympfEZW7FuT/fIytXl hE8Wp7lDjQ8LBdcoRIaRKLcxMyPFGSTjJBEoqSEtDmWjZ7o5uAQWt7XoA8e5FCufjnCK J2wqWqbqRugKTyfKAGX27+O3RWLdH7O5Xculp6D++395uMi7/bFaWnC10xuPRB230L66 m67g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=eAZtGX8X; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id n73si333949qka.75.2018.05.02.15.22.08 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:22:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=eAZtGX8X; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52821 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE08W-0005Ly-Ee for patch@linaro.org; Wed, 02 May 2018 18:22:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58777) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02f-0000hG-Mc for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02e-0007uV-14 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:05 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:33251) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02d-0007ty-PA for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:03 -0400 Received: by mail-pf0-x242.google.com with SMTP id f20so4172280pfn.0 for ; Wed, 02 May 2018 15:16:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=f8miKIJRLY9NrBo+16MHxogxHquu/1wJws6BUD0nnSY=; b=eAZtGX8XK4muXeHo9po3xDWX0Nto1AsHGbdqF5+zF2lq22bMv8q5cBNolQWwRKQXiD 2j2OXIKakyIYQl8oeTwgNQGrcNKOZwNwiH10j+zcwA7t9a+S5lDrh59p9eoGGm34vjD6 PXjRMypNzjb7gtfSwwkT3UlGd59K1VM73Tt1k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=f8miKIJRLY9NrBo+16MHxogxHquu/1wJws6BUD0nnSY=; b=PJDxkee3B/qKksxafNuZBTMcqP233YTMFHKJPt/V0Gf89TmmDgkzOqJRvbat7JnBaE g2ozDsp2PKGH9tyGxAIfdD7mh9uJoXfrh8zMinriazwEXtl7jLXuGaTRELwC+RS8VbxX pCi3QQLkHVPyTaoE/GeXfuNrrYDfqy/Xvl+Ki0JJcx3r0lKg5MrmYhfHikpV8/9bmCLK b0TxPsHCKxmcFwBUB9urgeCiIACbU5xyOdSPgtMfHKe74G5SRQXeaw2473cl6uWv9sYQ e6kXRNmKeH1rwF3zhe0RCCkyZv0E5wHZRckQzETnT4vB2htowJ5PYdN+drbUJ7CpXPS7 jFow== X-Gm-Message-State: ALQs6tDl8g4U55PovuZXRa10rj/LSPkYefistJel0Pa6EmSYg3wbsPql YFnAsXyFpfPA8Cvw4kveT5D8UhcAmDo= X-Received: by 10.98.15.23 with SMTP id x23mr20998345pfi.3.1525299362491; Wed, 02 May 2018 15:16:02 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:44 -0700 Message-Id: <20180502221552.3873-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 06/14] target/arm: Implement FCVT (scalar, integer) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Cc: qemu-stable@nongnu.org Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.h | 6 +++ target/arm/helper.c | 38 +++++++++++++++++- target/arm/translate-a64.c | 96 ++++++++++++++++++++++++++++++++++++++-------- 3 files changed, 122 insertions(+), 18 deletions(-) -- 2.14.3 diff --git a/target/arm/helper.h b/target/arm/helper.h index 1969b37f2d..ce89968b2d 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -151,6 +151,10 @@ DEF_HELPER_3(vfp_touhd_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_tould_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_touhh, i32, f16, i32, ptr) DEF_HELPER_3(vfp_toshh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toulh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toslh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_touqh, i64, f16, i32, ptr) +DEF_HELPER_3(vfp_tosqh, i64, f16, i32, ptr) DEF_HELPER_3(vfp_toshs, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosls, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosqs, i64, f32, i32, ptr) @@ -177,6 +181,8 @@ DEF_HELPER_3(vfp_ultod, f64, i64, i32, ptr) DEF_HELPER_3(vfp_uqtod, f64, i64, i32, ptr) DEF_HELPER_3(vfp_sltoh, f16, i32, i32, ptr) DEF_HELPER_3(vfp_ultoh, f16, i32, i32, ptr) +DEF_HELPER_3(vfp_sqtoh, f16, i64, i32, ptr) +DEF_HELPER_3(vfp_uqtoh, f16, i64, i32, ptr) DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, ptr) DEF_HELPER_FLAGS_2(set_neon_rmode, TCG_CALL_NO_RWG, i32, i32, env) diff --git a/target/arm/helper.c b/target/arm/helper.c index ba04cddda0..1fbf5fdec9 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11427,8 +11427,12 @@ VFP_CONV_FIX_A64(uq, s, 32, 64, uint64) #undef VFP_CONV_FIX_A64 /* Conversion to/from f16 can overflow to infinity before/after scaling. - * Therefore we convert to f64 (which does not round), scale, - * and then convert f64 to f16 (which may round). + * Therefore we convert to f64, scale, and then convert f64 to f16; or + * vice versa for conversion to integer. + * + * For 16- and 32-bit integers, the conversion to f64 never rounds. + * For 64-bit integers, any integer that would cause rounding will also + * overflow to f16 infinity, so there is no double rounding problem. */ static float16 do_postscale_fp16(float64 f, int shift, float_status *fpst) @@ -11446,6 +11450,16 @@ float16 HELPER(vfp_ultoh)(uint32_t x, uint32_t shift, void *fpst) return do_postscale_fp16(uint32_to_float64(x, fpst), shift, fpst); } +float16 HELPER(vfp_sqtoh)(uint64_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(int64_to_float64(x, fpst), shift, fpst); +} + +float16 HELPER(vfp_uqtoh)(uint64_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(uint64_to_float64(x, fpst), shift, fpst); +} + static float64 do_prescale_fp16(float16 f, int shift, float_status *fpst) { if (unlikely(float16_is_any_nan(f))) { @@ -11475,6 +11489,26 @@ uint32_t HELPER(vfp_touhh)(float16 x, uint32_t shift, void *fpst) return float64_to_uint16(do_prescale_fp16(x, shift, fpst), fpst); } +uint32_t HELPER(vfp_toslh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int32(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint32_t HELPER(vfp_toulh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint32(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint64_t HELPER(vfp_tosqh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int64(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint64_t HELPER(vfp_touqh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint64(do_prescale_fp16(x, shift, fpst), fpst); +} + /* Set the current fp rounding mode and return the old one. * The argument is a softfloat float_round_ value. */ diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 247a4f0cce..d794744aec 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5274,11 +5274,11 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode, bool itof, int rmode, int scale, int sf, int type) { bool is_signed = !(opcode & 1); - bool is_double = type; TCGv_ptr tcg_fpstatus; - TCGv_i32 tcg_shift; + TCGv_i32 tcg_shift, tcg_single; + TCGv_i64 tcg_double; - tcg_fpstatus = get_fpstatus_ptr(false); + tcg_fpstatus = get_fpstatus_ptr(type == 3); tcg_shift = tcg_const_i32(64 - scale); @@ -5296,8 +5296,9 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode, tcg_int = tcg_extend; } - if (is_double) { - TCGv_i64 tcg_double = tcg_temp_new_i64(); + switch (type) { + case 1: /* float64 */ + tcg_double = tcg_temp_new_i64(); if (is_signed) { gen_helper_vfp_sqtod(tcg_double, tcg_int, tcg_shift, tcg_fpstatus); @@ -5307,8 +5308,10 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode, } write_fp_dreg(s, rd, tcg_double); tcg_temp_free_i64(tcg_double); - } else { - TCGv_i32 tcg_single = tcg_temp_new_i32(); + break; + + case 0: /* float32 */ + tcg_single = tcg_temp_new_i32(); if (is_signed) { gen_helper_vfp_sqtos(tcg_single, tcg_int, tcg_shift, tcg_fpstatus); @@ -5318,6 +5321,23 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode, } write_fp_sreg(s, rd, tcg_single); tcg_temp_free_i32(tcg_single); + break; + + case 3: /* float16 */ + tcg_single = tcg_temp_new_i32(); + if (is_signed) { + gen_helper_vfp_sqtoh(tcg_single, tcg_int, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_uqtoh(tcg_single, tcg_int, + tcg_shift, tcg_fpstatus); + } + write_fp_sreg(s, rd, tcg_single); + tcg_temp_free_i32(tcg_single); + break; + + default: + g_assert_not_reached(); } } else { TCGv_i64 tcg_int = cpu_reg(s, rd); @@ -5334,8 +5354,9 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode, gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); - if (is_double) { - TCGv_i64 tcg_double = read_fp_dreg(s, rn); + switch (type) { + case 1: /* float64 */ + tcg_double = read_fp_dreg(s, rn); if (is_signed) { if (!sf) { gen_helper_vfp_tosld(tcg_int, tcg_double, @@ -5353,9 +5374,14 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode, tcg_shift, tcg_fpstatus); } } + if (!sf) { + tcg_gen_ext32u_i64(tcg_int, tcg_int); + } tcg_temp_free_i64(tcg_double); - } else { - TCGv_i32 tcg_single = read_fp_sreg(s, rn); + break; + + case 0: /* float32 */ + tcg_single = read_fp_sreg(s, rn); if (sf) { if (is_signed) { gen_helper_vfp_tosqs(tcg_int, tcg_single, @@ -5377,14 +5403,39 @@ static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode, tcg_temp_free_i32(tcg_dest); } tcg_temp_free_i32(tcg_single); + break; + + case 3: /* float16 */ + tcg_single = read_fp_sreg(s, rn); + if (sf) { + if (is_signed) { + gen_helper_vfp_tosqh(tcg_int, tcg_single, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_touqh(tcg_int, tcg_single, + tcg_shift, tcg_fpstatus); + } + } else { + TCGv_i32 tcg_dest = tcg_temp_new_i32(); + if (is_signed) { + gen_helper_vfp_toslh(tcg_dest, tcg_single, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_toulh(tcg_dest, tcg_single, + tcg_shift, tcg_fpstatus); + } + tcg_gen_extu_i32_i64(tcg_int, tcg_dest); + tcg_temp_free_i32(tcg_dest); + } + tcg_temp_free_i32(tcg_single); + break; + + default: + g_assert_not_reached(); } gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); tcg_temp_free_i32(tcg_rmode); - - if (!sf) { - tcg_gen_ext32u_i64(tcg_int, tcg_int); - } } tcg_temp_free_ptr(tcg_fpstatus); @@ -5553,7 +5604,20 @@ static void disas_fp_int_conv(DisasContext *s, uint32_t insn) /* actual FP conversions */ bool itof = extract32(opcode, 1, 1); - if (type > 1 || (rmode != 0 && opcode > 1)) { + if (rmode != 0 && opcode > 1) { + unallocated_encoding(s); + return; + } + switch (type) { + case 0: /* float32 */ + case 1: /* float64 */ + break; + case 3: /* float16 */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } From patchwork Wed May 2 22:15:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134872 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1208773lji; Wed, 2 May 2018 15:27:30 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrGldw/uIBgoi5/nioA/AbFtpHNL2oHQ/Y52eDx2iN8xGcuXj3o8WxY+8Av30q0rXmiVKcd X-Received: by 2002:a0c:f690:: with SMTP id p16-v6mr1467596qvn.69.1525300050374; Wed, 02 May 2018 15:27:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525300050; cv=none; d=google.com; s=arc-20160816; b=K70mLGOROT1i4bljDeUHvPNtMUVQY9wN2dehVW22fSX1MxPFSrmaenGfjSI1r74jmG +cEWDT8SXlOmltW8ssVQR3Lm90RJKQ5egx9BCdzb/XPbguzq0hLK++n8jzSxZ7IBijQi nVD39X3yYATKrR6M0U1YRtcb24n69GaVuZZAnm9ATAfGwSsvyL3ydRB4HBGe0v6zke6q KQQD4nWUr43EfTEH35AsgAotUFZBAqCwqYekbam6kMTXrdPPh4scIKm0NPARXIN7AdAx /mC73SBQK/Uju2pAHmGea0QSah0Yd9I9Kdx/UZrAqWWJ5DeAKaPFMFozo0TIug8kcpgp NGzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=aO/IxXadKJBMZQYzwQFN+bW33atvEbEmYfm1LunIZS0=; b=McBk3YD5KuxMOYTRGxJFq2j4o/zLvZuiio1LzUh6a8j8BVlZLi+pOktBwiFz93B8Aa J6usgewvLIMe4gmjSbJYoC172VLAjJOlhkdCQCkwrap0TsQpsXrXUfAAdUSrw/ulbaVy 5o4IPfD3X4w/Wgy5bx1tpCtBSVQOb4bMZQN6qIfjZqvEogibWXwG9xfYoojq6AwF4fU4 qu9xeGYceNEL/taFN2zbU6dtyIQS8UjB0JjWPQ2+GpNIkn0P8jloDqWoQQ9g+XUhykTo 2ymug4cGFkizMfB6vfB6I9XwATTv+MFubWAtc14GWM4QZX6FnEx+/Uq3rJRWF4xbSbZ/ Wp/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kDI9+kYI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id h7-v6si6930926qvk.34.2018.05.02.15.27.30 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:27:30 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kDI9+kYI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52863 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0Dh-0001Y0-R4 for patch@linaro.org; Wed, 02 May 2018 18:27:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58837) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02i-0000kg-GG for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02f-0007v6-6e for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:08 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:43067) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02f-0007uf-04 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:05 -0400 Received: by mail-pf0-x242.google.com with SMTP id b26so199950pfi.10 for ; Wed, 02 May 2018 15:16:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aO/IxXadKJBMZQYzwQFN+bW33atvEbEmYfm1LunIZS0=; b=kDI9+kYIiW2Ns1Xtcm6k9UlDtX6pF6xMISajHn9ml7wV7mTE9PzDmEh9hHJFwHKSsa gUDCFwaEJBC7OcXV42oC4B1UaEyWTpATQatmnFUPhFXY4kt2IUbvJn/HsN6yMyEVEqJ+ 9rrjgfm4MRbmo8yDXedNKjx5ONITOuVZUUvSw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aO/IxXadKJBMZQYzwQFN+bW33atvEbEmYfm1LunIZS0=; b=k8QOxb4puFlPyTpvLl7FAG6/1E3LUT4ZukUmpXyan8Zjf0oH5gsGPnoTTIO0N5R237 luuaxQBOAGsz09GP+kKy63/hPrgO/FFfTppGoysoC3IPJq8emLD3oxrExhYiTrLzJnWZ XwvFWM05057OqrDivH+pK94DkNMI4C6r86tCxc28K4Alx6Eus096y+X+xDgFDuqlZIQQ eSLmOSXb4+qWhR6qybeCIvC0TgkZ3s2F/cxAptEBW+ZwmnHZzQB8EXfw7UkgVHBM+8Cy ewk4TC4HIc1abH4IkVaQrxHsTGshdpAesU8BxqmLLbsNYRmWJ6bxVzY49FTJRyD6dlVr Uh0Q== X-Gm-Message-State: ALQs6tBeXKF2nNkFDIlh6PHEXG1vpASG6ndK/AFMEg8J8afMk18T8gXC oGCJ2njttnbeuSsodUXiNQjgLX4gPlE= X-Received: by 10.98.35.11 with SMTP id j11mr20798987pfj.177.1525299363768; Wed, 02 May 2018 15:16:03 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:45 -0700 Message-Id: <20180502221552.3873-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 07/14] target/arm: Implement FCVT (scalar, fixed-point) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Cc: qemu-stable@nongnu.org Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) -- 2.14.3 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d794744aec..e19d97e8f1 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5460,8 +5460,7 @@ static void disas_fp_fixed_conv(DisasContext *s, uint32_t insn) bool sf = extract32(insn, 31, 1); bool itof; - if (sbit || (type > 1) - || (!sf && scale < 32)) { + if (sbit || (!sf && scale < 32)) { unallocated_encoding(s); return; } @@ -5480,6 +5479,20 @@ static void disas_fp_fixed_conv(DisasContext *s, uint32_t insn) return; } + switch (type) { + case 0: /* float32 */ + case 1: /* float64 */ + break; + case 3: /* float16 */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { return; } From patchwork Wed May 2 22:15:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134873 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1208959lji; Wed, 2 May 2018 15:27:47 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpzpz2mFDwl8kaZLrHW6lTVsRYBF5Horf4od9wOM6Q/cE8E9dCNxSThDrsLviJIIcwrEXjE X-Received: by 2002:a0c:9e4c:: with SMTP id z12-v6mr17406657qve.152.1525300067035; Wed, 02 May 2018 15:27:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525300067; cv=none; d=google.com; s=arc-20160816; b=gFYh3MEddcxBfFP6UwLSMxFBqSXUFtD1zK55qqdqOX95JCCpxlOudVJgE8WHThNwVb eLmk/lQ2kalD2lBzwnkleeOdIMQkWHcPg4L9jWSLAy5wQaDFksMxyYarxPzlNfoTPgXM rSa1QZ/GfDrLs0zJF3t3pTemKQ48ovDJvChq0Pqd++x40ZpI3VsfE+v78XfdlMmBziZ7 IXdQfIzUr03wHU7dn9ZJnRrQ0cgvsPYuepCjSD8kfOzuJOvEzp9zLpOcOkCjPqVuU46p YX3iHLQdYTU8h86VlD723L7v7sVk/sehpmvxbiWDbVXDOz640HowRYbhaBREB/PuH0rI Gc6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=4QcG9pnmYxuAv/iY+aAUQ08duv6GdfnD0qVmKawXzqg=; b=1J1jCIXBy9AgYmSCl6pPE39YE/SbPKb70j2eJ2dGQ43E7Xn3BoaBzfr/XgGjEJsVw5 5jo6QpnC5cUOYfNGrn774hshZDWImb+7Iu7d+f4PmDBUQWcoHrCCELgXiLI1Ex8zhV0d oYn/asLT7pDuUdTXeYbIIXh2eGX6/6gZqIhs3R+3Csk63IWr+4T4kohWPkMKje2+yUqG PQ5vg0V35w5F09dsF+Qyfb111urhRb5zz3VELgPs25gZT2Q/XOKIkGASmCvlc2ZuJ4qO mu0s8sJSgzeM+Bm72JCAAH3Xp5z9RSzMwS4ImBgA0FexLWs4Tm3WjUrBPRbVhOSO/jTO cMXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=O6G1H5bw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id f5-v6si118421qva.44.2018.05.02.15.27.46 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:27:47 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=O6G1H5bw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52864 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0Dy-00021V-IO for patch@linaro.org; Wed, 02 May 2018 18:27:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58836) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02i-0000kf-G7 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02g-0007w5-FB for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:08 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:34998) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02g-0007ve-A5 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:06 -0400 Received: by mail-pg0-x244.google.com with SMTP id j11-v6so11635426pgf.2 for ; Wed, 02 May 2018 15:16:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4QcG9pnmYxuAv/iY+aAUQ08duv6GdfnD0qVmKawXzqg=; b=O6G1H5bwAy6nF1xzP92ziwnJEMyNGIxbdKwGR8DY3gAbzjAHG1agj0myOwkc+ZEOMX PaIP/AA5g8qEZPo3qz8GTTKE4alzlfWKILBNxuNbv/EemkCfgerRjrtUtYvcw+3ILuEF mIxKVEiyg21xFWxxTznC7xdKOpEBsFWki5FwE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4QcG9pnmYxuAv/iY+aAUQ08duv6GdfnD0qVmKawXzqg=; b=ugshnaHyqemmhW0Yliaz2rPc6RWFeIx7e9sbH4Ty8c3oNlUrzhC2c7PR277mMQyjeF H91poUDTTwu8h/kY9izcz3Ejlh1sTSwNFHJlYVqp/YS2fQ8kNmmvhI0aW+E21TcTsmnz 7/y9VylHJfC9k0l3vuQDOtKHhdIbqgphyRJMJxsosj2fn0NHfW48lUR/ABHb3T3gkpf9 c8YWFjF+qjj/B2M+f+wig7zlk0xsXPMna7L62eQbmfNe0F7WX/HWbyQPURzX1sUciJtv DT4SvxamDJm+nkLeVqtwo+fGBqJL8gK4swAK9R+jDaFXWIpu4R9IhnKYnPAbnsd++/n6 Fivg== X-Gm-Message-State: ALQs6tDmJVZrua3btbuBD06Z9j+JMfag5sHEyEqlq7KrHCyP0TQ3FAhs zutxtMAVNX0gjTjq+KRYEVL6gnTKjEo= X-Received: by 10.98.129.5 with SMTP id t5mr20762673pfd.215.1525299365040; Wed, 02 May 2018 15:16:05 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:46 -0700 Message-Id: <20180502221552.3873-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v2 08/14] target/arm: Introduce and use read_fp_hreg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) -- 2.14.3 Reviewed-by: Peter Maydell diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index e19d97e8f1..8c63d5e743 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -614,6 +614,14 @@ static TCGv_i32 read_fp_sreg(DisasContext *s, int reg) return v; } +static TCGv_i32 read_fp_hreg(DisasContext *s, int reg) +{ + TCGv_i32 v = tcg_temp_new_i32(); + + tcg_gen_ld16u_i32(v, cpu_env, fp_reg_offset(s, reg, MO_16)); + return v; +} + /* Clear the bits above an N-bit vector, for N = (is_q ? 128 : 64). * If SVE is not enabled, then there are only 128 bits in the vector. */ @@ -4644,11 +4652,9 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn) static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int rn) { TCGv_ptr fpst = NULL; - TCGv_i32 tcg_op = tcg_temp_new_i32(); + TCGv_i32 tcg_op = read_fp_hreg(s, rn); TCGv_i32 tcg_res = tcg_temp_new_i32(); - read_vec_element_i32(s, tcg_op, rn, 0, MO_16); - switch (opcode) { case 0x0: /* FMOV */ tcg_gen_mov_i32(tcg_res, tcg_op); @@ -7543,13 +7549,10 @@ static void disas_simd_scalar_three_reg_diff(DisasContext *s, uint32_t insn) tcg_temp_free_i64(tcg_op2); tcg_temp_free_i64(tcg_res); } else { - TCGv_i32 tcg_op1 = tcg_temp_new_i32(); - TCGv_i32 tcg_op2 = tcg_temp_new_i32(); + TCGv_i32 tcg_op1 = read_fp_hreg(s, rn); + TCGv_i32 tcg_op2 = read_fp_hreg(s, rm); TCGv_i64 tcg_res = tcg_temp_new_i64(); - read_vec_element_i32(s, tcg_op1, rn, 0, MO_16); - read_vec_element_i32(s, tcg_op2, rm, 0, MO_16); - gen_helper_neon_mull_s16(tcg_res, tcg_op1, tcg_op2); gen_helper_neon_addl_saturate_s32(tcg_res, cpu_env, tcg_res, tcg_res); @@ -8090,13 +8093,10 @@ static void disas_simd_scalar_three_reg_same_fp16(DisasContext *s, fpst = get_fpstatus_ptr(true); - tcg_op1 = tcg_temp_new_i32(); - tcg_op2 = tcg_temp_new_i32(); + tcg_op1 = read_fp_hreg(s, rn); + tcg_op2 = read_fp_hreg(s, rm); tcg_res = tcg_temp_new_i32(); - read_vec_element_i32(s, tcg_op1, rn, 0, MO_16); - read_vec_element_i32(s, tcg_op2, rm, 0, MO_16); - switch (fpopcode) { case 0x03: /* FMULX */ gen_helper_advsimd_mulxh(tcg_res, tcg_op1, tcg_op2, fpst); @@ -12015,11 +12015,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn) } if (is_scalar) { - TCGv_i32 tcg_op = tcg_temp_new_i32(); + TCGv_i32 tcg_op = read_fp_hreg(s, rn); TCGv_i32 tcg_res = tcg_temp_new_i32(); - read_vec_element_i32(s, tcg_op, rn, 0, MO_16); - switch (fpop) { case 0x1a: /* FCVTNS */ case 0x1b: /* FCVTMS */ From patchwork Wed May 2 22:15:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134870 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1206919lji; Wed, 2 May 2018 15:24:56 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqOuPQu2Nrcv7ZqEOv9Iz0LFUtjl9f141wgBD5fWRKd3PpEcrzeE8145sWwXGA+VTHwCpHH X-Received: by 2002:ac8:668c:: with SMTP id d12-v6mr17382754qtp.344.1525299896052; Wed, 02 May 2018 15:24:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525299896; cv=none; d=google.com; s=arc-20160816; b=PqrQ67UqSQmmQIUMo507M/gev06m87CfOseABbmjqVx989/o/3fF46PUiLkxxitTfq cEKCP5dk6HWy1VDo6pk0A3K/Zah6lzyKQumz8nvW9DWmo1C0869REEb4rRZJfIhDWtQU jb87UiCQuHErwS7i/LaSGR+KiMqvQHCkVLzzuDK/At3em1KlOHxFgHQCRE1UhGmVh7ML c2zhIJmaboKCaMvm3pMleQBijxNhBSkLFVu3/d+kVR5mf2zV/m9PqSc7HcSzRXce2UE9 PFZ47ICAWGX5pbqB5yPPnHl0BO2/4tdp7Un+7aAxbFz/wbadsAUFcxg/U3+fEHchEd8j iP6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=WdCxTa5pgWvjIsEE2akqA9yOnPVSsIbNJWqXsUkxDak=; b=t+MY+JZzwflSftIuOAqc7Hws+lvie1yQlkyEDhr+NjFQbuq9/TU3E+Mj6gbUhqSTQp xOaHRLjFvTZN0rRA3UN2xkxfjTls/T2e2+YX+unf+dV8JX1VxgUE7IOubk+DIIEriYDn vuhx/fJtoPX/O7tgBuzaV7LX9g+E83ETcxvu7mNbY3HMciSQpTz4JQecvoRL6+2g57AV Wlnhdi7LIB/F3Rlbau+o8FuM/6p3+PYQVdhW/l51gWLXE0O+3E2vBmiNETKzbpM4UNjn woRetUslZ/DWNxZ/NR6MaZwQSKF8cTG4tDeo72jQbnI9NCy9NqtmEKch7P/HCeFpWvxa Vrtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Wkv3xhCH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id y7-v6si1515845qvl.90.2018.05.02.15.24.55 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:24:56 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Wkv3xhCH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52843 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0BD-00081O-Gn for patch@linaro.org; Wed, 02 May 2018 18:24:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58867) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02j-0000lk-9i for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02h-0007wv-PF for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:09 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:33605) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02h-0007wT-JQ for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:07 -0400 Received: by mail-pg0-x244.google.com with SMTP id i194-v6so11634147pgd.0 for ; Wed, 02 May 2018 15:16:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WdCxTa5pgWvjIsEE2akqA9yOnPVSsIbNJWqXsUkxDak=; b=Wkv3xhCHfVS2BVCCpwYkw9knikADuJp/4otyphPboxDxwzhDRloZCRUDft7jeHx3RZ EBjMQIB6mC0G47W9pppW10fxQql0TVy80B4Z0fp7uIoVUx8fb6lajbQRiDqvQC69zxRo HniQxf6IhOrV8+98kw7TLlrmpI4nfWUGaRSyE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WdCxTa5pgWvjIsEE2akqA9yOnPVSsIbNJWqXsUkxDak=; b=QYsodELDv54CmtMuCW9ikSRmPfgfRVVCaPbD5DnqR8olJuCinzgXDzfxGgz2ujyXKH JVMmEeEKAB9j9spN7iwvW6wz1iZDEKEybRlfhW4BytWBcGkvdhZZMt8t1c75xLQDLbdq ElzPTj6ntva1yREPYv34lDwtf9eGNICwC8LwBRfIFpjZutEsi+QZUq6tF1lKsfiT7UrJ JeJx4EQKOieGTP9ddl6dbP0+edu/tYuPW4sz/5fvlv3VqOJy8Dl+2Q4oRvcWBylwhxeo JsG6fr/Fns31IlHwC4H7fT4QyDQf/4VisEprjY8lOcPx4I6VijCH2v5g96CS/36ntHfU dvBA== X-Gm-Message-State: ALQs6tDtLY0HGMc3DiDmNOE2iPllG94ZXEeEJMW/CxRPoSaYm7QpEBt0 PYkk3NnkBkdkmqxghFWKui0irwL1sdg= X-Received: by 10.167.133.206 with SMTP id z14mr20763807pfn.2.1525299366423; Wed, 02 May 2018 15:16:06 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:47 -0700 Message-Id: <20180502221552.3873-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v2 09/14] target/arm: Implement FP data-processing (2 source) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We missed all of the scalar fp16 binary operations. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) -- 2.14.3 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 8c63d5e743..d7a49ef2e4 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5062,6 +5062,61 @@ static void handle_fp_2src_double(DisasContext *s, int opcode, tcg_temp_free_i64(tcg_res); } +/* Floating-point data-processing (2 source) - half precision */ +static void handle_fp_2src_half(DisasContext *s, int opcode, + int rd, int rn, int rm) +{ + TCGv_i32 tcg_op1; + TCGv_i32 tcg_op2; + TCGv_i32 tcg_res; + TCGv_ptr fpst; + + tcg_res = tcg_temp_new_i32(); + fpst = get_fpstatus_ptr(true); + tcg_op1 = read_fp_hreg(s, rn); + tcg_op2 = read_fp_hreg(s, rm); + + switch (opcode) { + case 0x0: /* FMUL */ + gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x1: /* FDIV */ + gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x2: /* FADD */ + gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x3: /* FSUB */ + gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x4: /* FMAX */ + gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x5: /* FMIN */ + gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x6: /* FMAXNM */ + gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x7: /* FMINNM */ + gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x8: /* FNMUL */ + gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); + tcg_gen_xori_i32(tcg_res, tcg_res, 0x8000); + break; + default: + g_assert_not_reached(); + } + + write_fp_sreg(s, rd, tcg_res); + + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(tcg_op1); + tcg_temp_free_i32(tcg_op2); + tcg_temp_free_i32(tcg_res); +} + /* Floating point data-processing (2 source) * 31 30 29 28 24 23 22 21 20 16 15 12 11 10 9 5 4 0 * +---+---+---+-----------+------+---+------+--------+-----+------+------+ @@ -5094,6 +5149,16 @@ static void disas_fp_2src(DisasContext *s, uint32_t insn) } handle_fp_2src_double(s, opcode, rd, rn, rm); break; + case 3: + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_2src_half(s, opcode, rd, rn, rm); + break; default: unallocated_encoding(s); } From patchwork Wed May 2 22:15:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134868 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1206138lji; Wed, 2 May 2018 15:23:46 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqIS9PBTSyC+4+8lnHW60q4Za7dYxP1qYUugHFIy574yghv8CMOLck0ySi7jxyU0NaZMogt X-Received: by 2002:ac8:70c3:: with SMTP id g3-v6mr16752470qtp.95.1525299826441; Wed, 02 May 2018 15:23:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525299826; cv=none; d=google.com; s=arc-20160816; b=Y+m9qprp//l9LT+fOfvXNig3YgYmHogl5tsv1JH+sQku1xhTQXaNOc8CDYi/iTh8Ui xK6B0WSZsFlwaJmJdQ6FcCmvfXtGtoljbSlK0osr4rnxCX2qLNTSYqBZwAKRHlWHhm1C kgZ39bVnwyuW+iJqBYMEH6Cw1ti2U+PTtXdxNX+9vNCnl8JqtNLSusdFxVbsRFowGsrL U5htv1w3mQSwKqscY+K2UXQ1N8Krl0qD2CwD4WtZ+cudgI8vuIFVvwgtA7XIs0Q3Rrjh pd9m3vPldxlR5hpECExCIu1mw29jnixk7igzW8vsjRf1lTx4RJCpioq70LBzCM1pmx3v NjvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=+NJcK2bxHsiTQWd1zChLZWnGl5un7Pg1c9+Vm3qmlP8=; b=T7PMTWqNZi46RBUjslhxad5BWr4tcAd9zi6htoM7jQ+lLlE+xSSdzbhjlil8Pn6d66 xvX5w73JwaB2erGFhRyk9U7X7I+aW5+YuGaPcXZOFhRz0BD5Akkt39eqQrg0Mtqm+54W EgKpmbajewIlmDt6LP03MB2slCJe+bq2mTiO8Yaqu1+tUmZVI+xEWRsZjRWucV7V4avQ QjLb+fWTYFNkW2Evdnt0iBYC2wx7LqwjZasRLWzQ0mOJcnPBNTm4mvbqO7QHE5cUvGhZ RVJC5PTTsiAcj6tjg1sUT1UTUQ4Vd5wksSgtxQTqlsJjxwxdZqlEmitrJpvOFIB0EUdL yWjw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=edVsKRIH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id l187si4383454qkc.304.2018.05.02.15.23.46 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:23:46 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=edVsKRIH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52833 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0A5-0006cr-QP for patch@linaro.org; Wed, 02 May 2018 18:23:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58912) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02k-0000ni-Fp for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02j-0007z5-CF for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:10 -0400 Received: from mail-pf0-x243.google.com ([2607:f8b0:400e:c00::243]:39710) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02j-0007y3-5M for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:09 -0400 Received: by mail-pf0-x243.google.com with SMTP id z9so12955726pfe.6 for ; Wed, 02 May 2018 15:16:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+NJcK2bxHsiTQWd1zChLZWnGl5un7Pg1c9+Vm3qmlP8=; b=edVsKRIHqE6KZU26kmq98OIAhB0lnubunVMxNkN+pbFB13uCPnSn0QOcusDzb9G0r5 If2Nv1D8wA66/ztKkHo3+LI4NBTuzJ4Ae8LZBdKtp4pph4jTf93LKn4IyyQwj/SPsbwB luG9KUfcZQyIA9PJxyE4lZOMRzDRNebwKFK80= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+NJcK2bxHsiTQWd1zChLZWnGl5un7Pg1c9+Vm3qmlP8=; b=Zbw6w/DXWk1asSejS3r811UY3q1Qe0fbaRXAlVqIt5zImfMfIFaNlR+sRX3tKQKWsv wIuDm3L92sDxAMEb4WUiKohHCTwPyAO5+lDiuzbV5U4ssxqTmd6jx9UPAWGw9oPUFmLa ig4XTJ5XRdla3t3J21IYSFs+RI0f5nrtz8B+8Za4Yp2f0/bBHJLZVyB2o7kuErLvHtlj K66i82UHqik9u8Mdv7PBVAtOn6uqhk1iv2qY/XgDs/8HX8TOAIFBj0DOt1z+r9MUQDw0 5X8C/5ixp0JWkSFGRBm5DGUzJ0P33hr9e5t661SMr6vK3WyDjcq6JHh4Uah0TMx1/lle MsMA== X-Gm-Message-State: ALQs6tDNpWS3F7oj0iyy0uktsVBVyoWV/EUef1NUfsHsYRnDwMsKiR14 0hnFjV0gkp9Fi4xBu7M+aDOytlw5AyE= X-Received: by 10.98.19.151 with SMTP id 23mr21028182pft.222.1525299367890; Wed, 02 May 2018 15:16:07 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:48 -0700 Message-Id: <20180502221552.3873-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::243 Subject: [Qemu-devel] [PATCH v2 10/14] target/arm: Implement FP data-processing (3 source) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We missed all of the scalar fp16 fma operations. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) -- 2.14.3 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d7a49ef2e4..9322b0d896 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5240,6 +5240,44 @@ static void handle_fp_3src_double(DisasContext *s, bool o0, bool o1, tcg_temp_free_i64(tcg_res); } +/* Floating-point data-processing (3 source) - half precision */ +static void handle_fp_3src_half(DisasContext *s, bool o0, bool o1, + int rd, int rn, int rm, int ra) +{ + TCGv_i32 tcg_op1, tcg_op2, tcg_op3; + TCGv_i32 tcg_res = tcg_temp_new_i32(); + TCGv_ptr fpst = get_fpstatus_ptr(true); + + tcg_op1 = read_fp_hreg(s, rn); + tcg_op2 = read_fp_hreg(s, rm); + tcg_op3 = read_fp_hreg(s, ra); + + /* These are fused multiply-add, and must be done as one + * floating point operation with no rounding between the + * multiplication and addition steps. + * NB that doing the negations here as separate steps is + * correct : an input NaN should come out with its sign bit + * flipped if it is a negated-input. + */ + if (o1 == true) { + tcg_gen_xori_i32(tcg_op3, tcg_op3, 0x8000); + } + + if (o0 != o1) { + tcg_gen_xori_i32(tcg_op1, tcg_op1, 0x8000); + } + + gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_op3, fpst); + + write_fp_sreg(s, rd, tcg_res); + + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(tcg_op1); + tcg_temp_free_i32(tcg_op2); + tcg_temp_free_i32(tcg_op3); + tcg_temp_free_i32(tcg_res); +} + /* Floating point data-processing (3 source) * 31 30 29 28 24 23 22 21 20 16 15 14 10 9 5 4 0 * +---+---+---+-----------+------+----+------+----+------+------+------+ @@ -5269,6 +5307,16 @@ static void disas_fp_3src(DisasContext *s, uint32_t insn) } handle_fp_3src_double(s, o0, o1, rd, rn, rm, ra); break; + case 3: + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_3src_half(s, o0, o1, rd, rn, rm, ra); + break; default: unallocated_encoding(s); } From patchwork Wed May 2 22:15:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134875 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1210035lji; Wed, 2 May 2018 15:29:19 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoE5G6D+NMkU6kW0x0d4ojmzlaGUye4H4UegaQeV0tii9txUfR6aqyD5KovSClWtuqGj7YA X-Received: by 2002:a0c:8815:: with SMTP id 21-v6mr1369750qvl.167.1525300158958; Wed, 02 May 2018 15:29:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525300158; cv=none; d=google.com; s=arc-20160816; b=LxT8Ly58tMTzTM1u7dJNyF0SP76um0D3oYTHu5s8zzdKzGUo73t/g06s0+jHF8yzrn 96sQaGaiOHHZOYOTJ6oIoqss0tSDrtAbOmEvSbt7+actooG7RMyXvIMMQyfy9uHoNljp ud2UMb01dwlYcgfDjOan1jQevZNvP07a1jZtCqyuezKzEp9EIB+8WPUuGzJ0Kn0kNU9X CjFPeDHoDd68O+vY+HFBqcEFlxS15nXjwghBLmv0b/1+MAu1y1wetfhEKUj3dre9t1Se Xwfria1szcrUM0gRhmHoPuNfIsZLIo1aanUxaIEmmbChD1kxO7W9JREzKI/d78kZeXva v+kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=DqVFNk569BoPF3fOx2mc2LarcCeWFIvVhbVzAZxftS4=; b=XLfNtScwNy73IiGqPFrT7I4rhkxI6EKmrHIYTn8kZTNIImjKw3qx2+iSs84z2F36b8 iotA4NfD+m9olzOIPmR3Nphk4+uYZpOCKKg/qD9az38utPjZM4mYNOnzAbZc831DvUAo 18z8qtIROONkpdjABx2NjA93qx9yOaKx1kNwd7N+EZ1pBwR+VV4j65hMO7xgdPyw2vy4 cyYudBPLOJ4A1mJOSJnzXXZGFwGh1J62o1XS2P02uFWlrpJrXKki6N3jDjyZUvcjv9U2 DjNK0XZ/VW5xNClnCmkUaCDZku1siHOialCAb4jRMMW0WB+aaebSVCHGB2ZV506hxJv0 0xAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=NkKb4Arx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id a8-v6si1338729qtb.175.2018.05.02.15.29.18 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:29:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=NkKb4Arx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52876 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0FS-00036l-GU for patch@linaro.org; Wed, 02 May 2018 18:29:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58956) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02m-0000op-4C for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02k-00080e-MG for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:12 -0400 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]:42516) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02k-0007zz-DV for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:10 -0400 Received: by mail-pf0-x244.google.com with SMTP id p14so1579385pfh.9 for ; Wed, 02 May 2018 15:16:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DqVFNk569BoPF3fOx2mc2LarcCeWFIvVhbVzAZxftS4=; b=NkKb4ArxC7sBnHkcVVY56ry3fdjcBHyXHdGcA9hWABmu9PZ3gI8A4ZwTKhAOYo9pXm XWPbm3qzPXpkqEriqtFqIN+6cjn8HQFfO05mDJFX+z7D1TvoZ/LdKZ+FoAAi7hhIo97B UeqQm7TPeceZquQ1oem1wMW4LkD2ePS/m4aqY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DqVFNk569BoPF3fOx2mc2LarcCeWFIvVhbVzAZxftS4=; b=GAbakhkYOE2YOEgejDiaIMe49Gnall42bzn5avQzHFrhfj1AH+DCi5dX048rCgSsfW U9zvMipCLf4x4zV024/F9K1kYgjnEJ3dFdcpfsjwRCyOToAlpXhqQRnVX2qD4zwJgHbC 79JQKfCz27n5crTTewXTf1jYnF84VabmPgptlAQKAV3W+ppCAStts4lOU/NfvI/8aPHm LKtsRhyfRb1WZlkmKp/rScZhZe5EKOkzS6LZtP2QKoDMSaftObJmbBrLcfvVe493Z0d3 2QQsyVjwrbPvW82JEGA/HyaiSaLgxfHBqU54cRDEQguH51vucLGn7rAMnw/4y19nBcTP wOaw== X-Gm-Message-State: ALQs6tCukhFfqK8sjIC1Qzvyt84y+VjpHB4ISN4JqOAZMNW0NSbEzONM +qU2iAn4BvrAYYxZHz6MhjmflXvBQb0= X-Received: by 2002:a63:545:: with SMTP id 66-v6mr17368110pgf.446.1525299369123; Wed, 02 May 2018 15:16:09 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:49 -0700 Message-Id: <20180502221552.3873-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::244 Subject: [Qemu-devel] [PATCH v2 11/14] target/arm: Implement FCMP for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alex Bennée These where missed out from the rest of the half-precision work. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Bennée [rth: Diagnose lack of FP16 before fp_access_check] Signed-off-by: Richard Henderson --- target/arm/helper-a64.h | 2 ++ target/arm/helper-a64.c | 10 ++++++ target/arm/translate-a64.c | 88 +++++++++++++++++++++++++++++++++++++--------- 3 files changed, 83 insertions(+), 17 deletions(-) -- 2.14.3 Reviewed-by: Peter Maydell diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h index ef4ddfe9d8..5c0b9bd799 100644 --- a/target/arm/helper-a64.h +++ b/target/arm/helper-a64.h @@ -19,6 +19,8 @@ DEF_HELPER_FLAGS_2(udiv64, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(sdiv64, TCG_CALL_NO_RWG_SE, s64, s64, s64) DEF_HELPER_FLAGS_1(rbit64, TCG_CALL_NO_RWG_SE, i64, i64) +DEF_HELPER_3(vfp_cmph_a64, i64, f16, f16, ptr) +DEF_HELPER_3(vfp_cmpeh_a64, i64, f16, f16, ptr) DEF_HELPER_3(vfp_cmps_a64, i64, f32, f32, ptr) DEF_HELPER_3(vfp_cmpes_a64, i64, f32, f32, ptr) DEF_HELPER_3(vfp_cmpd_a64, i64, f64, f64, ptr) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index afb25ad20c..35df07adb9 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -85,6 +85,16 @@ static inline uint32_t float_rel_to_flags(int res) return flags; } +uint64_t HELPER(vfp_cmph_a64)(float16 x, float16 y, void *fp_status) +{ + return float_rel_to_flags(float16_compare_quiet(x, y, fp_status)); +} + +uint64_t HELPER(vfp_cmpeh_a64)(float16 x, float16 y, void *fp_status) +{ + return float_rel_to_flags(float16_compare(x, y, fp_status)); +} + uint64_t HELPER(vfp_cmps_a64)(float32 x, float32 y, void *fp_status) { return float_rel_to_flags(float32_compare_quiet(x, y, fp_status)); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 9322b0d896..f0aca20771 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4475,14 +4475,14 @@ static void disas_data_proc_reg(DisasContext *s, uint32_t insn) } } -static void handle_fp_compare(DisasContext *s, bool is_double, +static void handle_fp_compare(DisasContext *s, int size, unsigned int rn, unsigned int rm, bool cmp_with_zero, bool signal_all_nans) { TCGv_i64 tcg_flags = tcg_temp_new_i64(); - TCGv_ptr fpst = get_fpstatus_ptr(false); + TCGv_ptr fpst = get_fpstatus_ptr(size == MO_16); - if (is_double) { + if (size == MO_64) { TCGv_i64 tcg_vn, tcg_vm; tcg_vn = read_fp_dreg(s, rn); @@ -4499,19 +4499,35 @@ static void handle_fp_compare(DisasContext *s, bool is_double, tcg_temp_free_i64(tcg_vn); tcg_temp_free_i64(tcg_vm); } else { - TCGv_i32 tcg_vn, tcg_vm; + TCGv_i32 tcg_vn = tcg_temp_new_i32(); + TCGv_i32 tcg_vm = tcg_temp_new_i32(); - tcg_vn = read_fp_sreg(s, rn); + read_vec_element_i32(s, tcg_vn, rn, 0, size); if (cmp_with_zero) { - tcg_vm = tcg_const_i32(0); + tcg_gen_movi_i32(tcg_vm, 0); } else { - tcg_vm = read_fp_sreg(s, rm); + read_vec_element_i32(s, tcg_vm, rm, 0, size); } - if (signal_all_nans) { - gen_helper_vfp_cmpes_a64(tcg_flags, tcg_vn, tcg_vm, fpst); - } else { - gen_helper_vfp_cmps_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + + switch (size) { + case MO_32: + if (signal_all_nans) { + gen_helper_vfp_cmpes_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } else { + gen_helper_vfp_cmps_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } + break; + case MO_16: + if (signal_all_nans) { + gen_helper_vfp_cmpeh_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } else { + gen_helper_vfp_cmph_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } + break; + default: + g_assert_not_reached(); } + tcg_temp_free_i32(tcg_vn); tcg_temp_free_i32(tcg_vm); } @@ -4532,16 +4548,35 @@ static void handle_fp_compare(DisasContext *s, bool is_double, static void disas_fp_compare(DisasContext *s, uint32_t insn) { unsigned int mos, type, rm, op, rn, opc, op2r; + int size; mos = extract32(insn, 29, 3); - type = extract32(insn, 22, 2); /* 0 = single, 1 = double */ + type = extract32(insn, 22, 2); rm = extract32(insn, 16, 5); op = extract32(insn, 14, 2); rn = extract32(insn, 5, 5); opc = extract32(insn, 3, 2); op2r = extract32(insn, 0, 3); - if (mos || op || op2r || type > 1) { + if (mos || op || op2r) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + size = MO_32; + break; + case 1: + size = MO_64; + break; + case 3: + size = MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4550,7 +4585,7 @@ static void disas_fp_compare(DisasContext *s, uint32_t insn) return; } - handle_fp_compare(s, type, rn, rm, opc & 1, opc & 2); + handle_fp_compare(s, size, rn, rm, opc & 1, opc & 2); } /* Floating point conditional compare @@ -4564,16 +4599,35 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn) unsigned int mos, type, rm, cond, rn, op, nzcv; TCGv_i64 tcg_flags; TCGLabel *label_continue = NULL; + int size; mos = extract32(insn, 29, 3); - type = extract32(insn, 22, 2); /* 0 = single, 1 = double */ + type = extract32(insn, 22, 2); rm = extract32(insn, 16, 5); cond = extract32(insn, 12, 4); rn = extract32(insn, 5, 5); op = extract32(insn, 4, 1); nzcv = extract32(insn, 0, 4); - if (mos || type > 1) { + if (mos) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + size = MO_32; + break; + case 1: + size = MO_64; + break; + case 3: + size = MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4594,7 +4648,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn) gen_set_label(label_match); } - handle_fp_compare(s, type, rn, rm, false, op); + handle_fp_compare(s, size, rn, rm, false, op); if (cond < 0x0e) { gen_set_label(label_continue); From patchwork Wed May 2 22:15:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134871 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1207156lji; Wed, 2 May 2018 15:25:18 -0700 (PDT) X-Google-Smtp-Source: AB8JxZo2J4cYFmHJFWEuZWmIq/O4nKN8LWx+OjnOvRk9RAu/gN+aPnWf2lQ+FwaakUr58tvXjex7 X-Received: by 10.55.188.193 with SMTP id m184mr15507970qkf.92.1525299918835; Wed, 02 May 2018 15:25:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525299918; cv=none; d=google.com; s=arc-20160816; b=dViO5QCB6yLstNm5ekQwmV3V7AlnzgXVfezPI5dcp33I8HHhr7fk9UgC1s+GZWod23 sYabgTJhROmeK945nLtJj3doCO7anjuC3x3rv+s5mJbJrJSewuhw88oZCBWeP13ypdFt JgrsVOmKOmEQgKFsxTTcZT5k0A4y/CHbErMaqAdPg9bM6W+ThMtOKC11zWuCRwjCp74Y T+OaDEEBFVI+ebVsnbCaiUOAFn+4IpOTR1nJ46G8KhFctsklB4ELhdWsAcxPeeb8e6xU 1ya+YkJ/kufwNNww4DFCRUdmwNBGj9GMapbWG0z7zXex5DSXTKgq2qDPokUKuLcAbqdD Cg9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=Qjy5KDciNnwaKwZSWdv3Ve9BMVD2CqGha4QSuIzajro=; b=rgiQTNlO1Y+SDAu5J+P85qZZTyu6ucURJ42znYc+RU4Dzdogy0wreU9CeYHbeBu88q hDMNB9r90uW8HucPaSjRLFVOpEAK+UwOEDi+BqeiPfmOXOhEQdAt+6T06gWjV1UMu91u 2aOhbeJ1D3XkvRMnfMDDTju/++JJabczDKRLxLBBiscB5ppiwq9GqRrbZn9lMvDr1Eu4 pZ9UUIYdQMLTfyurcMekwYIDfiIlS82JOOK/BlgyM853O06iQsUlRYyhUmvNXH2LBlrX xXD7XJLqSZoQ6Ok8Oqa7HfaOmuf8Ia0B00DE6eiiKOylJxqgvZRquwCFtBLS0j6cUH3r i64g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Foz0SZTs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id g9-v6si312881qtm.400.2018.05.02.15.25.18 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:25:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Foz0SZTs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52845 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0Ba-00084M-By for patch@linaro.org; Wed, 02 May 2018 18:25:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58993) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02n-0000ov-8X for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02l-00082D-T8 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:13 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:40974) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02l-000812-M7 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:11 -0400 Received: by mail-pg0-x244.google.com with SMTP id m21-v6so11628372pgv.8 for ; Wed, 02 May 2018 15:16:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Qjy5KDciNnwaKwZSWdv3Ve9BMVD2CqGha4QSuIzajro=; b=Foz0SZTsRtXezzTitqGfd9EvbKbbstdiZ/GqNJAnnM3NTm/IYL0dETN5Hm0AAb+0Wt HgUooCugVqokRG0/YveMbEQhmiPANlSUXPeP7YbI+0LHKuZTvb9rUTTzq7kkagnFIi7l dNDe9Seqm2p9UPwJ7n6jaTOXcmxAvMYbCsCBM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Qjy5KDciNnwaKwZSWdv3Ve9BMVD2CqGha4QSuIzajro=; b=BuylXYnxEHWcvovNiES41uHnoq5y514gLi219LCq3NDOXwTkiW7zFKnryer5yGjn+d oYlvljf9el8gACwJ/fV+kZI009egXswRBvg2rsIDlZ1YjxXYX/LdBVqoxOWG7cx0pmnk fFbARAtfczH9n89lWnjrYGlsPil3+jPT+DPg+Ks+ePCDM+2V0qQvJYva6ep6pXPcrxah 5iaE6jRIGbMTIZ3bEG9odnwQynsMSY21dp6qWYjdp89bXEWHccvfI2UiohEs9pPkH9Ci G1i7d9IRM5wdWnFo+w6Igc5hOrUxiivYyDN7t+rbfdYJR501JlM5TcEsnSbYawPPlDoC UOlA== X-Gm-Message-State: ALQs6tC94Ms0Y33m8UrMly8kQ4/bSM308Ar5/z5RP/jnSzRou9m19jT6 eL79o5owUPVzKG+xN8ndPrcKLH1Q2Ok= X-Received: by 2002:a65:4e03:: with SMTP id r3-v6mr17674540pgt.121.1525299370415; Wed, 02 May 2018 15:16:10 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:50 -0700 Message-Id: <20180502221552.3873-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v2 12/14] target/arm: Implement FCSEL for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alex Bennée These were missed out from the rest of the half-precision work. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Bennée [rth: Fix erroneous check vs type] Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) -- 2.14.3 Reviewed-by: Peter Maydell diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index f0aca20771..1ea5185f14 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4666,15 +4666,34 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn) unsigned int mos, type, rm, cond, rn, rd; TCGv_i64 t_true, t_false, t_zero; DisasCompare64 c; + TCGMemOp sz; mos = extract32(insn, 29, 3); - type = extract32(insn, 22, 2); /* 0 = single, 1 = double */ + type = extract32(insn, 22, 2); rm = extract32(insn, 16, 5); cond = extract32(insn, 12, 4); rn = extract32(insn, 5, 5); rd = extract32(insn, 0, 5); - if (mos || type > 1) { + if (mos) { + unallocated_encoding(s); + return; + } + + switch(type) { + case 0: + sz = MO_32; + break; + case 1: + sz = MO_64; + break; + case 3: + sz = MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4683,11 +4702,11 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn) return; } - /* Zero extend sreg inputs to 64 bits now. */ + /* Zero extend sreg & hreg inputs to 64 bits now. */ t_true = tcg_temp_new_i64(); t_false = tcg_temp_new_i64(); - read_vec_element(s, t_true, rn, 0, type ? MO_64 : MO_32); - read_vec_element(s, t_false, rm, 0, type ? MO_64 : MO_32); + read_vec_element(s, t_true, rn, 0, sz); + read_vec_element(s, t_false, rm, 0, sz); a64_test_cc(&c, cond); t_zero = tcg_const_i64(0); @@ -4696,7 +4715,7 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn) tcg_temp_free_i64(t_false); a64_free_cc(&c); - /* Note that sregs write back zeros to the high bits, + /* Note that sregs & hregs write back zeros to the high bits, and we've already done the zero-extension. */ write_fp_dreg(s, rd, t_true); tcg_temp_free_i64(t_true); From patchwork Wed May 2 22:15:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134876 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1211914lji; Wed, 2 May 2018 15:31:41 -0700 (PDT) X-Google-Smtp-Source: AB8JxZq+K1aMyU06taX8E1wksiiI0zCM6TuKYX43gSwPZdeXmFx2EJRTXvw/5CG1AjMwn4aYnh8F X-Received: by 10.55.133.1 with SMTP id h1mr16925122qkd.209.1525300301785; Wed, 02 May 2018 15:31:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525300301; cv=none; d=google.com; s=arc-20160816; b=We93osRvFF9RK7gZLeRNzvWKGp+WOZfkm2SbsFoJVFgm9TpMyOU2ISZz/tt4NNeNHy H+S4k7ltM6a/vjEmy5eD9e8q12GTarexZV7whZnCAOgCLwqsamKZ8uWunNvV8bqtYEus x0+dQGadffUZuDcyALigeN5E7yobNHbFFM9w7jR7TZWkwzTePN+BLlRhNszZiRrVIZDF nwob2gL1ePa0KhT0Wx+4xXEe5P1GPkjS1sjKMKWxMY9wgCV4MstPYF6hQ+TyoKX8wVI3 Qgmpu9sUKl5kWWBvfNNHuD1w7e7TyVGKnd321SZisq/WKKdGXuPAVj7IAkhhIXhI+PsJ 6NLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=/7J+dDkSM4Xa1wJSgJjRgLbXvJcp4wTSzR2jMj2N0bo=; b=WlAOyWnwmySO8kA9vuGN7NIMDP74lgALc6melRD7L8abBFi24d5fYarDsYhq6mDEDI siuHun9yWKWZxGmydCloAefTm2xa2g3r5gfKcJynmcRz94jBd7H4mcV4eraH8X2yWZ1q KQRqZgvXhiXM42zWNh01mk5QUgZMttkZitRIgnscZ3orH0dWVuNo+fEMii5v+IFDcTDC IUYVKI8agXXQHv4ytHuTnMKjlIIHHCurz427ssrm1iHMDa8kSZA75rksfOrJozkbxEwi 36KQHJBL+lqZlgEZQJ8sUr+XcE+US1BbgCMIUAhUpAgcHUPxNhgphx88Xl1JlrNHKK5A CRTg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jglgpfj8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 32-v6si6831835qvr.24.2018.05.02.15.31.41 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:31:41 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jglgpfj8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52888 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0Hl-0005Ap-8w for patch@linaro.org; Wed, 02 May 2018 18:31:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59034) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02o-0000oz-B6 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02n-00084H-2M for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:14 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:45787) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02m-00082v-UE for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:13 -0400 Received: by mail-pg0-x244.google.com with SMTP id i29-v6so11613134pgn.12 for ; Wed, 02 May 2018 15:16:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/7J+dDkSM4Xa1wJSgJjRgLbXvJcp4wTSzR2jMj2N0bo=; b=jglgpfj8DC/RkpFTtU7vE3OR4pf+ON78LNY9WZmzws6i+pUNZALYLywCxLS3sTjmoa 14Wjq8YEYC4LDPMAZlRV5qj4URehqV40eCTQRSP+sns2ckeiAtV28pdbMMuHCIWHxL6L 01rU+3bLJcIHOYryAvX3JHFkFAf/2ZI+yZIEg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/7J+dDkSM4Xa1wJSgJjRgLbXvJcp4wTSzR2jMj2N0bo=; b=t5brm1AZTtXAdeTEcYmFs3BYftkPhtga2vadiRHkQ1aKczxTOhmduYMtivxRwzMh8O fHwJyl4UfzELOjHtWgAnjwJ8sw5vdWP4rpypkFm/lekpjbjzrLRzWk6inv403ShEXpZm wJSlKC427x90oRfiPyHoQNGaYd6G+A+75oP7ptPwaZIam9ezJeYBKITSe4+8UM0c0aDE 77PD11i2YtzVyKG5VOibfUlsxAErUUuVE6L2aMdy5UTmFBr/Rsl4BstO1eNIMqPTAedq RDe09Jmzo4w1WjaQOGoWPTT5e+BnrpAaKjULzhbjUWZITfcKfZRBY05fC0/1HL20tUCV jHcA== X-Gm-Message-State: ALQs6tAin+fula/RkmnhdBcoZi7GN2PsrIJYpNfv59TZTP13tjgJy0OG 8bw6mVr0m8MxZLsQK99wcgM4WXU34x0= X-Received: by 2002:a17:902:76c1:: with SMTP id j1-v6mr21452037plt.284.1525299371717; Wed, 02 May 2018 15:16:11 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:51 -0700 Message-Id: <20180502221552.3873-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v2 13/14] target/arm: Implement FMOV (immediate) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alex Bennée All the hard work is already done by vfp_expand_imm, we just need to make sure we pick up the correct size. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Bennée [rth: Merge unallocated_encoding check with TCGMemOp conversion.] Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) -- 2.14.3 Reviewed-by: Peter Maydell diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1ea5185f14..b73d6d96cd 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5437,11 +5437,25 @@ static void disas_fp_imm(DisasContext *s, uint32_t insn) { int rd = extract32(insn, 0, 5); int imm8 = extract32(insn, 13, 8); - int is_double = extract32(insn, 22, 2); + int type = extract32(insn, 22, 2); uint64_t imm; TCGv_i64 tcg_res; + TCGMemOp sz; - if (is_double > 1) { + switch (type) { + case 0: + sz = MO_32; + break; + case 1: + sz = MO_64; + break; + case 3: + sz = MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -5450,7 +5464,7 @@ static void disas_fp_imm(DisasContext *s, uint32_t insn) return; } - imm = vfp_expand_imm(MO_32 + is_double, imm8); + imm = vfp_expand_imm(sz, imm8); tcg_res = tcg_const_i64(imm); write_fp_dreg(s, rd, tcg_res); From patchwork Wed May 2 22:15:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 134874 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp1209062lji; Wed, 2 May 2018 15:27:57 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpP6Gh+A5KtlObHtdR8VKFNqAKO0+/VssZBsDPlBlTVVEQmE7BjD68rezpzQX2w7yBbkmYn X-Received: by 10.55.140.3 with SMTP id o3mr15273619qkd.68.1525300077290; Wed, 02 May 2018 15:27:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525300077; cv=none; d=google.com; s=arc-20160816; b=WiX8BVTesRkVbS1yK+L/l5u72lsBfrYNl79dQRwVStJIUFhb4uigPTb+2C6xe7E1zv K/eJ9ZVYoGbo6IncTPz4m2Rj2dPnJ3PsfkahRSCm6Hx1LNX7wuedt1hQvGilTAXsgB7h APy0L8PdcspQOx0gN+0Lo7LQvlNyT4C4t8XYGmo1KR3pff7VrtZ/k6X75tn+cQAbUPD0 TZ/g3AyAhJ9dbxcetWoXDzgOipzUPRROqAIY6gEpV9bod1hLHHaZA+Z5+0qjyj7oKQ3j Ovrin3kqwg5OmiZFPw+cTkaY/HMZxWnKTn5b3yVjbjhno6BELzTDyTu/uK3WgzwYLbrh IgWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=Nwrrh4E41GtFRXCHQJcmc6i/oaMBOH59tfZ3rvdlzVw=; b=Ce6CzEoaTKH/qsYU3jSFrk+I0Tlkt87SD/g3ujQ+P4m8/fI29Lnf6R7Hq2Zn+1h/T2 /44/lH4ZtmG0lGEvrWKRxnJFiqXAqg2TVYzA57vygf14xFxBxMrUepCdCNAOobFR13KW 8hIGeH7QbAzPNcrHYKFpijmenso/cqHDHZ+HOqAJRVt8qRmnGzrMROABxs8D9QgzDTo2 o5U2KnWddfDw7VYUnyqkRwu1voEwKiRAh+diQME4R0I9RcQ5CDZ1LN4rCy7iXfFxn0aI ZTSDr+qoswv+SKZIehm7j8MvuQ9z+kI29SDbBuA1YGgvzIK5yJP+RXYo8WUVkXJrA7Pb SLtg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RVuLu1Sj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id t26-v6si545744qvt.135.2018.05.02.15.27.57 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 15:27:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RVuLu1Sj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52867 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0E8-0002ED-QG for patch@linaro.org; Wed, 02 May 2018 18:27:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59073) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02r-0000qd-9m for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02o-00086W-DQ for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:17 -0400 Received: from mail-pg0-x242.google.com ([2607:f8b0:400e:c05::242]:40799) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02o-00084t-42 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:14 -0400 Received: by mail-pg0-x242.google.com with SMTP id l2-v6so11621658pgc.7 for ; Wed, 02 May 2018 15:16:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Nwrrh4E41GtFRXCHQJcmc6i/oaMBOH59tfZ3rvdlzVw=; b=RVuLu1SjmHrN0GXNBM9ImbFwEhHFClUtAFWVIyzU1AdRuIiiYbNWZsyzoWYbAeMf+5 3Hf2qLiNBvd5j9vUzFUMh8yFl1rdiPLv7EY/YTrPw0TgXwhCrwibMfd5sflbZ+s2hVQj v+fHzN56gfQM9H9heLOaUnnSNFEvLwGHO87/8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Nwrrh4E41GtFRXCHQJcmc6i/oaMBOH59tfZ3rvdlzVw=; b=R7yG6a5cTOrAVspaGYg8rxVbU1O/2lo6Yt2aO4IKOwRQZalG2Pwlm9KAkBWWkKKPTd l2h0WyCurRlRKflwCYXvcQHSB9RzTrnvT1MVrXd5V88r1YEPfelFigqLqve8ZpradSwy 5aWnppJU25B40e3RjDsy7p/KqEUOWZjg2dgeRSLWal2x32dmdQwH7oaawuJYfwTuB9xo NbRnyykD2QrzUVrHZEMnz03SGI+hR/L7vr/tK3nI6XOuBOxOHhexKN/GRKyunlnCzWS4 AXKyimK/PJ0q+NWF+da8RLrCICNASAMC/jEfU8VrxRu0uTMRXSqw2EGD8IT4frL+/SvE tHOw== X-Gm-Message-State: ALQs6tAlBOwIuBR3UoU1YJn9co9dg7mhw5XeiIgvk7uq/9EnIWhOWz5D PXJmy43CqQffZu86DS6At7XrNz6NlWo= X-Received: by 2002:a63:6706:: with SMTP id b6-v6mr17373639pgc.214.1525299372927; Wed, 02 May 2018 15:16:12 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:52 -0700 Message-Id: <20180502221552.3873-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PATCH v2 14/14] target/arm: Fix sqrt_f16 exception raising X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alex Bennée We are meant to explicitly pass fpst, not cpu_env. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.14.3 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index b73d6d96cd..07e196c19c 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4739,7 +4739,8 @@ static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int rn) tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000); break; case 0x3: /* FSQRT */ - gen_helper_sqrt_f16(tcg_res, tcg_op, cpu_env); + fpst = get_fpstatus_ptr(true); + gen_helper_sqrt_f16(tcg_res, tcg_op, fpst); break; case 0x8: /* FRINTN */ case 0x9: /* FRINTP */