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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id f3sm176405ilk.74.2021.03.17.15.29.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Mar 2021 15:29:51 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/4] net: ipa: fix assumptions about DMA address size Date: Wed, 17 Mar 2021 17:29:43 -0500 Message-Id: <20210317222946.118125-2-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210317222946.118125-1-elder@linaro.org> References: <20210317222946.118125-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Some build time checks in ipa_table_validate_build() assume that a DMA address is 64 bits wide. That is more restrictive than it has to be. A route or filter table is 64 bits wide no matter what the size of a DMA address is on the AP. The code actually uses a pointer to __le64 to access table entries, and a fixed constant IPA_TABLE_ENTRY_SIZE to describe the size of those entries. Loosen up two checks so they still verify some requirements, but such that they do not assume the size of a DMA address is 64 bits. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_table.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_table.c b/drivers/net/ipa/ipa_table.c index 7450e27068f19..dd07fe9dd87a3 100644 --- a/drivers/net/ipa/ipa_table.c +++ b/drivers/net/ipa/ipa_table.c @@ -126,13 +126,15 @@ static void ipa_table_validate_build(void) */ BUILD_BUG_ON(ARCH_DMA_MINALIGN % IPA_TABLE_ALIGN); - /* Filter and route tables contain DMA addresses that refer to - * filter or route rules. We use a fixed constant to represent - * the size of either type of table entry. Code in ipa_table_init() - * uses a pointer to __le64 to initialize table entriews. + /* Filter and route tables contain DMA addresses that refer + * to filter or route rules. But the size of a table entry + * is 64 bits regardless of what the size of an AP DMA address + * is. A fixed constant defines the size of an entry, and + * code in ipa_table_init() uses a pointer to __le64 to + * initialize tables. */ - BUILD_BUG_ON(IPA_TABLE_ENTRY_SIZE != sizeof(dma_addr_t)); - BUILD_BUG_ON(sizeof(dma_addr_t) != sizeof(__le64)); + BUILD_BUG_ON(sizeof(dma_addr_t) > IPA_TABLE_ENTRY_SIZE); + BUILD_BUG_ON(sizeof(__le64) != IPA_TABLE_ENTRY_SIZE); /* A "zero rule" is used to represent no filtering or no routing. * It is a 64-bit block of zeroed memory. Code in ipa_table_init() From patchwork Wed Mar 17 22:29:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 403224 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp866834jai; Wed, 17 Mar 2021 15:30:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzp+YBsyYYinLNZdBabNVf6FpfoqP4QdDGHpK5lX83hjFT+N08ckGI43HyB2fJsAzIQoa66 X-Received: by 2002:a05:6402:2215:: with SMTP id cq21mr45816960edb.281.1616020249354; Wed, 17 Mar 2021 15:30:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616020249; cv=none; d=google.com; s=arc-20160816; b=0rW9nSTlKjB4ihAQvL81O0cz7IUMql1lEm+ERHT3DbvPg8gk5kKIBVhM2jw5Z8VCq3 VtCLdwZyz4IlAEXbuf+DLXFE2OdzYt0j0O4rMYSpQIwVxCMo0IIqnRkFtXA7tE86cHrW 4BH8HSED5rU+qahwYFSq89SJ7Myw5xH1ycMNnycHPI6Q30r8GSCb58rnILcDQPXH9DrE CaMSkIai6CP/94XIo/nF0nyHgocIj8JTXiknFwqRAIHxZ814hrKtq7pcYlCStrZKHPWy 5UAiXcyuqwxZKY1zWNKKRHllAIjf9CglFpw8rn0XQ4YiVoTZsKZgDDt2EKvBHiEf5HCx QBaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bzduqesNyjPNy/1mWpQa5IsmwasAg4tlgXssFjc1C9k=; b=TUZXQzOOotFayKrf+/77kFZN/A6giM5F0biwZzArwBq3v87dst69+SD4HchfQnMAlu gyQBjAYpxud4m3t1EVopBIiaFHFn01SjZqv8Q6iLN7uDh58AkKWPCCm9ChCB4WzSeKkQ M9Txc0j+Wau7YTwWqhybVM3EPmrTRr5IyOYLk5yjgSkQMoCc5wvjWmTbxu7Tyg8HuwdX mqJb3j0gyY0ZsBY8rucYrJi4B3XSpSTtgLfCGhiaTbc6jNkXOMH4lZyMIWu2G5G9a5A1 uelX6cy/6wLBlfeB5u4/voR9zpMaId1i5PbY9jPzKmKpZnIfZIIPqHz2G2ssNf9+6py0 aJLg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=s9EKsfQ+; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id f3sm176405ilk.74.2021.03.17.15.29.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Mar 2021 15:29:52 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/4] net: ipa: introduce dma_addr_high32() Date: Wed, 17 Mar 2021 17:29:44 -0500 Message-Id: <20210317222946.118125-3-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210317222946.118125-1-elder@linaro.org> References: <20210317222946.118125-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Create a new helper function to encapsulate extracting the high-order 32 bits of a DMA address. It returns 0 for builds in which a DMA address is not 64 bits. This avoids doing a 32-position shift on a DMA address if it happens not to be 64 bits wide. Signed-off-by: Alex Elder --- drivers/net/ipa/gsi.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index 2119367b93ea9..53698c64cf882 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -688,6 +688,16 @@ static void gsi_evt_ring_doorbell(struct gsi *gsi, u32 evt_ring_id, u32 index) iowrite32(val, gsi->virt + GSI_EV_CH_E_DOORBELL_0_OFFSET(evt_ring_id)); } +/* Encapsulate extracting high-order 32 bits of DMA address */ +static u32 dma_addr_high32(dma_addr_t addr) +{ +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT + return (u32)(addr >> 32); +#else /* !CONFIG_ARCH_DMA_ADDR_T_64BIT */ + return 0; +#endif /* !CONFIG_ARCH_DMA_ADDR_T_64BIT */ +} + /* Program an event ring for use */ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id) { @@ -711,7 +721,7 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id) val = evt_ring->ring.addr & GENMASK(31, 0); iowrite32(val, gsi->virt + GSI_EV_CH_E_CNTXT_2_OFFSET(evt_ring_id)); - val = evt_ring->ring.addr >> 32; + val = dma_addr_high32(evt_ring->ring.addr); iowrite32(val, gsi->virt + GSI_EV_CH_E_CNTXT_3_OFFSET(evt_ring_id)); /* Enable interrupt moderation by setting the moderation delay */ @@ -819,7 +829,7 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell) val = channel->tre_ring.addr & GENMASK(31, 0); iowrite32(val, gsi->virt + GSI_CH_C_CNTXT_2_OFFSET(channel_id)); - val = channel->tre_ring.addr >> 32; + val = dma_addr_high32(channel->tre_ring.addr); iowrite32(val, gsi->virt + GSI_CH_C_CNTXT_3_OFFSET(channel_id)); /* Command channel gets low weighted round-robin priority */ From patchwork Wed Mar 17 22:29:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 403223 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp866808jai; Wed, 17 Mar 2021 15:30:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzntU350m4D1Z94BEVuG76RWujqan2VjpsjvSF3gE5yYiuCxec1W0d7Ssy6hMJzCPf5t4MG X-Received: by 2002:a05:6402:3089:: with SMTP id de9mr45350447edb.10.1616020247760; Wed, 17 Mar 2021 15:30:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616020247; cv=none; d=google.com; s=arc-20160816; b=Y8xCEllLCEBAsIVc0m9jN2LF85DReoQDaumZNGLdwtmuxWPA91e/Ol31MKuqc8L5UB qS/FUwJ5aSdk//1LE3/+0S423icIBuWkEfRgBtc6yq71XKrjZboMVKqOOIh+JTgvdNDf pkEtf7oBG+AjqxvD3mW/91wmiMhOkI8lMhBdCx0wGBvywDTtHHrEzCY8UI5/xWgW4M4/ l0wKRKEMFssybZ8ACo1pXdsa84bGlWyzyo1yAO+S5SwXSMD0Mq48i5viNG8kWKgCK81F Qig7XBHFg+sZ2Sa59lkgkMlsqmi+oGbKQ2OvXhcn9WM+CDcjZkBohGzw25j45QRrg+JN uJEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mJHY8qu/zb8ROas4WV0ki8PTfXxIvdJCtkC7EQYxU/c=; b=i/AMG9zBtVZMI19YSkHzqK1ibCPFqE8nvT1J3XNcZohPjY0FrkMxHmyvdVgM/g8YVK U6D98zeJ/uEYcHwpwddtHT+wHHe2K2BMNEB5pEgNCXdY7paP02zSGd/q4UVTMcT67wlj BM1Z8LmjDFJg+cnPQcG8BhihnKZV9TKI3QICJOZAw06+ymMQCYZfBM31+WIxmvR8Nr+d KXnIgcyyTVBM+kaiEWA6S6Frnj2rMP6Eq/3FUQ1cJ5ocXgeZ5BX9n/976O3Vq9soDjU4 H1sQqAbl5UH4X0oDGldeRnK7jlOy64KKB0fy6sjG1BVm9HrUqfPW6sEJi4TM4Dx7ZB/B 1P8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uXrdEig5; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id f3sm176405ilk.74.2021.03.17.15.29.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Mar 2021 15:29:52 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 3/4] net: ipa: fix table alignment requirement Date: Wed, 17 Mar 2021 17:29:45 -0500 Message-Id: <20210317222946.118125-4-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210317222946.118125-1-elder@linaro.org> References: <20210317222946.118125-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org We currently have a build-time check to ensure that the minimum DMA allocation alignment satisfies the constraint that IPA filter and route tables must point to rules that are 128-byte aligned. But what's really important is that the actual allocated DMA memory has that alignment, even if the minimum is smaller than that. Remove the BUILD_BUG_ON() call checking against minimim DMA alignment and instead verify at rutime that the allocated memory is properly aligned. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_table.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_table.c b/drivers/net/ipa/ipa_table.c index dd07fe9dd87a3..988f2c2886b95 100644 --- a/drivers/net/ipa/ipa_table.c +++ b/drivers/net/ipa/ipa_table.c @@ -118,14 +118,6 @@ /* Check things that can be validated at build time. */ static void ipa_table_validate_build(void) { - /* IPA hardware accesses memory 128 bytes at a time. Addresses - * referred to by entries in filter and route tables must be - * aligned on 128-byte byte boundaries. The only rule address - * ever use is the "zero rule", and it's aligned at the base - * of a coherent DMA allocation. - */ - BUILD_BUG_ON(ARCH_DMA_MINALIGN % IPA_TABLE_ALIGN); - /* Filter and route tables contain DMA addresses that refer * to filter or route rules. But the size of a table entry * is 64 bits regardless of what the size of an AP DMA address @@ -665,6 +657,18 @@ int ipa_table_init(struct ipa *ipa) if (!virt) return -ENOMEM; + /* We put the "zero rule" at the base of our table area. The IPA + * hardware requires rules to be aligned on a 128-byte boundary. + * Make sure the allocation satisfies this constraint. + */ + if (addr % IPA_TABLE_ALIGN) { + dev_err(dev, "table address %pad not %u-byte aligned\n", + &addr, IPA_TABLE_ALIGN); + dma_free_coherent(dev, size, virt, addr); + + return -ERANGE; + } + ipa->table_virt = virt; ipa->table_addr = addr; From patchwork Wed Mar 17 22:29:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 403225 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp866839jai; Wed, 17 Mar 2021 15:30:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzEiN3Zbe+6+CliED6dWvCs5cYhTrNWURpcmKRQukxXPSIM+m0tAdDTWflMUMPSUlUVUpr3 X-Received: by 2002:a05:6402:354d:: with SMTP id f13mr45112545edd.228.1616020249775; Wed, 17 Mar 2021 15:30:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616020249; cv=none; d=google.com; s=arc-20160816; b=gCIhwco3aUbkm5FbsCP4r0AWdxAYg1y1Mz2pyNXrQvQTxeoQpVeVNOFh1lp91VbCnG tPt+b2rmhqqSC0Trqaa3xZwhLlu0ehH9UvKlYf3ytVG4pBsYRuzPs3vTfKXxYCpT5KFN FdL1nkIFxk/UwgnzphdxbOqPlVg6xxxvBK9dwDBU5Tupbqc+VBDGLLIie4be1fk0BmkA nTPLB7PQp4gA9ya6aAP0k2lzHHv3ABY/a6w6S0LS1EG08yJaUWXw+HlzdkkFxA5op9IX 8bRkXz/nD5bWGRY54pMFgbkTkBbJYvoLK35e4pzYPdm/Qzhxc3seojhXWGka//zR5CIv vLKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=N1vkQNGymFwLks9UB15v9pfiGh7bDRvcY3otglQibLg=; b=wAvyyecLWKBWLYwvH9nSAeWbIFZpkpWAZZKmYYvtmMDorsrPTHcHp8QWQghmS4JyRH Own7Yu34v5Cvf8HCM0rlIZgWA5uMip43To7FmzyCG3cEF9P3YbBVimgUqskJC1n9b3ar NMCSCsx3Ns3HZPe4vRnbxJrBYQIjHnbXWSPZHCSz/P0344HyxNiOlt3FepOJyyqMEk5G BnrLePjLkq56DDZZ9YP11XR4Xbj4ckT3+rLEYrVNnoUFvyTYT4h8RGRDuUYnHInSE7JN V9+Iz5cDI912xth/R8VKp+FQptFDRqdBoWf3Oi3yopm9eDJGelFCmQ5oSF8GAooMN0LH AL+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vpbFLeMR; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id f3sm176405ilk.74.2021.03.17.15.29.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Mar 2021 15:29:53 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 4/4] net: ipa: relax 64-bit build requirement Date: Wed, 17 Mar 2021 17:29:46 -0500 Message-Id: <20210317222946.118125-5-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210317222946.118125-1-elder@linaro.org> References: <20210317222946.118125-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org We currently assume the IPA driver is built only for a 64 bit kernel. When this constraint was put in place it eliminated some do_div() calls, replacing them with the "/" and "%" operators. We now only use these operations on u32 and size_t objects. In a 32-bit kernel build, size_t will be 32 bits wide, so there remains no reason to use do_div() for divide and modulo. A few recent commits also fix some code that assumes that DMA addresses are 64 bits wide. With that, we can get rid of the 64-bit build requirement. Signed-off-by: Alex Elder --- drivers/net/ipa/Kconfig | 2 +- drivers/net/ipa/ipa_main.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 3 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/Kconfig b/drivers/net/ipa/Kconfig index b68f1289b89ef..90a90262e0d07 100644 --- a/drivers/net/ipa/Kconfig +++ b/drivers/net/ipa/Kconfig @@ -1,6 +1,6 @@ config QCOM_IPA tristate "Qualcomm IPA support" - depends on 64BIT && NET && QCOM_SMEM + depends on NET && QCOM_SMEM depends on ARCH_QCOM || COMPILE_TEST depends on QCOM_RPROC_COMMON || (QCOM_RPROC_COMMON=n && COMPILE_TEST) select QCOM_MDT_LOADER if ARCH_QCOM diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c index 97c1b55405cbf..d354e3e65ec50 100644 --- a/drivers/net/ipa/ipa_main.c +++ b/drivers/net/ipa/ipa_main.c @@ -735,8 +735,14 @@ MODULE_DEVICE_TABLE(of, ipa_match); static void ipa_validate_build(void) { #ifdef IPA_VALIDATE - /* We assume we're working on 64-bit hardware */ - BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT)); + /* At one time we assumed a 64-bit build, allowing some do_div() + * calls to be replaced by simple division or modulo operations. + * We currently only perform divide and modulo operations on u32, + * u16, or size_t objects, and of those only size_t has any chance + * of being a 64-bit value. (It should be guaranteed 32 bits wide + * on a 32-bit build, but there is no harm in verifying that.) + */ + BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4); /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */ BUILD_BUG_ON(GSI_EE_AP != 0);