From patchwork Wed Mar 17 05:29:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 403270 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2956BC433E6 for ; Wed, 17 Mar 2021 05:31:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D4FB264FA7 for ; Wed, 17 Mar 2021 05:31:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229847AbhCQFbZ (ORCPT ); Wed, 17 Mar 2021 01:31:25 -0400 Received: from m42-10.mailgun.net ([69.72.42.10]:13930 "EHLO m42-10.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229707AbhCQFbG (ORCPT ); Wed, 17 Mar 2021 01:31:06 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1615959066; h=Message-Id: Date: Subject: Cc: To: From: Sender; bh=U2gYr/w0zECr4jw+Y1nBV1YmV1pORFMxEPhN3UG0IIE=; b=EQWIUQHpI8Mk//I+KHLwBY2/ckPXPaKq4K52FayghDbTyZi/FkZ7nR6kHO6xXuJ4SOOhvtDE TwlIbpvPo/o+WbHfNGucOO0aovVvVPkNN0lA23yflyrlj4Zm9okIxh/388fXkZpcqpDozA7+ 4FQ01MfYEBshHHc5UjsrSrWjuUU= X-Mailgun-Sending-Ip: 69.72.42.10 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-east-1.postgun.com with SMTP id 605194176dc1045b7d00c86c (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 17 Mar 2021 05:31:03 GMT Sender: mkshah=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 1118FC433ED; Wed, 17 Mar 2021 05:31:03 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5275CC433CA; Wed, 17 Mar 2021 05:30:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5275CC433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, bjorn.andersson@linaro.org, maz@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, dianders@chromium.org, rnayak@codeaurora.org, lsrao@codeaurora.org, Maulik Shah , devicetree@vger.kernel.org Subject: [PATCH 1/3] arm64: dts: qcom: sm8350: Remove second reg from pdc Date: Wed, 17 Mar 2021 10:59:54 +0530 Message-Id: <1615958996-31807-1-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PDC interrupt controller driver do not use second reg. Remove it. This is in preparation to convert PDC bindings to yaml where dtbs_check reports it as additional reg. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index ea28514..b48bc1b 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -612,7 +612,7 @@ pdc: interrupt-controller@b220000 { compatible = "qcom,sm8350-pdc", "qcom,pdc"; - reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; + reg = <0 0x0b220000 0 0x30000>; qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>, <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>, <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>, From patchwork Wed Mar 17 05:29:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 403269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA0A6C433E6 for ; Wed, 17 Mar 2021 05:32:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9C28A64FA7 for ; Wed, 17 Mar 2021 05:31:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229707AbhCQFbZ (ORCPT ); Wed, 17 Mar 2021 01:31:25 -0400 Received: from a0.mail.mailgun.net ([198.61.254.59]:28247 "EHLO a0.mail.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229712AbhCQFbH (ORCPT ); Wed, 17 Mar 2021 01:31:07 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1615959066; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=F2caSIHdTTOXnoF3H3ccF5cVryoLETqVf81ZEzKXRjQ=; b=adQhLeEOg7PBSyyjXbyD+U7k0xyG+YA/7HxmyoY3m7s3/2B5saqYIkY+C/1yVdcwsSZ4b2Ou Q3V+R49OIz2skeJ6TcSXgBeSq5b8E8RLRms0jitcl/0ZDVXppvDP3MnVfaEZfG8DAPMbNUwr wxmsH8f6hVd0Ditd8R5YQJ7Ee3Y= X-Mailgun-Sending-Ip: 198.61.254.59 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-east-1.postgun.com with SMTP id 6051941a4db3bb680179efda (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 17 Mar 2021 05:31:06 GMT Sender: mkshah=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 7B4E8C433C6; Wed, 17 Mar 2021 05:31:05 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 1DF71C43463; Wed, 17 Mar 2021 05:31:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1DF71C43463 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: swboyd@chromium.org, bjorn.andersson@linaro.org, maz@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, dianders@chromium.org, rnayak@codeaurora.org, lsrao@codeaurora.org, Maulik Shah , devicetree@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: qcom: sm8250: Remove second reg from pdc Date: Wed, 17 Mar 2021 10:59:55 +0530 Message-Id: <1615958996-31807-2-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1615958996-31807-1-git-send-email-mkshah@codeaurora.org> References: <1615958996-31807-1-git-send-email-mkshah@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PDC interrupt controller driver do not use second reg. Remove it. This is in preparation to convert PDC bindings to yaml where dtbs_check reports it as additional reg. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index bbb6e28..8090b8e 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2617,7 +2617,7 @@ pdc: interrupt-controller@b220000 { compatible = "qcom,sm8250-pdc", "qcom,pdc"; - reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; + reg = <0 0x0b220000 0 0x30000>; qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>, <126 716 12>; #interrupt-cells = <2>;