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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id j20sm1139377ilo.78.2021.03.18.06.51.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Mar 2021 06:51:45 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: f.fainelli@gmail.com, bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 1/4] net: ipa: fix assumptions about DMA address size Date: Thu, 18 Mar 2021 08:51:38 -0500 Message-Id: <20210318135141.583977-2-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210318135141.583977-1-elder@linaro.org> References: <20210318135141.583977-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Some build time checks in ipa_table_validate_build() assume that a DMA address is 64 bits wide. That is more restrictive than it has to be. A route or filter table is 64 bits wide no matter what the size of a DMA address is on the AP. The code actually uses a pointer to __le64 to access table entries, and a fixed constant IPA_TABLE_ENTRY_SIZE to describe the size of those entries. Loosen up two checks so they still verify some requirements, but such that they do not assume the size of a DMA address is 64 bits. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_table.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_table.c b/drivers/net/ipa/ipa_table.c index 7450e27068f19..dd07fe9dd87a3 100644 --- a/drivers/net/ipa/ipa_table.c +++ b/drivers/net/ipa/ipa_table.c @@ -126,13 +126,15 @@ static void ipa_table_validate_build(void) */ BUILD_BUG_ON(ARCH_DMA_MINALIGN % IPA_TABLE_ALIGN); - /* Filter and route tables contain DMA addresses that refer to - * filter or route rules. We use a fixed constant to represent - * the size of either type of table entry. Code in ipa_table_init() - * uses a pointer to __le64 to initialize table entriews. + /* Filter and route tables contain DMA addresses that refer + * to filter or route rules. But the size of a table entry + * is 64 bits regardless of what the size of an AP DMA address + * is. A fixed constant defines the size of an entry, and + * code in ipa_table_init() uses a pointer to __le64 to + * initialize tables. */ - BUILD_BUG_ON(IPA_TABLE_ENTRY_SIZE != sizeof(dma_addr_t)); - BUILD_BUG_ON(sizeof(dma_addr_t) != sizeof(__le64)); + BUILD_BUG_ON(sizeof(dma_addr_t) > IPA_TABLE_ENTRY_SIZE); + BUILD_BUG_ON(sizeof(__le64) != IPA_TABLE_ENTRY_SIZE); /* A "zero rule" is used to represent no filtering or no routing. * It is a 64-bit block of zeroed memory. Code in ipa_table_init() From patchwork Thu Mar 18 13:51:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 404034 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp498038jai; Thu, 18 Mar 2021 06:52:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx/b9n8c4ROKLV28quTEJ/Qaoa1qPPyVhxQVn8dG7pwXXiGWjwoPPDETr4BuaALpOOEgwmB X-Received: by 2002:aa7:c889:: with SMTP id p9mr3737332eds.82.1616075565106; Thu, 18 Mar 2021 06:52:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616075565; cv=none; d=google.com; s=arc-20160816; b=a+6KgvDYXi1alloQAbSJ7zrh8wgyT2RpbPe75NrZPzY+uEuONo6DRvdF2Wb1drOSJj oDodBU0NfCLrdcW+yLc07Rc5c+1BOTKNCEvJhIzt41Xo+FmSdEzaqjx6+QMMK3uz4LnU k5KaBKUoQWyZSvdzqFzPqTwfxkonc1/NuJjGpL1VMkZCWljIshgoiVFBWTVMUEXGaUCq ZW7olQxHlcFZborPF23DkntIwZnDuFNzoEBubckPS3d/tbZ+fUssns+sn6AwvKnApdD6 haUzFVZJ6lz/ZBM8i+VeVRRbSKa7uhgRtqMU0Ff6JwVh9D9do+0YvFZevJPjtC2eyLQd 1EOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tgS5ltmiWGNMsspoO1AnEwMssicL8HewQ7d9cJWh3nA=; b=b6exmi+BwYHm/fygNJjV8wKFXsyHCvhUiUPgJQQEBAN4DGQ3rfp3dVjemxWbIogOYf RaaG2rYNMJZ3jojhJTLSc43gbRcyDP89LQ0MiZ6FtmEehYYbkASI1czBnWcZ2N+2+HEe VQN0snWjbcthTofh5nH0KdkaxIhbBmwL3EsSfZ0eM1lCMNcJKY45m0vTz1lo3+Zn52FR mWVQLJGMtWCnvPH1sljbcnMSceQmpX90CsPJmKB2RoLhI9iAeVIKMQdk3Tu1KUk0Gq93 RtDWQLm4a31TNGUvs94yUkmtwn6ibQPUxyQy5IJD/fSiedObG5aZjRCARPHjJEwo3iI3 duIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RegqCtE9; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id j20sm1139377ilo.78.2021.03.18.06.51.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Mar 2021 06:51:46 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: f.fainelli@gmail.com, bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 2/4] net: ipa: use upper_32_bits() Date: Thu, 18 Mar 2021 08:51:39 -0500 Message-Id: <20210318135141.583977-3-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210318135141.583977-1-elder@linaro.org> References: <20210318135141.583977-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Use upper_32_bits() to extract the high-order 32 bits of a DMA address. This avoids doing a 32-position shift on a DMA address if it happens not to be 64 bits wide. Suggested-by: Florian Fainelli Signed-off-by: Alex Elder --- v2: - Switched to use the existing function, as suggested by Florian. drivers/net/ipa/gsi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index 2119367b93ea9..82c5a0d431ee5 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -711,7 +711,7 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id) val = evt_ring->ring.addr & GENMASK(31, 0); iowrite32(val, gsi->virt + GSI_EV_CH_E_CNTXT_2_OFFSET(evt_ring_id)); - val = evt_ring->ring.addr >> 32; + val = upper_32_bits(evt_ring->ring.addr); iowrite32(val, gsi->virt + GSI_EV_CH_E_CNTXT_3_OFFSET(evt_ring_id)); /* Enable interrupt moderation by setting the moderation delay */ @@ -819,7 +819,7 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell) val = channel->tre_ring.addr & GENMASK(31, 0); iowrite32(val, gsi->virt + GSI_CH_C_CNTXT_2_OFFSET(channel_id)); - val = channel->tre_ring.addr >> 32; + val = upper_32_bits(channel->tre_ring.addr); iowrite32(val, gsi->virt + GSI_CH_C_CNTXT_3_OFFSET(channel_id)); /* Command channel gets low weighted round-robin priority */ From patchwork Thu Mar 18 13:51:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 404033 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp498025jai; Thu, 18 Mar 2021 06:52:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyd6INW3SFPugu9eUWMZko+hBuqaazplp/K9Lq/7Gunp2oAXo58a1Z7C+3r+Wbz81aju5NF X-Received: by 2002:aa7:c889:: with SMTP id p9mr3737214eds.82.1616075563491; Thu, 18 Mar 2021 06:52:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616075563; cv=none; d=google.com; s=arc-20160816; b=MlYRxrWpiHr4tuMM0aQYtXxBOt2u0kp5PX5IFebL3Sp6YTn0qXGyfJkiq0cufm6jj+ fBuyz8MrLfaUv+EiVZ17Cp5Z/HFzDORWOJYe3VSKb9MYVsNeBLbKD1ExQj2x2JZtbmf9 MWwhYT1baEQXNL28PdEcN3hcCKpWSHSQtR9V879n+jeHyJrBl2yi6rGV+RETTK5fGLgs sgZ7G++Nh1R302HqkjF+vGfBaUFX/QamVtg4AERmNJXwjcjIzXrKrXplYpsKWcQWw+dt LcVKyDlIoZETYTU4DEWqxBydV0f59YYgUNS8jMeq+bLO80V9/YgG7kF5VeGsF7G7ydBE 5TgQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mJHY8qu/zb8ROas4WV0ki8PTfXxIvdJCtkC7EQYxU/c=; b=g0/qYb55uYLIalHvxSLvEdk/0SESxuOlgwthOZWIoDqmWuMyMZzYzOZGciOWGyNDQF D9P2hTr+EwaCZM1T5iV6YVRkJ0Q9ZLBQX02UG1kDQtXVPSZP95Sy7pNu2/NGy285Pxv5 KDPsx+te8zsuQOH6Ilh+uK8pVwKZu1Ju73OB6xo2Ur3hDtPLxCbITGUjSANTJ/+ZrrgM 6slXszNctsgifQmT+4QtXouPk9uu8vk8UYz1iaASjq3OvhbBfBL+8Kgcq7wxPMVm4Ny7 I/B+kRdlkB/Os1Pr/hqbAybn8CJl46cytDYYpy/fwiA5Z5r6DX87ND8cfpPI6p4gToq1 ta9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vsx5ftBh; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id j20sm1139377ilo.78.2021.03.18.06.51.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Mar 2021 06:51:47 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: f.fainelli@gmail.com, bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 3/4] net: ipa: fix table alignment requirement Date: Thu, 18 Mar 2021 08:51:40 -0500 Message-Id: <20210318135141.583977-4-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210318135141.583977-1-elder@linaro.org> References: <20210318135141.583977-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org We currently have a build-time check to ensure that the minimum DMA allocation alignment satisfies the constraint that IPA filter and route tables must point to rules that are 128-byte aligned. But what's really important is that the actual allocated DMA memory has that alignment, even if the minimum is smaller than that. Remove the BUILD_BUG_ON() call checking against minimim DMA alignment and instead verify at rutime that the allocated memory is properly aligned. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_table.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_table.c b/drivers/net/ipa/ipa_table.c index dd07fe9dd87a3..988f2c2886b95 100644 --- a/drivers/net/ipa/ipa_table.c +++ b/drivers/net/ipa/ipa_table.c @@ -118,14 +118,6 @@ /* Check things that can be validated at build time. */ static void ipa_table_validate_build(void) { - /* IPA hardware accesses memory 128 bytes at a time. Addresses - * referred to by entries in filter and route tables must be - * aligned on 128-byte byte boundaries. The only rule address - * ever use is the "zero rule", and it's aligned at the base - * of a coherent DMA allocation. - */ - BUILD_BUG_ON(ARCH_DMA_MINALIGN % IPA_TABLE_ALIGN); - /* Filter and route tables contain DMA addresses that refer * to filter or route rules. But the size of a table entry * is 64 bits regardless of what the size of an AP DMA address @@ -665,6 +657,18 @@ int ipa_table_init(struct ipa *ipa) if (!virt) return -ENOMEM; + /* We put the "zero rule" at the base of our table area. The IPA + * hardware requires rules to be aligned on a 128-byte boundary. + * Make sure the allocation satisfies this constraint. + */ + if (addr % IPA_TABLE_ALIGN) { + dev_err(dev, "table address %pad not %u-byte aligned\n", + &addr, IPA_TABLE_ALIGN); + dma_free_coherent(dev, size, virt, addr); + + return -ERANGE; + } + ipa->table_virt = virt; ipa->table_addr = addr; From patchwork Thu Mar 18 13:51:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 404035 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp498041jai; Thu, 18 Mar 2021 06:52:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyT/pVW+nrZEoGxdGWsqXmqCgm1TGgr5L7j1ioRhj4VviuYkPGlfvgC5+W5t7ux05u2mp8D X-Received: by 2002:a05:6402:4244:: with SMTP id g4mr3822088edb.204.1616075565788; Thu, 18 Mar 2021 06:52:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616075565; cv=none; d=google.com; s=arc-20160816; b=Sa8Aq5mr8B0tTzPUVla/47KkskYYYdFDzTrj3E6IAwDgoAazf7FAJ8SmuXYWC8XIMF 1akF/heAakNS6/x9/F4GV1A/ijzYh9eKCkWZQ7/Y2g1eH4q8Nak167gzNXsgjdGeVT7j MGFjnbL7yRyf0xghsctMKi4EsfcgZA/u0AN1ZrihPu8JHqNSv1iXIuOSneeZ7RHz2Tws HlZa/2slBT5dRbcXl5FkQR3UhKqJiE3vHWKGsnYzZTbYGk3oWmFSv2kbazyo8W/N1wnR xbD7Qf1uGmKMrtbs0ohlAQ4tybq6Z9tXMc4meFNCSP+Rx67i+lEieBLS77/DdoZttvj8 vUow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=N1vkQNGymFwLks9UB15v9pfiGh7bDRvcY3otglQibLg=; b=lW9eVHd3WxYpVeEVTNE6cE1G/jmWaNKm/9HK+iV/4uJ1xwUkhT+NtmYKW2fPf4klkw tQfzEdynk0TKuDtbY+rm2l/n5HOTKgEZPvWOQTv/YukvQbI6Q63aOTIo6GWpFSrs3el3 ijYVFT5z1Nb76bDc+C+RRdgMS5JDJ3uDzCyqpmrAkcTJgWmRxYGUc0I48LAetXg+DRPu dp6LcAOvMfIk/FM4GzWTXeURPsA5xxuyNbpS9dBEQNfmj7KBOqvdkcv1oVRTx/M+2lxl HtEdsjEVDLwT45m9LkqGwr/NWUeAo1DkGXP0cWCU+Z1AJWLADuVcY+3tCQaFzlNLmjd2 QjVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oJr3ErB8; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id j20sm1139377ilo.78.2021.03.18.06.51.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Mar 2021 06:51:48 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: f.fainelli@gmail.com, bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 4/4] net: ipa: relax 64-bit build requirement Date: Thu, 18 Mar 2021 08:51:41 -0500 Message-Id: <20210318135141.583977-5-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210318135141.583977-1-elder@linaro.org> References: <20210318135141.583977-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org We currently assume the IPA driver is built only for a 64 bit kernel. When this constraint was put in place it eliminated some do_div() calls, replacing them with the "/" and "%" operators. We now only use these operations on u32 and size_t objects. In a 32-bit kernel build, size_t will be 32 bits wide, so there remains no reason to use do_div() for divide and modulo. A few recent commits also fix some code that assumes that DMA addresses are 64 bits wide. With that, we can get rid of the 64-bit build requirement. Signed-off-by: Alex Elder --- drivers/net/ipa/Kconfig | 2 +- drivers/net/ipa/ipa_main.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 3 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/Kconfig b/drivers/net/ipa/Kconfig index b68f1289b89ef..90a90262e0d07 100644 --- a/drivers/net/ipa/Kconfig +++ b/drivers/net/ipa/Kconfig @@ -1,6 +1,6 @@ config QCOM_IPA tristate "Qualcomm IPA support" - depends on 64BIT && NET && QCOM_SMEM + depends on NET && QCOM_SMEM depends on ARCH_QCOM || COMPILE_TEST depends on QCOM_RPROC_COMMON || (QCOM_RPROC_COMMON=n && COMPILE_TEST) select QCOM_MDT_LOADER if ARCH_QCOM diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c index 97c1b55405cbf..d354e3e65ec50 100644 --- a/drivers/net/ipa/ipa_main.c +++ b/drivers/net/ipa/ipa_main.c @@ -735,8 +735,14 @@ MODULE_DEVICE_TABLE(of, ipa_match); static void ipa_validate_build(void) { #ifdef IPA_VALIDATE - /* We assume we're working on 64-bit hardware */ - BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT)); + /* At one time we assumed a 64-bit build, allowing some do_div() + * calls to be replaced by simple division or modulo operations. + * We currently only perform divide and modulo operations on u32, + * u16, or size_t objects, and of those only size_t has any chance + * of being a 64-bit value. (It should be guaranteed 32 bits wide + * on a 32-bit build, but there is no harm in verifying that.) + */ + BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4); /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */ BUILD_BUG_ON(GSI_EE_AP != 0);