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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id k7sm770359ils.35.2021.03.18.11.59.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Mar 2021 11:59:34 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: f.fainelli@gmail.com, bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v3 1/4] net: ipa: fix assumptions about DMA address size Date: Thu, 18 Mar 2021 13:59:27 -0500 Message-Id: <20210318185930.891260-2-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210318185930.891260-1-elder@linaro.org> References: <20210318185930.891260-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Some build time checks in ipa_table_validate_build() assume that a DMA address is 64 bits wide. That is more restrictive than it has to be. A route or filter table is 64 bits wide no matter what the size of a DMA address is on the AP. The code actually uses a pointer to __le64 to access table entries, and a fixed constant IPA_TABLE_ENTRY_SIZE to describe the size of those entries. Loosen up two checks so they still verify some requirements, but such that they do not assume the size of a DMA address is 64 bits. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_table.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_table.c b/drivers/net/ipa/ipa_table.c index 7450e27068f19..dd07fe9dd87a3 100644 --- a/drivers/net/ipa/ipa_table.c +++ b/drivers/net/ipa/ipa_table.c @@ -126,13 +126,15 @@ static void ipa_table_validate_build(void) */ BUILD_BUG_ON(ARCH_DMA_MINALIGN % IPA_TABLE_ALIGN); - /* Filter and route tables contain DMA addresses that refer to - * filter or route rules. We use a fixed constant to represent - * the size of either type of table entry. Code in ipa_table_init() - * uses a pointer to __le64 to initialize table entriews. + /* Filter and route tables contain DMA addresses that refer + * to filter or route rules. But the size of a table entry + * is 64 bits regardless of what the size of an AP DMA address + * is. A fixed constant defines the size of an entry, and + * code in ipa_table_init() uses a pointer to __le64 to + * initialize tables. */ - BUILD_BUG_ON(IPA_TABLE_ENTRY_SIZE != sizeof(dma_addr_t)); - BUILD_BUG_ON(sizeof(dma_addr_t) != sizeof(__le64)); + BUILD_BUG_ON(sizeof(dma_addr_t) > IPA_TABLE_ENTRY_SIZE); + BUILD_BUG_ON(sizeof(__le64) != IPA_TABLE_ENTRY_SIZE); /* A "zero rule" is used to represent no filtering or no routing. * It is a 64-bit block of zeroed memory. Code in ipa_table_init() From patchwork Thu Mar 18 18:59:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 404051 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp733502jai; Thu, 18 Mar 2021 12:00:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzO3bZ0PN+wdu5L0/HJnHmTAX1ye0xxvUZaU04kcX2blxlV73CuLxDx/EXIG1MhZmT2JH1O X-Received: by 2002:a17:906:495a:: with SMTP id f26mr14757ejt.271.1616094031283; Thu, 18 Mar 2021 12:00:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616094031; cv=none; d=google.com; s=arc-20160816; b=z/BzJBOGKtqO/ZGmxL5CN9+6Kok0U7xCf+8A1YzlEm8fCYw6bHqIgNyE9ftNNUMAlx C+x+KYPXcre7j5fXJe0jmEzBOuGZdnXQCkpOsVfO8fTTGiiirxD8Bm9SQrt7hIS/aC1E z2jml7zGFTd02sEseml72R0oVM19rAlO7Z0W1MlZJsgRccGr6mfvPxhFxEY6WcFRVgBv TYInULm0mNlI5MX3zpreOY0wMMAZVo4QrcyyM3nZOpHbyk1KbEyKNzOYQ3Hrg+eMgx0C nAkYZXNuuI98hQz9OdCdBERtXXKJFfZ8Q2rbBwWmQ+54NJSVV+In3jexxTzEKrYUmZr5 w63Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LESQ/UHK2DxeHH4F7kd7aYV3wdpZXRjKVIKWvAV+aQ0=; b=igOKUtHk+h1pwka4y7QDMhnoYdWy6fFqMI1CS+hBpdR3NzD0MhfkK2lDjDXRTnqYRw opLd1DIBExFhs/KreT190SJ0667QqcBm8Gpz1Tc9jzaC3is1FSA/9yry61UpiZo0koDy 7eXNwb4AnAWeRkMRl/fxYvF3g5WZZSsvrRPhxyQCp1N8zJY+a+DIGNF89kV2RzCNdDZO CrWlFnM92gSc3XMYcIYuHRUhbsi5m1S0cN1p/3kW8K+NLpn9gZ1wc+EwXJhWtoOs7+yt C1K40a2JdwRZPaXacVt+bbvGVl/SBDmQTxXWy+EA/mnQB6SYdCe1/UZn5GmtXZ4+8Ft9 KziQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XYqBvsJT; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id k7sm770359ils.35.2021.03.18.11.59.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Mar 2021 11:59:35 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: f.fainelli@gmail.com, bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v3 2/4] net: ipa: use upper_32_bits() Date: Thu, 18 Mar 2021 13:59:28 -0500 Message-Id: <20210318185930.891260-3-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210318185930.891260-1-elder@linaro.org> References: <20210318185930.891260-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Use upper_32_bits() to extract the high-order 32 bits of a DMA address. This avoids doing a 32-position shift on a DMA address if it happens not to be 64 bits wide. Use lower_32_bits() to extract the low-order 32 bits (because that's what it's for). Suggested-by: Florian Fainelli Signed-off-by: Alex Elder --- v3: - Use upper_32_bits() where appropriate, and lower_32_bits() too. v2: - Switched to use the upper_32_bits(), as suggested by Florian. drivers/net/ipa/gsi.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) -- 2.27.0 Reviewed-by: Florian Fainelli diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index 2119367b93ea9..7f3e338ca7a72 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -351,7 +351,7 @@ void *gsi_ring_virt(struct gsi_ring *ring, u32 index) /* Return the 32-bit DMA address associated with a ring index */ static u32 gsi_ring_addr(struct gsi_ring *ring, u32 index) { - return (ring->addr & GENMASK(31, 0)) + index * GSI_RING_ELEMENT_SIZE; + return lower_32_bits(ring->addr) + index * GSI_RING_ELEMENT_SIZE; } /* Return the ring index of a 32-bit ring offset */ @@ -708,10 +708,9 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id) * high-order 32 bits of the address of the event ring, * respectively. */ - val = evt_ring->ring.addr & GENMASK(31, 0); + val = lower_32_bits(evt_ring->ring.addr); iowrite32(val, gsi->virt + GSI_EV_CH_E_CNTXT_2_OFFSET(evt_ring_id)); - - val = evt_ring->ring.addr >> 32; + val = upper_32_bits(evt_ring->ring.addr); iowrite32(val, gsi->virt + GSI_EV_CH_E_CNTXT_3_OFFSET(evt_ring_id)); /* Enable interrupt moderation by setting the moderation delay */ @@ -816,10 +815,9 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell) * high-order 32 bits of the address of the channel ring, * respectively. */ - val = channel->tre_ring.addr & GENMASK(31, 0); + val = lower_32_bits(channel->tre_ring.addr); iowrite32(val, gsi->virt + GSI_CH_C_CNTXT_2_OFFSET(channel_id)); - - val = channel->tre_ring.addr >> 32; + val = upper_32_bits(channel->tre_ring.addr); iowrite32(val, gsi->virt + GSI_CH_C_CNTXT_3_OFFSET(channel_id)); /* Command channel gets low weighted round-robin priority */ @@ -1365,7 +1363,7 @@ static struct gsi_trans *gsi_event_trans(struct gsi_channel *channel, u32 tre_index; /* Event xfer_ptr records the TRE it's associated with */ - tre_offset = le64_to_cpu(event->xfer_ptr) & GENMASK(31, 0); + tre_offset = lower_32_bits(le64_to_cpu(event->xfer_ptr)); tre_index = gsi_ring_index(&channel->tre_ring, tre_offset); return gsi_channel_trans_mapped(channel, tre_index); From patchwork Thu Mar 18 18:59:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 404054 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp733512jai; Thu, 18 Mar 2021 12:00:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwpiQ0Ha/mm8xJACEZTTzGVok8zPzPVuQGekn4YLbSjvztqWTKZmMWoTIOAueotEHQSW4sS X-Received: by 2002:a05:6402:10c9:: with SMTP id p9mr5493597edu.268.1616094032079; Thu, 18 Mar 2021 12:00:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616094032; cv=none; d=google.com; s=arc-20160816; b=0V2eQiEjbSWhKK08znVMkratKvS1k3AeUK9lS6YwpUvhgWrO/UIwBTQX4p+IUCsrz8 MDI9lVC1qr9KxUKeNzaHmZCgDVvT3j3U+Ydgi9QrKQSPhy6BXdZgk6m3kJNOJ7W7K0Ir muT4WspmLleE0rG0ddPg3Ye42uCvxrrsZaKN+72gacJ27TTIkDXS+0uXFcjv8//pXmA+ jVDBCF7EjhLg5ns4fsul3izZv1QiThn95JR8EhNVKX+2oA4DV7U/U4wEj8cCtyc+7/lL OEllrP3ej5fQBYUQIKXz0W0Cx15Hpjk1xAJWdYGk4jBv5C0q/cFYMVovzOjTsOilMIz0 nJ7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mJHY8qu/zb8ROas4WV0ki8PTfXxIvdJCtkC7EQYxU/c=; b=mx7quLXsg+5JJ1Absdr1gPHTTNGABOuozzCTanb/TuBDi7j8CTaC4vxXtennuGHvPw Ob7H0njkadJwU94rSqOFOoE2sPMdI4Ccmq/2khLqTMkOk7gHD0QXZRHQGAEvCBRWhsQL ygUJIAdlGqzO9irtq2suSwgn65n/8inDbZq64ICaqi3anVpYd44JRV5ublLKy7FjykPn 4au8AKItR7rns4kIWSlL/tKr758C23xRNdHouPPPZ2caLdowA+Shpd3eKKrSojJVSk8y A9Be5nfC5LY9//3DEeAzwLyVEv+CAo5+XP9ZaPexdkYJeBfTcpR3gZwC4jyyG2vhLR7x ztTA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q9Wc6Xbb; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id k7sm770359ils.35.2021.03.18.11.59.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Mar 2021 11:59:36 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: f.fainelli@gmail.com, bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v3 3/4] net: ipa: fix table alignment requirement Date: Thu, 18 Mar 2021 13:59:29 -0500 Message-Id: <20210318185930.891260-4-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210318185930.891260-1-elder@linaro.org> References: <20210318185930.891260-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org We currently have a build-time check to ensure that the minimum DMA allocation alignment satisfies the constraint that IPA filter and route tables must point to rules that are 128-byte aligned. But what's really important is that the actual allocated DMA memory has that alignment, even if the minimum is smaller than that. Remove the BUILD_BUG_ON() call checking against minimim DMA alignment and instead verify at rutime that the allocated memory is properly aligned. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_table.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_table.c b/drivers/net/ipa/ipa_table.c index dd07fe9dd87a3..988f2c2886b95 100644 --- a/drivers/net/ipa/ipa_table.c +++ b/drivers/net/ipa/ipa_table.c @@ -118,14 +118,6 @@ /* Check things that can be validated at build time. */ static void ipa_table_validate_build(void) { - /* IPA hardware accesses memory 128 bytes at a time. Addresses - * referred to by entries in filter and route tables must be - * aligned on 128-byte byte boundaries. The only rule address - * ever use is the "zero rule", and it's aligned at the base - * of a coherent DMA allocation. - */ - BUILD_BUG_ON(ARCH_DMA_MINALIGN % IPA_TABLE_ALIGN); - /* Filter and route tables contain DMA addresses that refer * to filter or route rules. But the size of a table entry * is 64 bits regardless of what the size of an AP DMA address @@ -665,6 +657,18 @@ int ipa_table_init(struct ipa *ipa) if (!virt) return -ENOMEM; + /* We put the "zero rule" at the base of our table area. The IPA + * hardware requires rules to be aligned on a 128-byte boundary. + * Make sure the allocation satisfies this constraint. + */ + if (addr % IPA_TABLE_ALIGN) { + dev_err(dev, "table address %pad not %u-byte aligned\n", + &addr, IPA_TABLE_ALIGN); + dma_free_coherent(dev, size, virt, addr); + + return -ERANGE; + } + ipa->table_virt = virt; ipa->table_addr = addr; From patchwork Thu Mar 18 18:59:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 404053 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp733524jai; Thu, 18 Mar 2021 12:00:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzAjOVSe8Nw280j0rTiZu/RS4/MWzNL8R269Y9BBMN6qyq6wve8tybi8QT88MOoOr/trwrt X-Received: by 2002:a17:906:c102:: with SMTP id do2mr14124ejc.305.1616094032960; Thu, 18 Mar 2021 12:00:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616094032; cv=none; d=google.com; s=arc-20160816; b=gqFdQlYvwuhFozTCF1I6ZlTP0jb0TdBm/cxOjEzxq1m1T2Qr7l/LgMUbCKZJlGspLD RnU8cX7tlV3jMMcRT9nseNtc87mgyy4Zlf0lQfdQAE1fxIumhoeJn6WxRocthGCamPW/ vvUqKka9YMtJqvwSMEX+ES/TxC7cAqy34oykmFeBl7/WmdmAsfEgMDu1vC9QbxM/CiUX 36GstWGSR8N3YtwTmFOHVpvSTiIqCooMfaEWkiYw6QoIOLFocidY1sE7g1LghKqqHUFW 9WytWMFne77h3B6BnkAiCyxvR9WjVIocqfs2UJZsJGqcfaMEsjbn46B5aF7IVWjlLNL6 RkDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=N1vkQNGymFwLks9UB15v9pfiGh7bDRvcY3otglQibLg=; b=RbmMH1nLMMr75s9U0wcCoBpfdFe+dpyJkGjBzCrADluz7visQk9EfLWed9qyIk/jSy 1wDjtQjPWxNXyGrl6JWC8RCJkHT10E0apY3dIAV6SUX0SNpcu77uhnH+NaHlun/OU1Mq J11Jjv3lqJYZifxqTywHX1OhfyWZw8i6J1Q953VRuJa4c4wXCUqFftTls0y/OAJP3sN4 V7+z0KAae3ZuoDcYusO9pCNidjAdcyXRVOZTKOcGvDXeATEQi2MXQn/y8VgngYK1zvYl X0yrw+Yi6U6EmR21UQ7nFsvOeGFkA/IpBFRF3eTLUyB+QfFZa5q2Ib5BrsCAnSapRwoc f/rA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pfH5ler1; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id k7sm770359ils.35.2021.03.18.11.59.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Mar 2021 11:59:37 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: f.fainelli@gmail.com, bjorn.andersson@linaro.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v3 4/4] net: ipa: relax 64-bit build requirement Date: Thu, 18 Mar 2021 13:59:30 -0500 Message-Id: <20210318185930.891260-5-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210318185930.891260-1-elder@linaro.org> References: <20210318185930.891260-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org We currently assume the IPA driver is built only for a 64 bit kernel. When this constraint was put in place it eliminated some do_div() calls, replacing them with the "/" and "%" operators. We now only use these operations on u32 and size_t objects. In a 32-bit kernel build, size_t will be 32 bits wide, so there remains no reason to use do_div() for divide and modulo. A few recent commits also fix some code that assumes that DMA addresses are 64 bits wide. With that, we can get rid of the 64-bit build requirement. Signed-off-by: Alex Elder --- drivers/net/ipa/Kconfig | 2 +- drivers/net/ipa/ipa_main.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 3 deletions(-) -- 2.27.0 diff --git a/drivers/net/ipa/Kconfig b/drivers/net/ipa/Kconfig index b68f1289b89ef..90a90262e0d07 100644 --- a/drivers/net/ipa/Kconfig +++ b/drivers/net/ipa/Kconfig @@ -1,6 +1,6 @@ config QCOM_IPA tristate "Qualcomm IPA support" - depends on 64BIT && NET && QCOM_SMEM + depends on NET && QCOM_SMEM depends on ARCH_QCOM || COMPILE_TEST depends on QCOM_RPROC_COMMON || (QCOM_RPROC_COMMON=n && COMPILE_TEST) select QCOM_MDT_LOADER if ARCH_QCOM diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c index 97c1b55405cbf..d354e3e65ec50 100644 --- a/drivers/net/ipa/ipa_main.c +++ b/drivers/net/ipa/ipa_main.c @@ -735,8 +735,14 @@ MODULE_DEVICE_TABLE(of, ipa_match); static void ipa_validate_build(void) { #ifdef IPA_VALIDATE - /* We assume we're working on 64-bit hardware */ - BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT)); + /* At one time we assumed a 64-bit build, allowing some do_div() + * calls to be replaced by simple division or modulo operations. + * We currently only perform divide and modulo operations on u32, + * u16, or size_t objects, and of those only size_t has any chance + * of being a 64-bit value. (It should be guaranteed 32 bits wide + * on a 32-bit build, but there is no harm in verifying that.) + */ + BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4); /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */ BUILD_BUG_ON(GSI_EE_AP != 0);