From patchwork Mon Mar 22 10:07:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 406089 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp3434954jai; Mon, 22 Mar 2021 03:18:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyjjUrJuxRSZvUJjnC4z0Y61vwq1z7c10QYoTNsxksCanKUfwLfemqxvaXXx6loqza45crg X-Received: by 2002:a25:5ed5:: with SMTP id s204mr24613577ybb.121.1616408296683; Mon, 22 Mar 2021 03:18:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616408296; cv=none; d=google.com; s=arc-20160816; b=NAkRrC3P37CRRFdShmCF9jp550CC+/seL9ZSbOhotJA9MZwApVS3AB5MZKhEu0ISfT qSdGRWzov6PZCxNiV/yoJT8smwT6jW7isMGareu7tnXI4czbKcp+S8FEoNWpHwg7utqi /5FjxxUfNO/ohGWUf8Q5WtCO5dJjuyQ9u4/0wPE221VuQPWKye+vJu3JE0HwELwk3jZ4 Io8565lo8V8kF3OblB8Fa/tNHV+d33uhefcLwSD8R0EWuOpErtuewx5IbYiWOfy8AiSd OMCrhoIPCNH5uVNr0rqVvXDYISRpHJeAoewW0d9LS02Yn6wLqqx3E2cwv80BEXZpqi5e VhNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=jf1VGujtece+sgrlTdeq9JiiLbbG5le4coO4jmGjzMs=; b=Tg9v+ApUeRfBKdnO0gfwnnWF2TBBfB1oRBXWE9a6pm/0F5pj2Lfoi4XN4ogIUrxDMi VqxibH3TvVxIUyoCADvNc1Z0RTh2jMjhUCjUNyBVRDerB2q/yAe7K8Dq9wqRSunHqia7 odEtIHa9neAF+vSfmzTiz9CehfZOR7hcLCmzH6a6a2TPD+NdlUUV2FcDsuXwZj07pLSJ g45iwum8ggAdoYAEUX+z3WXaPMcyFlW+p/kIXxzEPZ7uKN496fuMlMonpdO+sK+VdKf0 WGBS+RNqkNasIk2KuVNIsSXs7KtDvXShdHwzmey96kQEP7Xf+I8VF/45qSB/GKN++u18 uiLA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=N6iKUsFm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j187si13361595ybg.401.2021.03.22.03.18.16 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 22 Mar 2021 03:18:16 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=N6iKUsFm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:44098 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lOHdX-0007N1-TK for patch@linaro.org; Mon, 22 Mar 2021 06:18:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55908) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOHTP-0007Dc-J1 for qemu-devel@nongnu.org; Mon, 22 Mar 2021 06:07:47 -0400 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]:40599) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lOHTL-0002Rl-Rg for qemu-devel@nongnu.org; Mon, 22 Mar 2021 06:07:47 -0400 Received: by mail-pl1-x62f.google.com with SMTP id g1so6277977plg.7 for ; Mon, 22 Mar 2021 03:07:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jf1VGujtece+sgrlTdeq9JiiLbbG5le4coO4jmGjzMs=; b=N6iKUsFm3jc2NUeWupkVAaHWrDMQnmpc+3X563QHjhEeWbp40BYEqrnBl+3qyNdnr9 PAQ+8JyJBUmH6QAgHiQGkD2GbjHnp/QJmUrQkbWnEuJxZ6pk17z+3LDznE34CJkT5r6P KLMfXvpD7GBtSj83bnkS+hIP5UUsI8BNRhK03dn+hQ3+MKBWl0vBMxNVOiIsbDq0fCLf /FjB70CPhXy4lp8J68FWX6PrpsB3eJRhIsYIqIBQDJeMcBq23rM76kDjwzdFEgB+zQDW We1GaJwdbK0Uhaf9JeGmfWLdjUdNF3SLhanAKVAF0JIz6RwH4UriRTMcQn0r+4/MDgd/ jmzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jf1VGujtece+sgrlTdeq9JiiLbbG5le4coO4jmGjzMs=; b=Ca1fLkDJV6INYOilhxdP977YyQM7Dm1DfsxYziQyfH19yJO5P/YtHx7gKoP2c1H5A2 +Zlq4d8S6XKMSpsJjv2wKGKzX/3sXZO+KvNvnkrXzsBvzlPdUQtfjH3KW2qAj/loDEv4 r5fcdUdermOs+avWFLH906TYHKkKEFj6ve6XObHdmstLw00yinYY65Nb7Sw0gub9dk5w q6Lxopcu3bxX5aU2iJpBJdMb0u3QxDSzG/FiPWZ2fH1SMkTeqJ00GaFJcs3obxCjAOiE 8+lDzu7KXtoj3RwfQUdWS966BALflUxKo1VtNaEfneYZZMqAtRJakr3BDm5I+cbOOe/q hUfA== X-Gm-Message-State: AOAM533WuxTMyEbFloIjNLtJEUXd6AWxqm/cnQdM6FIFX/XPcfoTrk3k XWVptS3MFmm0B4YncJU6Rml6Lkr50hU8 X-Received: by 2002:a17:90b:681:: with SMTP id m1mr12231622pjz.168.1616407660836; Mon, 22 Mar 2021 03:07:40 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id c193sm13697145pfc.180.2021.03.22.03.07.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Mar 2021 03:07:40 -0700 (PDT) From: Haibo Xu To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH 1/3] Update linux header with new arm64 NV macro. Date: Mon, 22 Mar 2021 10:07:24 +0000 Message-Id: <636b5932e4cf061b6f97516e82d4319c1d29b871.1616052889.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=haibo.xu@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, drjones@redhat.com, richard.henderson@linaro.org, Haibo Xu , pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Haibo Xu --- linux-headers/asm-arm64/kvm.h | 2 ++ linux-headers/linux/kvm.h | 1 + 2 files changed, 3 insertions(+) -- 2.17.1 diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index b6a0eaa32a..77b995a26c 100644 --- a/linux-headers/asm-arm64/kvm.h +++ b/linux-headers/asm-arm64/kvm.h @@ -106,6 +106,7 @@ struct kvm_regs { #define KVM_ARM_VCPU_SVE 4 /* enable SVE for this CPU */ #define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 /* VCPU uses address authentication */ #define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 /* VCPU uses generic authentication */ +#define KVM_ARM_VCPU_HAS_EL2 7 /* Support nested virtualization */ struct kvm_vcpu_init { __u32 target; @@ -334,6 +335,7 @@ struct kvm_vcpu_events { #define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 #define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 #define KVM_DEV_ARM_VGIC_GRP_ITS_REGS 8 +#define KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ 9 #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10 #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \ (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index 020b62a619..ce4630c4db 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1056,6 +1056,7 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190 #define KVM_CAP_SYS_HYPERV_CPUID 191 #define KVM_CAP_DIRTY_LOG_RING 192 +#define KVM_CAP_ARM_EL2 193 #ifdef KVM_CAP_IRQ_ROUTING From patchwork Mon Mar 22 10:07:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 406084 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp3428469jai; Mon, 22 Mar 2021 03:08:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwJenL83eL8JXYsCCfegz+1dIaUlhscO/4/wPJTO+pNv8CpFuCLdSt67Yn6evRtbTzepwfT X-Received: by 2002:a05:6e02:1aa6:: with SMTP id l6mr10409179ilv.126.1616407693659; Mon, 22 Mar 2021 03:08:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616407693; cv=none; d=google.com; s=arc-20160816; b=of/vmmxKYI78USC8eSUTkhrbzE7fsVI/5dF2qsP4FsDAws79hfnuyq6x65BAGu70s2 g+cohUXiH+ZNnJ4wu6H3wlwJyuuOKMlKelOtmKs1qyLOtFCq9JzjlA4DwuJZ3CoEIhcd oScg/ArD3fR3PlUPMFBS5KJf2/OMTA7+ZNOKS6nQf900Kw/BVG8R3MV9I+OsJ7eFIeZt WOKUOukbQJHPomSdGL7uDQ08XKizwsh7/KtoIx0MftspYPcIpRw4GOUdYj2FKjwX1baV 6EmrYSbKoTNY/yTt592xBG+WSBTZx8q7PKG/b17sOUYdznO0slATvVXPWSIbJgJnNKbP DsAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=0LuoR9HyBU4NBA/WzdyWv4ccTUx2ilAAc4PHL/24GyE=; b=qEZOyTl4W5Casy/m1ZlAoGl6YX+RLAdofJlET+tm6Mn08CiEDbgTlb2AemjUz1kubb rQLMopF8FZ8xgKYtgSgs8YUVrqxcCUKl3/NlE2ABvlZpP8kvwyT6IjCV2kcPNwj7cV7S Kp99/RXACdIy+UDTsBhDKoLxlCSFcpi3PlowTk1EAvKw8oHSFeybHtJTRN7Fa8/yjJcc 9XZMN7NBmXguPl1KsWpq+T5WIkNh6QDmhRllTxAGoDAayT1UyciNmfAixOXxwQiFNPR5 SAxmdHlzY8EC6lEOG8D9/5/kWjcEFMgkeYC6lCqXJx8TT2Lr000M+nZrOrWiyoA2fNGp JfKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=G8WHIoFC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o12si9291908ils.62.2021.03.22.03.08.13 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 22 Mar 2021 03:08:13 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=G8WHIoFC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52072 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lOHTp-0007DV-2X for patch@linaro.org; Mon, 22 Mar 2021 06:08:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55886) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOHTO-0007Bn-D7 for qemu-devel@nongnu.org; Mon, 22 Mar 2021 06:07:46 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]:34649) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lOHTL-0002Ru-On for qemu-devel@nongnu.org; Mon, 22 Mar 2021 06:07:46 -0400 Received: by mail-pg1-x52a.google.com with SMTP id 32so2156368pgm.1 for ; Mon, 22 Mar 2021 03:07:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0LuoR9HyBU4NBA/WzdyWv4ccTUx2ilAAc4PHL/24GyE=; b=G8WHIoFCBnroQz+ENJ2xXSN7RJmMFm0kSWm+EjWA9IoHFBcy08j0FaqJ+vo6sX8JJc QbImSNn8ddRT0e4XjkryZSobI6QZSS8pTcLHBSij1EpZEC5tNPjubMDnWgIoLT8hLW1q 71onww1bFxgOkFDsuOPb/3MKKgvKqYISfVYso67DAfL43H9kQt+s3rdNLenmFYWTzb90 wM7q7ygbjK9euGWNIviFKv6YC/yuJ8iE5J+qfXC7itkJX8J/zJaEal3w78GcHZMYj0FF d13TWhR3PUtTWTpNXisYHIL4In2Kg/ah46lgRNjuhYronjtj2OZjXqgWf48eoUj3TxQu UiSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0LuoR9HyBU4NBA/WzdyWv4ccTUx2ilAAc4PHL/24GyE=; b=qKdq1Omyd0bh3iFtLKCF8HUPxwoKDge6I7qhDvC3gGNCInQyPLyCOClR4+2oNeKAYu VQbyPgazKpdLiIeIOSjdyWTw6LmeOZT5fmcAQUSM0CNMuI8/gRdHs8m97Scr0iQrc18A z4MI3dHX2iXhwdedyfZzijwirDrMAeGRU8fcBdbFXa8qnjQazjMq83qsSASQGAPgWFJL +zP9F9zuDtzIsXgVvMqYTZijfBeQRAxkZZ1obflx+WFRkk4WEQ5b/DLIItu3LyhXcG7c KpDx+CptO3LT7v0PLqtOvK7kzGQ7bNapNRZ0YIY5St4BEYlTicMeXDTid/B0Ybp24HJR 9FDQ== X-Gm-Message-State: AOAM5337iSjgNDS5saMK5+JsZrEzhhHCUQdpaqp/BSHLClmTzdhhJFAx p/GT6yE+xo6IZwB3tvszwm/8ya7osQH7LrY= X-Received: by 2002:a62:5c84:0:b029:1f2:a5f0:d12a with SMTP id q126-20020a625c840000b02901f2a5f0d12amr20474940pfb.36.1616407662346; Mon, 22 Mar 2021 03:07:42 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id c193sm13697145pfc.180.2021.03.22.03.07.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Mar 2021 03:07:42 -0700 (PDT) From: Haibo Xu To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH 2/3] Enable support for setting KVM vGIC maintenance IRQ Date: Mon, 22 Mar 2021 10:07:25 +0000 Message-Id: <621f2848d4115c6307fe56b6a6cff254c273b621.1616052890.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=haibo.xu@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, drjones@redhat.com, richard.henderson@linaro.org, Haibo Xu , pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Uses the new VGIC KVM device attribute to set the maintenance IRQ. This is fixed to use IRQ 25(PPI 9), as a platform decision matching the arm64 SBSA recommendation. Signed-off-by: Haibo Xu --- hw/intc/arm_gicv3_common.c | 1 + hw/intc/arm_gicv3_kvm.c | 16 ++++++++++++++++ include/hw/intc/arm_gicv3_common.h | 1 + 3 files changed, 18 insertions(+) -- 2.17.1 diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 58ef65f589..3ac10c8e61 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -495,6 +495,7 @@ static Property arm_gicv3_common_properties[] = { DEFINE_PROP_UINT32("num-irq", GICv3State, num_irq, 32), DEFINE_PROP_UINT32("revision", GICv3State, revision, 3), DEFINE_PROP_BOOL("has-security-extensions", GICv3State, security_extn, 0), + DEFINE_PROP_BOOL("has-virtualization-extensions", GICv3State, virt_extn, 0), DEFINE_PROP_ARRAY("redist-region-count", GICv3State, nb_redist_regions, redist_region_count, qdev_prop_uint32, uint32_t), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index 65a4c880a3..1e1ca66e2c 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -826,6 +826,22 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &error_abort); + if (s->virt_extn) { + bool maint_irq_allowed; + uint32_t maint_irq = 25; + + maint_irq_allowed = + kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ, 0); + if (!maint_irq_allowed) { + error_setg(errp, "VGICv3 setting maintenance IRQ are not " + "supported by this host kernel"); + return; + } + + kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ, + 0, &maint_irq, true, &error_abort); + } + kvm_arm_register_device(&s->iomem_dist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd, 0); diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index 91491a2f66..921ddc2c5f 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -220,6 +220,7 @@ struct GICv3State { uint32_t num_irq; uint32_t revision; bool security_extn; + bool virt_extn; bool irq_reset_nonsecure; bool gicd_no_migration_shift_bug; From patchwork Mon Mar 22 10:07:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 406088 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp3431507jai; Mon, 22 Mar 2021 03:12:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyWlVyALYJIZXIdO/GUx/V5U1dW3b4voXGMdxBo3S82ffb+TX0FCG7DbMTxUO4azlmqVoCb X-Received: by 2002:a25:74cb:: with SMTP id p194mr23584275ybc.347.1616407971064; Mon, 22 Mar 2021 03:12:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1616407971; cv=none; d=google.com; s=arc-20160816; b=AMnrtj/vmDMybjdPmXOIqSsofPzWA+RTAiinZndQP8WkMuvyEQ3QJt/A3MhgkGq5jD 23OFDOvh4GfvsT87pVJeKDwkqQfwz+1OAurl70/uXKFEmYdm7m9tRAdNuimVzIr1opgn 82G+0hyX7FaZatNxSY1eqQ2GxS2+t5s8KbI9/xeqMMVFqdzIp9fRnXi8L0uuDgrr/DNc IGyIvruqZ3DWRVOXxyT3A8UrImCwRfV8mFHf+hA7xBA7DhUehB3aU7wg6RvydhgiPhE4 OeB1HwS2uldnU7w5U2u0PDmob+mHCMklhVzJPnnUaPGYQAW8as2BTG3h8Y4SkVJuydwz KDTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=d+NM5yfD0ObBzM0/K9OBInQYziKkO1YL7j+UCs3urWY=; b=wse4YSbO3Z4psCuPuR+KR1k10oEYQ3Qq3GclCccdBSROmtfg1Zs0D+dsydmpTMQrVZ xOlllhzOaPVLjMCtM3ykTtV9h9MIpitgsKN0cOOp/+WmTmzGq/Wbi9gECE+Dd40bG/6r C43WPbjJpOUzJN7Z5iKzl5h7+aNpeJfWyypbPUmbP+Y0qkxWg5TLZo3qXW/PmNSPuMf6 77ourZX691AKh+bjpKmUihTu+w1ujTnrJYI9P7DDU90E4nhWOFTO1kLaXfUJUtL7H5MO mq0Dv10yEBLiIGzb+D9pbqt8A7ufL8lzG2qHdQXf+CT3hkfOWI/OsXppQqHkWYY76dEF Iveg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="U/q/tBhS"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id i6si12138296ybt.352.2021.03.22.03.12.50 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 22 Mar 2021 03:12:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="U/q/tBhS"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:33402 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lOHYG-0002sY-Nw for patch@linaro.org; Mon, 22 Mar 2021 06:12:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55962) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOHTS-0007Kr-EH for qemu-devel@nongnu.org; Mon, 22 Mar 2021 06:07:50 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]:34305) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lOHTN-0002T9-Cy for qemu-devel@nongnu.org; Mon, 22 Mar 2021 06:07:50 -0400 Received: by mail-pj1-x102e.google.com with SMTP id cl21-20020a17090af695b02900c61ac0f0e9so10851519pjb.1 for ; Mon, 22 Mar 2021 03:07:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d+NM5yfD0ObBzM0/K9OBInQYziKkO1YL7j+UCs3urWY=; b=U/q/tBhSVlswCb6NbPI/TgCTClXY4bMfl5LAHhLEVBCCUxJQw0P9GDFj1Mrt3y4T1d Ee/qiZQYBRZ2Fd/mT6IKBqoHEMgwczJtGm+SRQhk1cZeqU+zufkn+aK8TrccXQtWOF23 zodMTFACG6FP5OwVPk/QfvoxT78TsBstzAMw0877WSnH2j93COzlli9alKC2pK4ssdGP CYHuwZGzBfm56N1bmM+2W9DP5nAerbOPImgDbS/scCOcSD2bkYxee+PMLNLTgzGFB6Gr d1YOOzAHr7JSt3VUD3wi6xGEwtArgBLn+MrXV5i73G+iwyeHhCpscxYjfaJd3DmPgzrV au4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d+NM5yfD0ObBzM0/K9OBInQYziKkO1YL7j+UCs3urWY=; b=NsQB5ysaMbftx78Bdpv4GIUFhcZd1WDVlFmiMDf8PMGKzIVSak+fNXqtP++neTap/i QrUr6cq3yxSErU2VQQ6CVrxpd4Q8w4jKGQWBZwUPhPJ81Y4hs5Lhn2tWpfK+LmcxIz0l Pp0SvLDvBiI8PRkS2QtSLkFhMgIDYa9llnO/yM1zJ7b4QxqIc6WLdX6Rxt2tPhu++Nd6 YfMLWRWbCquvU8eqRyiexBmtsU2+nx7QqtR6SnHZ1R8dEnSB6NopjAOMppiHSjPTP6uY gnXRejYffUIT/hvg/m0mfMK9XWYgBLiQ8NYMVErdcJBuBLBeEQ/nfI3IdaQqwx1/3Tr5 FbAQ== X-Gm-Message-State: AOAM530U9MmPA3UCvO4N5aCgeh+BH9kqS5JqKdUfQ09g3l2M/DofZkdp KFh2PDn6ynU8zT9537f1tVLxSImSl6mAJXY= X-Received: by 2002:a17:90b:4b0e:: with SMTP id lx14mr12361738pjb.147.1616407663884; Mon, 22 Mar 2021 03:07:43 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id c193sm13697145pfc.180.2021.03.22.03.07.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Mar 2021 03:07:43 -0700 (PDT) From: Haibo Xu To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH 3/3] Enable nested virtualization support in arm64 KVM mode Date: Mon, 22 Mar 2021 10:07:26 +0000 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=haibo.xu@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, drjones@redhat.com, richard.henderson@linaro.org, Haibo Xu , pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add support for arm64 el2 in qemu KVM mode(nested virtualization). This feature is disabled by default, just as that in TCG mode, and can be enabled by "-M virt,accel=kvm,virtualization=on" when starting a VM. Signed-off-by: Haibo Xu --- hw/arm/virt.c | 11 ++++++++--- target/arm/cpu.h | 8 ++++++++ target/arm/kvm64.c | 14 ++++++++++++++ target/arm/kvm_arm.h | 28 ++++++++++++++++++++++++++++ 4 files changed, 58 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index aa2bbd14e0..72e60348d5 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -663,6 +663,11 @@ static void create_gic(VirtMachineState *vms) qdev_prop_set_uint32(vms->gic, "redist-region-count[1]", MIN(smp_cpus - redist0_count, redist1_capacity)); } + + if (kvm_irqchip_in_kernel()) { + qdev_prop_set_bit(vms->gic, "has-virtualization-extensions", + vms->virt); + } } else { if (!kvm_irqchip_in_kernel()) { qdev_prop_set_bit(vms->gic, "has-virtualization-extensions", @@ -1905,9 +1910,9 @@ static void machvirt_init(MachineState *machine) exit(1); } - if (vms->virt && kvm_enabled()) { - error_report("mach-virt: KVM does not support providing " - "Virtualization extensions to the guest CPU"); + if (vms->virt && kvm_enabled() && !kvm_arm_nested_virt_supported()) { + error_report("mach-virt: nested virtualization requested, " + "but not supported by the host."); exit(1); } diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 193a49ec7f..377187152b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -4182,6 +4182,14 @@ static inline bool isar_feature_aa64_ssbs(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, SSBS) != 0; } +/* + * Currently we don't differentiate between the ARMv8.3-NV and ARMv8.4-NV. + */ +static inline bool isar_feature_aa64_nv(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, NV) != 0; +} + /* * Feature tests for "does this exist in either 32-bit or 64-bit?" */ diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index dff85f6db9..2810104dea 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -500,6 +500,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) */ int fdarray[3]; bool sve_supported; + bool el2_supported; uint64_t features = 0; uint64_t t; int err; @@ -646,6 +647,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) } sve_supported = ioctl(fdarray[0], KVM_CHECK_EXTENSION, KVM_CAP_ARM_SVE) > 0; + el2_supported = ioctl(fdarray[0], KVM_CHECK_EXTENSION, KVM_CAP_ARM_EL2) > 0; kvm_arm_destroy_scratch_host_vcpu(fdarray); @@ -671,6 +673,10 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) features |= 1ULL << ARM_FEATURE_PMU; features |= 1ULL << ARM_FEATURE_GENERIC_TIMER; + if (el2_supported) { + features |= 1ULL << ARM_FEATURE_EL2; + } + ahcf->features = features; return true; @@ -721,6 +727,11 @@ bool kvm_arm_steal_time_supported(void) return kvm_check_extension(kvm_state, KVM_CAP_STEAL_TIME); } +bool kvm_arm_nested_virt_supported(void) +{ + return kvm_check_extension(kvm_state, KVM_CAP_ARM_EL2); +} + QEMU_BUILD_BUG_ON(KVM_ARM64_SVE_VQ_MIN != 1); void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) @@ -856,6 +867,9 @@ int kvm_arch_init_vcpu(CPUState *cs) assert(kvm_arm_sve_supported()); cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_SVE; } + if (cpu->has_el2) { + cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_HAS_EL2; + } /* Do KVM_ARM_VCPU_INIT ioctl */ ret = kvm_arm_vcpu_init(cs); diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 34f8daa377..da3a3d5920 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -285,6 +285,24 @@ void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp); */ bool kvm_arm_steal_time_supported(void); +/** + * kvm_arm_nested_virt_finalize: + * @cpu: ARMCPU for which to finalize nested-virt + * @errp: Pointer to Error* for error propagation + * + * Validate the nested-virt property selection and set its default + * based on KVM support and guest configuration. + */ +void kvm_arm_nested_virt_finalize(ARMCPU *cpu, Error **errp); + +/** + * kvm_arm_nested_virt_supported: + * + * Returns: true if KVM can enable nested virtualization + * and false otherwise. + */ +bool kvm_arm_nested_virt_supported(void); + /** * kvm_arm_aarch32_supported: * @@ -398,6 +416,11 @@ static inline bool kvm_arm_steal_time_supported(void) return false; } +static inline bool kvm_arm_nested_virt_supported(void) +{ + return false; +} + /* * These functions should never actually be called without KVM support. */ @@ -441,6 +464,11 @@ static inline void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) g_assert_not_reached(); } +static inline void kvm_arm_nested_virt_finalize(ARMCPU *cpu, Error **errp) +{ + g_assert_not_reached(); +} + static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) { g_assert_not_reached();