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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id a81-v6si18355279pfj.300.2018.05.23.08.15.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 08:15:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=AkLWW7Im; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 34D2A207E4DFD; Wed, 23 May 2018 08:15:11 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::241; helo=mail-pl0-x241.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x241.google.com (mail-pl0-x241.google.com [IPv6:2607:f8b0:400e:c01::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 76FA8209603DB for ; Wed, 23 May 2018 08:15:10 -0700 (PDT) Received: by mail-pl0-x241.google.com with SMTP id n10-v6so13229083plp.0 for ; Wed, 23 May 2018 08:15:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HQH1hEo1O3Fr0g9tIc26415Si2AHV8l76d45h/VzFFc=; b=AkLWW7ImidSK5Gz4Y5/luK32fh84n6XzcWRc5ywOm/ZypFfOtppdiPlLSkka0a2edN MtP3bu9koXuB3m6vog1+4yAOs51Gxn96GrCW0gg2o6nF7uTplRnRb2S3Dy3ICPPvXlBg e2Nj9z/jqfSRqftAbvQb/CgcAyah4fto0nOOE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HQH1hEo1O3Fr0g9tIc26415Si2AHV8l76d45h/VzFFc=; b=GqVkUO1r0MhUkED5YncxmuZnqZXTiGljZYN+8Q+8PCTSgt856SjZm/nUyVgRiGVJCg 6JTQBkY44Ua6FCaQh+hygsiX0Eu1RUeCjKnmGmjLrEUe1r1MQF0Qp4aJj3o49mmIinO+ PbgEsSfoCJ14FI58vl+tKp4124bPsbuR6E4+Z3qfh38Sog1UjpIeoR5q5JK18P4DXTGI fBBWMrX7hiSd0BvHsYDXOLErmh/GC/RntTDjJtZ6A7O/bz6zHrWKRXsU1qy8kpDMqgIA i09dtL4GLSR5Fzw+td4DYRC8YUeOgSMm4lk9TntYDDm2AXW7P81+Xv2xEDdBx8HkKS0z jm5A== X-Gm-Message-State: ALKqPwdnmrlNQydKyJHS0+ds+WCcjoZ4IW+O33ziSnnpJ09kp7f8JX2c cFlcKxfYsDe2ftM/s9O7mTqy1uGh13M= X-Received: by 2002:a17:902:9a95:: with SMTP id w21-v6mr3282467plp.168.1527088509825; Wed, 23 May 2018 08:15:09 -0700 (PDT) Received: from localhost.localdomain ([64.64.108.17]) by smtp.gmail.com with ESMTPSA id s16-v6sm30466511pfm.114.2018.05.23.08.15.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 May 2018 08:15:08 -0700 (PDT) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Wed, 23 May 2018 23:14:52 +0800 Message-Id: <1527088497-495-2-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> References: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v5 1/6] Platform/Hisilicon/HiKey960: add gpio platform driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add gpio platform driver to enable GPIO in HiKey960 platform. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang Reviewed-by: Leif Lindholm --- Platform/Hisilicon/HiKey960/HiKey960.dsc | 1 + Platform/Hisilicon/HiKey960/HiKey960.fdf | 1 + 2 files changed, 2 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey960/HiKey960.dsc b/Platform/Hisilicon/HiKey960/HiKey960.dsc index 36f43956ab40..3da1b8556321 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.dsc +++ b/Platform/Hisilicon/HiKey960/HiKey960.dsc @@ -179,6 +179,7 @@ [Components.common] # # GPIO # + Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # diff --git a/Platform/Hisilicon/HiKey960/HiKey960.fdf b/Platform/Hisilicon/HiKey960/HiKey960.fdf index 655032a36c53..162dbaaf2646 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.fdf +++ b/Platform/Hisilicon/HiKey960/HiKey960.fdf @@ -120,6 +120,7 @@ [FV.FvMain] # # GPIO # + INF Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # From patchwork Wed May 23 15:14:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 136672 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1023480lji; Wed, 23 May 2018 08:15:16 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrVufnVh/PKFGspUuz1JWifSnx0r6Dpqzo2YbDlbFOaVRtjIskz2eflfz94uQTHAwCEL2Q6 X-Received: by 2002:a65:4acc:: with SMTP id c12-v6mr2633353pgu.329.1527088515862; Wed, 23 May 2018 08:15:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527088515; cv=none; d=google.com; s=arc-20160816; b=JBKkiDL0meqg2k8mXkDy3b8C9U2G9LZr8J8Vi6lHj5ycE0RbmXM7xHnIriNW4QSJcJ JzFsGNMMD+EKomC/byT+ZmDNUSZ396//mWqMhoWAnLRVDjARRX+ZOMO0orGjIIeMHH57 a2BejPm+dhXaknhEKOAqigY4WcY6i7iG8hfA0Gpv+P6PfTXIiJsafnoA1dM9+b7x62lt tdTW82wXERyE0fBFH2l5hEzg9n0jxs8Fq/qLOGJF28LFjozVh3rpiMAx7LVSpBuJw/dI KdSTucATCWoPLu8ErHJC7LQ35scLXU1pi3ntLV6wYmkI1bk0r6oEYl84sOCN8XUx2U4p Mokw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=SxX/YdrYSjfAgVDvdyD/r8UQgOJISip4zvWfSaOcviA=; b=TILAOmud3ZYVz5E4zzWGI1WckBZuMfLIbouMavm52wazWtIAgkAJpgbJBHqbzz+73X EdKZNP5GlBJ1Pkmq3cS+w9CKKuakiCfD0vJm+eRDGbnrnIv9kIW8e9syG/Ci4Tzw+oBh Y2lKat2soYN47aOJ/3v92EqYQCOoB9/Z7jUKVGwChHVlLt9LcEz7gOXC6jPRehLzwQ8K UP1WfePhUmlu5/H0YdFVmnCrXJoXBHv2aPzHfOsxOoSH0GVAgJI5CXdZABDliYbi4Dv1 Tw/rgzpWcAb61vlPrQRzUtvOBzj1XbG8VSiVlpypKC++LlpmlraTJ40XwPzy2cotdyVd xQTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=CUhLxdaD; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id n187-v6si4363212pga.267.2018.05.23.08.15.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 08:15:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=CUhLxdaD; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 6AB06207E4DFC; Wed, 23 May 2018 08:15:15 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::242; helo=mail-pl0-x242.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x242.google.com (mail-pl0-x242.google.com [IPv6:2607:f8b0:400e:c01::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5D6DC209603DB for ; Wed, 23 May 2018 08:15:14 -0700 (PDT) Received: by mail-pl0-x242.google.com with SMTP id c19-v6so13218453pls.6 for ; Wed, 23 May 2018 08:15:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=iXVNjX60T6uu5X3NqUGJzvo9k+SWuDBkGtU4JvBkOjY=; b=CUhLxdaDDRpbDilwaLBO5H4HcLFHVjimCc5iaQGzLzVzHbhXyodj0ut6Nw7sfBFwla uEgQXUx8uBFTIjNdvLMCUqsWmWYUozTM9yhzcdjgtkN+DuqxMct5g/UBEhzAmf3bsbv5 5M4cDwqR3YAIJoghIP71/77+ElNvMHP7CanvU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iXVNjX60T6uu5X3NqUGJzvo9k+SWuDBkGtU4JvBkOjY=; b=UlE2B7E7fyyVGQmkUfCZMdCE9vBUz7reC435blmWDB5rgWoub0HRKP2lzWdI/IDYgG lMwTsmNyvSU4YOZDr0iDjzoRH2jLKGgvxSq5MZVJ8LtRRulgKRDb44mtVwhMLGScKYk1 IF+rOfytZY0EIDuEa5iJD8V6WZmjHHZpSfF9Fa5hIe08av6cdkOWm7mPMBHFfB/sp0t+ gi73av8d7JqbB7uChConPHXGFDko4ieQdGE9fgB39W73AX2g/ihSFf/NG5jkktR/30zt rKZfaYzZw30qSufkdT/MvAOZ4d1hfjRnP2w6F8nGGzMQq530GqkFpbbHXZrkgJhBrwWB zYUw== X-Gm-Message-State: ALKqPwcoCePGyFRgZ8oxw1R7zEr9ApGBnAA+NO6u9ZEfEKx6pLlKbLfh DuUI8qZsj0/MICR4PJCUjQT8iV5sJBc= X-Received: by 2002:a17:902:6a85:: with SMTP id n5-v6mr3351111plk.288.1527088513278; Wed, 23 May 2018 08:15:13 -0700 (PDT) Received: from localhost.localdomain ([64.64.108.17]) by smtp.gmail.com with ESMTPSA id s16-v6sm30466511pfm.114.2018.05.23.08.15.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 May 2018 08:15:12 -0700 (PDT) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Wed, 23 May 2018 23:14:53 +0800 Message-Id: <1527088497-495-3-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> References: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v5 2/6] Platform/HiKey960: do basic initialization X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Do some basic initliazation on peripherals, such as pins and regulators. The hardcoding code is taken from non-open reference code. Can't fix it for lack of documents. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey960/HiKey960.dsc | 2 + Platform/Hisilicon/HiKey960/HiKey960.fdf | 2 + .../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c | 198 +++++++++++++++++++++ .../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h | 37 ++++ .../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf | 47 +++++ Silicon/Hisilicon/Hi3660/Hi3660.dec | 32 ++++ Silicon/Hisilicon/Hi3660/Include/Hi3660.h | 195 ++++++++++++++++++++ 7 files changed, 513 insertions(+) create mode 100644 Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c create mode 100644 Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h create mode 100644 Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf create mode 100644 Silicon/Hisilicon/Hi3660/Hi3660.dec create mode 100644 Silicon/Hisilicon/Hi3660/Include/Hi3660.h -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey960/HiKey960.dsc b/Platform/Hisilicon/HiKey960/HiKey960.dsc index 3da1b8556321..6cc1c1edf453 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.dsc +++ b/Platform/Hisilicon/HiKey960/HiKey960.dsc @@ -182,6 +182,8 @@ [Components.common] Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf + # # USB Host Support # diff --git a/Platform/Hisilicon/HiKey960/HiKey960.fdf b/Platform/Hisilicon/HiKey960/HiKey960.fdf index 162dbaaf2646..b7d70b010598 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.fdf +++ b/Platform/Hisilicon/HiKey960/HiKey960.fdf @@ -123,6 +123,8 @@ [FV.FvMain] INF Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + INF Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf + # # USB Host Support # diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c new file mode 100644 index 000000000000..7c1705241e88 --- /dev/null +++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c @@ -0,0 +1,198 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "HiKey960Dxe.h" + +STATIC +VOID +InitSdCard ( + IN VOID + ) +{ + UINT32 Data; + + // + // LDO16 + // 000: 1.75V, 001: 1.8V, 010: 2.4V, 011: 2.6V, 100: 2.7V, + // 101: 2.85V, 110: 2.95V, 111: 3.0V. + // + Data = MmioRead32 (PMIC_LDO16_VSET_REG) & LDO16_VSET_MASK; + Data |= 6; + MmioWrite32 (PMIC_LDO16_VSET_REG, Data); + MmioOr32 (PMIC_LDO16_ONOFF_ECO_REG, LDO16_ONOFF_ECO_LDO16_ENABLE); + // + // wait regulator stable + // + MicroSecondDelay (100); + + // + // LDO9 + // 000: 1.75V, 001: 1.8V, 010: 1.825V, 011: 2.8V, 100: 2.85V, + // 101: 2.95V, 110: 3.0V, 111: 3.3V. + // + Data = MmioRead32 (PMIC_LDO9_VSET_REG) & LDO9_VSET_MASK; + Data |= 5; + MmioWrite32 (PMIC_LDO9_VSET_REG, Data); + MmioOr32 (PMU_REG_BASE + (0x6a << 2), 2); + // + // wait regulator stable + // + MicroSecondDelay (100); + + // + // GPIO203 + // + MmioWrite32 (IOMG_AO_REG_BASE + (24 << 2), 0); // GPIO function + + // + // SD pinmux + // + MmioWrite32 (IOMG_MMC0_000_REG, IOMG_FUNC1); // SD_CLK + MmioWrite32 (IOMG_MMC0_001_REG, IOMG_FUNC1); // SD_CMD + MmioWrite32 (IOMG_MMC0_002_REG, IOMG_FUNC1); // SD_DATA0 + MmioWrite32 (IOMG_MMC0_003_REG, IOMG_FUNC1); // SD_DATA1 + MmioWrite32 (IOMG_MMC0_004_REG, IOMG_FUNC1); // SD_DATA2 + MmioWrite32 (IOMG_MMC0_005_REG, IOMG_FUNC1); // SD_DATA3 + MmioWrite32 (IOCG_MMC0_000_REG, IOCG_DRIVE (15)); // SD_CLK float with 32mA + MmioWrite32 (IOCG_MMC0_001_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_CMD + MmioWrite32 (IOCG_MMC0_002_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_DATA0 + MmioWrite32 (IOCG_MMC0_003_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_DATA1 + MmioWrite32 (IOCG_MMC0_004_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_DATA2 + MmioWrite32 (IOCG_MMC0_005_REG, IOCG_PULLUP | IOCG_DRIVE (8)); // SD_DATA3 + + // + // SC_SEL_SD: + // 0xx: 3.2MHz, 100: PPLL0, 101: PPLL1, 11x: PPLL2. + // SC_DIV_SD: + // divider = value + 1 + // + do { + MmioOr32 ( + CRG_CLKDIV4, + CLKDIV4_SC_SEL_SD (7) | + (CLKDIV4_SC_SEL_SD_MASK << CLKDIV4_SC_MASK_SHIFT) + ); + Data = MmioRead32 (CRG_CLKDIV4) & CLKDIV4_SC_SEL_SD_MASK; + } while (Data != CLKDIV4_SC_SEL_SD (7)); + + // + // Unreset SD controller + // + MmioWrite32 (CRG_PERRSTDIS4, PERRSTEN4_SD); + do { + Data = MmioRead32 (CRG_PERRSTSTAT4); + } while ((Data & PERRSTEN4_SD) == PERRSTEN4_SD); + // + // Enable SD controller clock + // + MmioOr32 (CRG_PEREN0, PEREN0_GT_HCLK_SD); + MmioOr32 (CRG_PEREN4, PEREN4_GT_CLK_SD); + do { + Data = MmioRead32 (CRG_PERCLKEN4); + } while ((Data & PEREN4_GT_CLK_SD) != PEREN4_GT_CLK_SD); +} + +VOID +InitPeripherals ( + IN VOID + ) +{ + // + // Enable FPLL0 + // + MmioOr32 (SCTRL_SCFPLLCTRL0, SCTRL_SCFPLLCTRL0_FPLL0_EN); + + InitSdCard (); + + // + // Enable wifi clock + // + MmioOr32 (PMIC_HARDWARE_CTRL0, PMIC_HARDWARE_CTRL0_WIFI_CLK); + MmioOr32 (PMIC_OSC32K_ONOFF_CTRL, PMIC_OSC32K_ONOFF_CTRL_EN_32K); +} + +/** + Notification function of the event defined as belonging to the + EFI_END_OF_DXE_EVENT_GROUP_GUID event group that was created in + the entry point of the driver. + + This function is called when an event belonging to the + EFI_END_OF_DXE_EVENT_GROUP_GUID event group is signalled. Such an + event is signalled once at the end of the dispatching of all + drivers (end of the so called DXE phase). + + @param[in] Event Event declared in the entry point of the driver whose + notification function is being invoked. + @param[in] Context NULL +**/ +STATIC +VOID +OnEndOfDxe ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + UINT32 BootMode; + CHAR8 Buf[64]; + UINTN Count; + + BootMode = MmioRead32 (SCTRL_BAK_DATA0) & BOOT_MODE_MASK; + if (BootMode == BOOT_MODE_RECOVERY) { + Count = AsciiSPrint ( + Buf, + 64, + "WARNING: CAN NOT BOOT KERNEL IN RECOVERY MODE!\n" + ); + SerialPortWrite ((UINT8 *)Buf, Count); + Count = AsciiSPrint ( + Buf, + 64, + "Switch to normal boot mode, then reboot to boot kernel.\n" + ); + SerialPortWrite ((UINT8 *)Buf, Count); + } +} + +EFI_STATUS +EFIAPI +HiKey960EntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_EVENT EndOfDxeEvent; + + InitPeripherals (); + + // + // Create an event belonging to the "gEfiEndOfDxeEventGroupGuid" group. + // The "OnEndOfDxe()" function is declared as the call back function. + // It will be called at the end of the DXE phase when an event of the + // same group is signalled to inform about the end of the DXE phase. + // Install the INSTALL_FDT_PROTOCOL protocol. + // + Status = gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_CALLBACK, + OnEndOfDxe, + NULL, + &gEfiEndOfDxeEventGroupGuid, + &EndOfDxeEvent + ); + if (EFI_ERROR (Status)) { + return Status; + } + return Status; +} diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h new file mode 100644 index 000000000000..9a4c66f42c50 --- /dev/null +++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h @@ -0,0 +1,37 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HIKEY960DXE_H__ +#define __HIKEY960DXE_H__ + +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum { + BOOT_MODE_RECOVERY = 0, + BOOT_MODE_MASK = 1, +}; + +#endif /* __HIKEY960DXE_H__ */ diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf new file mode 100644 index 000000000000..a1a7d005ce8b --- /dev/null +++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf @@ -0,0 +1,47 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x0001001a + BASE_NAME = HiKey960Dxe + FILE_GUID = 6d824b2c-640e-4643-b9f2-9c09e8bff429 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKey960EntryPoint + +[Sources.common] + HiKey960Dxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Hisilicon/Hi3660/Hi3660.dec + +[LibraryClasses] + BaseMemoryLib + CacheMaintenanceLib + DxeServicesTableLib + IoLib + PcdLib + TimerLib + UefiDriverEntryPoint + UefiLib + +[Protocols] + gEmbeddedGpioProtocolGuid + +[Guids] + gEfiEndOfDxeEventGroupGuid + +[Depex] + TRUE diff --git a/Silicon/Hisilicon/Hi3660/Hi3660.dec b/Silicon/Hisilicon/Hi3660/Hi3660.dec new file mode 100644 index 000000000000..72de61e0635c --- /dev/null +++ b/Silicon/Hisilicon/Hi3660/Hi3660.dec @@ -0,0 +1,32 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + DEC_SPECIFICATION = 0x0001001a + PACKAGE_NAME = Hi3660 + PACKAGE_GUID = e457ba7c-faba-4dea-b274-f5962d016c79 + PACKAGE_VERSION = 0.1 + +################################################################################ +# +# Include Section - list of Include Paths that are provided by this package. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +################################################################################ +[Includes.common] + Include # Root include for the package + +[Guids.common] + gHi3660TokenSpaceGuid = { 0x4abc73fa, 0x8a49, 0x4d2c, { 0x95, 0x44, 0x17, 0x87, 0x29, 0x06, 0x20, 0xb4 } } diff --git a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h new file mode 100644 index 000000000000..5fbf32267657 --- /dev/null +++ b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h @@ -0,0 +1,195 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HI3660_H__ +#define __HI3660_H__ + +#define HKADC_SSI_REG_BASE 0xE82B8000 + +#define PCTRL_REG_BASE 0xE8A09000 + +#define PCTRL_CTRL3 (PCTRL_REG_BASE + 0x010) +#define PCTRL_CTRL24 (PCTRL_REG_BASE + 0x064) + +#define PCTRL_CTRL3_USB_TXCO_EN (1 << 1) +#define PCTRL_CTRL24_USB3PHY_3MUX1_SEL (1 << 25) + +#define SCTRL_REG_BASE 0xFFF0A000 + +#define SCTRL_SCFPLLCTRL0 (SCTRL_REG_BASE + 0x120) +#define SCTRL_SCFPLLCTRL0_FPLL0_EN (1 << 0) + +#define SCTRL_BAK_DATA0 (SCTRL_REG_BASE + 0x40C) + +#define USB3OTG_BC_REG_BASE 0xFF200000 + +#define USB3OTG_CTRL0 (USB3OTG_BC_REG_BASE + 0x000) +#define USB3OTG_CTRL2 (USB3OTG_BC_REG_BASE + 0x008) +#define USB3OTG_CTRL3 (USB3OTG_BC_REG_BASE + 0x00C) +#define USB3OTG_CTRL4 (USB3OTG_BC_REG_BASE + 0x010) +#define USB3OTG_CTRL6 (USB3OTG_BC_REG_BASE + 0x018) +#define USB3OTG_CTRL7 (USB3OTG_BC_REG_BASE + 0x01C) +#define USB3OTG_PHY_CR_STS (USB3OTG_BC_REG_BASE + 0x050) +#define USB3OTG_PHY_CR_CTRL (USB3OTG_BC_REG_BASE + 0x054) + +#define USB3OTG_CTRL0_SC_USB3PHY_ABB_GT_EN (1 << 15) +#define USB3OTG_CTRL2_TEST_POWERDOWN_SSP (1 << 1) +#define USB3OTG_CTRL2_TEST_POWERDOWN_HSP (1 << 0) +#define USB3OTG_CTRL3_VBUSVLDEXT (1 << 6) +#define USB3OTG_CTRL3_VBUSVLDEXTSEL (1 << 5) +#define USB3OTG_CTRL7_REF_SSP_EN (1 << 16) +#define USB3OTG_PHY_CR_DATA_OUT(x) (((x) & 0xFFFF) << 1) +#define USB3OTG_PHY_CR_ACK (1 << 0) +#define USB3OTG_PHY_CR_DATA_IN(x) (((x) & 0xFFFF) << 4) +#define USB3OTG_PHY_CR_WRITE (1 << 3) +#define USB3OTG_PHY_CR_READ (1 << 2) +#define USB3OTG_PHY_CR_CAP_DATA (1 << 1) +#define USB3OTG_PHY_CR_CAP_ADDR (1 << 0) + +#define PMU_REG_BASE 0xFFF34000 +#define PMIC_LDO9_VSET_REG (PMU_REG_BASE + (0x068 << 2)) +#define LDO9_VSET_MASK (7 << 0) + +#define PMIC_LDO16_ONOFF_ECO_REG (PMU_REG_BASE + (0x078 << 2)) +#define LDO16_ONOFF_ECO_LDO16_ENABLE BIT1 +#define LDO16_ONOFF_ECO_ECO_ENABLE BIT0 + +#define PMIC_LDO16_VSET_REG (PMU_REG_BASE + (0x079 << 2)) +#define LDO16_VSET_MASK (7 << 0) + +#define PMIC_HARDWARE_CTRL0 (PMU_REG_BASE + (0x0C5 << 2)) +#define PMIC_OSC32K_ONOFF_CTRL (PMU_REG_BASE + (0x0CC << 2)) + +#define PMIC_HARDWARE_CTRL0_WIFI_CLK (1 << 5) +#define PMIC_OSC32K_ONOFF_CTRL_EN_32K (1 << 1) + + +#define CRG_REG_BASE 0xFFF35000 + +#define CRG_PEREN0 (CRG_REG_BASE + 0x000) +#define CRG_PEREN2 (CRG_REG_BASE + 0x020) +#define CRG_PERDIS2 (CRG_REG_BASE + 0x024) +#define CRG_PERCLKEN2 (CRG_REG_BASE + 0x028) +#define CRG_PERSTAT2 (CRG_REG_BASE + 0x02C) +#define CRG_PEREN4 (CRG_REG_BASE + 0x040) +#define CRG_PERDIS4 (CRG_REG_BASE + 0x044) +#define CRG_PERCLKEN4 (CRG_REG_BASE + 0x048) +#define CRG_PERSTAT4 (CRG_REG_BASE + 0x04C) +#define CRG_PERRSTEN2 (CRG_REG_BASE + 0x078) +#define CRG_PERRSTDIS2 (CRG_REG_BASE + 0x07C) +#define CRG_PERRSTSTAT2 (CRG_REG_BASE + 0x080) +#define CRG_PERRSTEN3 (CRG_REG_BASE + 0x084) +#define CRG_PERRSTDIS3 (CRG_REG_BASE + 0x088) +#define CRG_PERRSTSTAT3 (CRG_REG_BASE + 0x08C) +#define CRG_PERRSTEN4 (CRG_REG_BASE + 0x090) +#define CRG_PERRSTDIS4 (CRG_REG_BASE + 0x094) +#define CRG_PERRSTSTAT4 (CRG_REG_BASE + 0x098) +#define CRG_CLKDIV4 (CRG_REG_BASE + 0x0B8) +#define CRG_ISOEN (CRG_REG_BASE + 0x144) +#define CRG_ISODIS (CRG_REG_BASE + 0x148) +#define CRG_ISOSTAT (CRG_REG_BASE + 0x14C) + +#define PERI_UFS_BIT (1 << 12) +#define PERI_ARST_UFS_BIT (1 << 7) + +#define PEREN0_GT_HCLK_SD BIT30 + +#define PEREN2_HKADCSSI BIT24 + +#define PEREN4_GT_CLK_SD BIT17 +#define PEREN4_GT_ACLK_USB3OTG (1 << 1) +#define PEREN4_GT_CLK_USB3OTG_REF (1 << 0) + +#define PERRSTEN2_HKADCSSI BIT24 + +#define PERRSTEN4_SD BIT18 + +#define PERRSTEN4_USB3OTG_MUX (1 << 8) +#define PERRSTEN4_USB3OTG_AHBIF (1 << 7) +#define PERRSTEN4_USB3OTG_32K (1 << 6) +#define PERRSTEN4_USB3OTG (1 << 5) +#define PERRSTEN4_USB3OTGPHY_POR (1 << 3) + +#define PERISOEN_USB_REFCLK_ISO_EN (1 << 25) + +#define CLKDIV4_SC_SEL_SD_MASK (7 << 4) +#define CLKDIV4_SC_DIV_SD_MASK 0xf +#define CLKDIV4_SC_MASK_SHIFT 16 +#define CLKDIV4_SC_SEL_SD(x) (((x) & 0x7) << 4) +#define CLKDIV4_SC_DIV_SD(x) ((x) & 0xf) + +#define CRG_CLKDIV16_OFFSET 0x0E8 +#define SC_DIV_UFSPHY_CFG_MASK (0x3 << 9) +#define SC_DIV_UFSPHY_CFG(x) (((x) & 0x3) << 9) + +#define CRG_CLKDIV17_OFFSET 0x0EC +#define SC_DIV_UFS_PERIBUS (1 << 14) + +#define IOMG_MMC0_REG_BASE 0xFF37E000 +#define IOMG_MMC0_000_REG (IOMG_MMC0_REG_BASE + 0x000) +#define IOMG_MMC0_001_REG (IOMG_MMC0_REG_BASE + 0x004) +#define IOMG_MMC0_002_REG (IOMG_MMC0_REG_BASE + 0x008) +#define IOMG_MMC0_003_REG (IOMG_MMC0_REG_BASE + 0x00C) +#define IOMG_MMC0_004_REG (IOMG_MMC0_REG_BASE + 0x010) +#define IOMG_MMC0_005_REG (IOMG_MMC0_REG_BASE + 0x014) + +#define IOCG_MMC0_REG_BASE 0xFF37E800 +#define IOCG_MMC0_000_REG (IOCG_MMC0_REG_BASE + 0x000) +#define IOCG_MMC0_001_REG (IOCG_MMC0_REG_BASE + 0x004) +#define IOCG_MMC0_002_REG (IOCG_MMC0_REG_BASE + 0x008) +#define IOCG_MMC0_003_REG (IOCG_MMC0_REG_BASE + 0x00C) +#define IOCG_MMC0_004_REG (IOCG_MMC0_REG_BASE + 0x010) +#define IOCG_MMC0_005_REG (IOCG_MMC0_REG_BASE + 0x014) + +#define IOMG_AO_REG_BASE 0xFFF11000 +#define IOMG_AO_006_REG (IOMG_AO_REG_BASE + 0x018) + +#define IOMG_FUNC0 0 +#define IOMG_FUNC1 1 +#define IOCG_PULLUP BIT0 +#define IOCG_PULLDOWN BIT1 +#define IOCG_DRIVE(x) ((x) << 4) + +#define UFS_SYS_REG_BASE 0xFF3B1000 + +#define UFS_SYS_PSW_POWER_CTRL_OFFSET 0x004 +#define UFS_SYS_PHY_ISO_EN_OFFSET 0x008 +#define UFS_SYS_HC_LP_CTRL_OFFSET 0x00C +#define UFS_SYS_PHY_CLK_CTRL_OFFSET 0x010 +#define UFS_SYS_PSW_CLK_CTRL_OFFSET 0x014 +#define UFS_SYS_CLOCK_GATE_BYPASS_OFFSET 0x018 +#define UFS_SYS_RESET_CTRL_EN_OFFSET 0x01C +#define UFS_SYS_MONITOR_HH_OFFSET 0x03C +#define UFS_SYS_UFS_SYSCTRL_OFFSET 0x05C +#define UFS_SYS_UFS_DEVICE_RESET_CTRL_OFFSET 0x060 +#define UFS_SYS_UFS_APB_ADDR_MASK_OFFSET 0x064 + +#define BIT_UFS_PSW_ISO_CTRL (1 << 16) +#define BIT_UFS_PSW_MTCMOS_EN (1 << 0) +#define BIT_UFS_REFCLK_ISO_EN (1 << 16) +#define BIT_UFS_PHY_ISO_CTRL (1 << 0) +#define BIT_SYSCTRL_LP_ISOL_EN (1 << 16) +#define BIT_SYSCTRL_PWR_READY (1 << 8) +#define BIT_SYSCTRL_REF_CLOCK_EN (1 << 24) +#define MASK_SYSCTRL_REF_CLOCK_SEL (3 << 8) +#define MASK_SYSCTRL_CFG_CLOCK_FREQ (0xFF) +#define BIT_SYSCTRL_PSW_CLK_EN (1 << 4) +#define MASK_UFS_CLK_GATE_BYPASS (0x3F) +#define BIT_SYSCTRL_LP_RESET_N (1 << 0) +#define BIT_UFS_REFCLK_SRC_SE1 (1 << 0) +#define MASK_UFS_SYSCTRL_BYPASS (0x3F << 16) +#define MASK_UFS_DEVICE_RESET (1 << 16) +#define BIT_UFS_DEVICE_RESET (1 << 0) + +#endif /* __HI3660_H__ */ From patchwork Wed May 23 15:14:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 136673 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1023553lji; Wed, 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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id 3-v6si19775216pla.38.2018.05.23.08.15.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 08:15:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ZUTbK6zW; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 9BECB207E4E0A; Wed, 23 May 2018 08:15:18 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::242; helo=mail-pl0-x242.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x242.google.com (mail-pl0-x242.google.com [IPv6:2607:f8b0:400e:c01::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id ED06F209603DB for ; Wed, 23 May 2018 08:15:16 -0700 (PDT) Received: by mail-pl0-x242.google.com with SMTP id c11-v6so13227374plr.5 for ; Wed, 23 May 2018 08:15:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vlaXv4q1f40Zor/7FHBKvNJMa0A+iY9rRNtWXwhguok=; b=ZUTbK6zWAEIk4kSqabKkzFCFxC4CX4PWsZzDtz2VNOPPlDjMSlspXiIrOmBEq6HIp1 RUaPkYg2BUs3yBs7XS/uGethkWwajVqLkfdNBR/Zj/qwGWr3C0ZvLaQdRvsyFgvvg75I Dl9MxmsJDywTb3SeijDNgGHOVTR5WwJQEBxEE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vlaXv4q1f40Zor/7FHBKvNJMa0A+iY9rRNtWXwhguok=; b=cOvcrTQEhJDoTWknQhrQm0lri0khgeME45Vt2hsMorm2yNxaLl74qsyQ685tlnVVrh MSOGFDiefambwK6f36C+XrIJpzFbRfHdsiKTEbDxSho3FZWCSpxYfpA2alB+YNeNbJJr zQ2c+6ktux8Qa+WVCNptGrkSiTMjwqTG/jiSVYbmRMyGvRSXNFraRc9u9Zcneq/b+BK5 XHnUJUbzS9vd0pZ14E383BmNNdiP6xpta6U7S4LDtv89aLlVyHEhAyykawkt7tZ9Z+Dd 487vnt4M99tGr5a853HSsmVQ3X7MqSKODF9JnVDx0OAuti5P9tF/bqYgRpTmgLmZKbMy 4jUg== X-Gm-Message-State: ALKqPwcIb5MZ+mi2I6tExH+6iToN7pn065ztXlTih92OhI52WFekBX24 XEgMJ9pY9D4b+UYYK0+RumTs3dcAsgA= X-Received: by 2002:a17:902:aa03:: with SMTP id be3-v6mr3358144plb.61.1527088516365; Wed, 23 May 2018 08:15:16 -0700 (PDT) Received: from localhost.localdomain ([64.64.108.17]) by smtp.gmail.com with ESMTPSA id s16-v6sm30466511pfm.114.2018.05.23.08.15.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 May 2018 08:15:15 -0700 (PDT) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Wed, 23 May 2018 23:14:54 +0800 Message-Id: <1527088497-495-4-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> References: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v5 3/6] Platform/HiKey960: enable virtual keyboard X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Enable virtual keyboard on HiKey960 platform. It checks two conditions, such as pattern in memory and GPIO pin setting. Since code is ported from non-open The hardcoding code is taken from non-open reference code. Can't fix it for lack of documents. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey960/HiKey960.dsc | 5 ++ Platform/Hisilicon/HiKey960/HiKey960.fdf | 5 ++ .../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c | 97 ++++++++++++++++++++++ .../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h | 10 +++ .../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf | 1 + 5 files changed, 118 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey960/HiKey960.dsc b/Platform/Hisilicon/HiKey960/HiKey960.dsc index 6cc1c1edf453..79e68754976d 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.dsc +++ b/Platform/Hisilicon/HiKey960/HiKey960.dsc @@ -182,6 +182,11 @@ [Components.common] Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + # + # Virtual Keyboard + # + EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf # diff --git a/Platform/Hisilicon/HiKey960/HiKey960.fdf b/Platform/Hisilicon/HiKey960/HiKey960.fdf index b7d70b010598..d65f77878575 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.fdf +++ b/Platform/Hisilicon/HiKey960/HiKey960.fdf @@ -123,6 +123,11 @@ [FV.FvMain] INF Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + INF Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf # diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c index 7c1705241e88..7ff2f118128d 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c +++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c @@ -14,6 +14,8 @@ #include "HiKey960Dxe.h" +STATIC EMBEDDED_GPIO *mGpio; + STATIC VOID InitSdCard ( @@ -166,6 +168,94 @@ OnEndOfDxe ( EFI_STATUS EFIAPI +VirtualKeyboardRegister ( + IN VOID + ) +{ + EFI_STATUS Status; + + Status = gBS->LocateProtocol ( + &gEmbeddedGpioProtocolGuid, + NULL, + (VOID **) &mGpio + ); + if (EFI_ERROR (Status)) { + return Status; + } + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardReset ( + IN VOID + ) +{ + EFI_STATUS Status; + + if (mGpio == NULL) { + return EFI_INVALID_PARAMETER; + } + // + // Configure GPIO68 as GPIO function + // + MmioWrite32 (0xe896c108, 0); + Status = mGpio->Set (mGpio, DETECT_SW_FASTBOOT, GPIO_MODE_INPUT); + return Status; +} + +BOOLEAN +EFIAPI +VirtualKeyboardQuery ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + EFI_STATUS Status; + UINTN Value = 0; + + if ((VirtualKey == NULL) || (mGpio == NULL)) { + return FALSE; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + goto Done; + } else { + Status = mGpio->Get (mGpio, DETECT_SW_FASTBOOT, &Value); + if (EFI_ERROR (Status) || (Value != 0)) { + return FALSE; + } + } +Done: + VirtualKey->Signature = VIRTUAL_KEYBOARD_KEY_SIGNATURE; + VirtualKey->Key.ScanCode = SCAN_NULL; + VirtualKey->Key.UnicodeChar = L'f'; + return TRUE; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardClear ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + if (VirtualKey == NULL) { + return EFI_INVALID_PARAMETER; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + MmioWrite32 (ADB_REBOOT_ADDRESS, ADB_REBOOT_NONE); + WriteBackInvalidateDataCacheRange ((VOID *)ADB_REBOOT_ADDRESS, 4); + } + return EFI_SUCCESS; +} + +PLATFORM_VIRTUAL_KBD_PROTOCOL mVirtualKeyboard = { + VirtualKeyboardRegister, + VirtualKeyboardReset, + VirtualKeyboardQuery, + VirtualKeyboardClear +}; + +EFI_STATUS +EFIAPI HiKey960EntryPoint ( IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable @@ -194,5 +284,12 @@ HiKey960EntryPoint ( if (EFI_ERROR (Status)) { return Status; } + + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gPlatformVirtualKeyboardProtocolGuid, + EFI_NATIVE_INTERFACE, + &mVirtualKeyboard + ); return Status; } diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h index 9a4c66f42c50..211eea55aa54 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h +++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.h @@ -21,6 +21,7 @@ #include #include +#include #include #include #include @@ -29,6 +30,15 @@ #include #include +#include +#include + +#define ADB_REBOOT_ADDRESS 0x32100000 +#define ADB_REBOOT_BOOTLOADER 0x77665500 +#define ADB_REBOOT_NONE 0x77665501 + +#define DETECT_SW_FASTBOOT 68 // GPIO8_4 + enum { BOOT_MODE_RECOVERY = 0, BOOT_MODE_MASK = 1, diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf index a1a7d005ce8b..46a9a5803e3d 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf +++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf @@ -39,6 +39,7 @@ [LibraryClasses] [Protocols] gEmbeddedGpioProtocolGuid + gPlatformVirtualKeyboardProtocolGuid [Guids] gEfiEndOfDxeEventGroupGuid From patchwork Wed May 23 15:14:55 2018 Content-Type: text/plain; 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[198.145.21.10]) by mx.google.com with ESMTPS id 189-v6si15130355pgi.254.2018.05.23.08.15.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 08:15:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=P53EAOk/; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C6D9C207E4E0D; Wed, 23 May 2018 08:15:21 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::244; helo=mail-pl0-x244.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x244.google.com (mail-pl0-x244.google.com [IPv6:2607:f8b0:400e:c01::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 07BC1209603DB for ; Wed, 23 May 2018 08:15:20 -0700 (PDT) Received: by mail-pl0-x244.google.com with SMTP id w19-v6so13217796plq.4 for ; Wed, 23 May 2018 08:15:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9CGbBwVxG7sKC8oXitbv4nAWzEZFKoIjig+wo75Z7a0=; b=P53EAOk//hHjasy3BBf446hHcjbSvBxweJ1Sx0rVb6SHyytn8FO9CSwTdVPuaVxW6I ofvWwYTsKUIdtpz9liSmKeI/9+KCUJrNUxTYKjw2Iu3FrTJVw8xOqjYZ/pqtsnMHAxmH Y92bGtzaV11TDGhKgUzB/bKLN24LmFcyxgo54= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9CGbBwVxG7sKC8oXitbv4nAWzEZFKoIjig+wo75Z7a0=; b=EejlJPRIs9YZf2GBMUHFuc5/O45IPlzAP8EMatX8M481enRrOh+X1fnmNIBE1hDXBq NAF5yRYUg1cmZMBC5sP/2GZHvM+o5G8vA8TvziWl790kYENJC+v2CyMzajDtatwRvx6t JgOpENgAmVkJBZ1gxnx6E+TOTyO1iwcmwVf1Bf+X49p4y1I4QuF0kzIGwOe8JHpI0pql UMYRDtXpj1dhQnlDg385p8KaJiC5YWq65p5Z7ynL17lhLZJ2hoYJ3RZzp5iXJS8hHtD6 4SAoLWaQ5wpjcI9ZjGlXsk+0iARHqo4vgOF/lWrYiv2Oa69B1Y/9j3eQo2zjKgbSNBBC Ichg== X-Gm-Message-State: ALKqPwfJ7Va0tFaQPj29k4jTh2de9ysF6YbCAhd+GhSwWpSPO2E8tjKE Kp6b4R9VAuN1vmhpgsV8xc0VuaCSLuc= X-Received: by 2002:a17:902:2bc5:: with SMTP id l63-v6mr3282784plb.299.1527088519324; Wed, 23 May 2018 08:15:19 -0700 (PDT) Received: from localhost.localdomain ([64.64.108.17]) by smtp.gmail.com with ESMTPSA id s16-v6sm30466511pfm.114.2018.05.23.08.15.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 May 2018 08:15:18 -0700 (PDT) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Wed, 23 May 2018 23:14:55 +0800 Message-Id: <1527088497-495-5-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> References: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v5 4/6] Platform/Hisilicon/HiKey: add gpio platform driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add gpio platform driver to enable GPIO in HiKey platform. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang Reviewed-by: Leif Lindholm --- .../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c | 74 ++++++++++++++++++++++ .../Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf | 36 +++++++++++ 2 files changed, 110 insertions(+) create mode 100644 Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c create mode 100644 Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c b/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c new file mode 100644 index 000000000000..be535f8f1903 --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c @@ -0,0 +1,74 @@ +/** @file +* +* Copyright (c) 2018, Linaro. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include + +#include + +GPIO_CONTROLLER gGpioDevice[] = { + // + // { base address, gpio index, gpio count } + // + { 0xf8011000, 0, 8 }, // GPIO0 + { 0xf8012000, 8, 8 }, // GPIO1 + { 0xf8013000, 16, 8 }, // GPIO2 + { 0xf8014000, 24, 8 }, // GPIO3 + { 0xf7020000, 32, 8 }, // GPIO4 + { 0xf7021000, 40, 8 }, // GPIO5 + { 0xf7022000, 48, 8 }, // GPIO6 + { 0xf7023000, 56, 8 }, // GPIO7 + { 0xf7024000, 64, 8 }, // GPIO8 + { 0xf7025000, 72, 8 }, // GPIO9 + { 0xf7026000, 80, 8 }, // GPIO10 + { 0xf7027000, 88, 8 }, // GPIO11 + { 0xf7028000, 96, 8 }, // GPIO12 + { 0xf7029000, 104, 8 }, // GPIO13 + { 0xf702a000, 112, 8 }, // GPIO14 + { 0xf702b000, 120, 8 }, // GPIO15 + { 0xf702c000, 128, 8 }, // GPIO16 + { 0xf702d000, 136, 8 }, // GPIO17 + { 0xf702e000, 144, 8 }, // GPIO18 + { 0xf702f000, 152, 8 } // GPIO19 +}; + +PLATFORM_GPIO_CONTROLLER gPlatformGpioDevice = { + // + // { global gpio count, gpio controller counter, GPIO_CONTROLLER } + // + 160, 20, gGpioDevice +}; + +EFI_STATUS +EFIAPI +HiKeyGpioEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HANDLE Handle; + + // Install the Embedded Platform GPIO Protocol onto a new handle + Handle = NULL; + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gPlatformGpioProtocolGuid, &gPlatformGpioDevice, + NULL + ); + if (EFI_ERROR(Status)) { + Status = EFI_OUT_OF_RESOURCES; + } + + return Status; +} diff --git a/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf b/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf new file mode 100644 index 000000000000..2791b9f44cad --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf @@ -0,0 +1,36 @@ +# +# Copyright (c) 2018, Linaro. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x0001001a + BASE_NAME = HiKeyGpio + FILE_GUID = b51a851c-7bf7-463f-b261-cfb158b7f699 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKeyGpioEntryPoint + +[Sources.common] + HiKeyGpioDxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + DebugLib + UefiDriverEntryPoint + +[Protocols] + gPlatformGpioProtocolGuid + +[Depex] + TRUE From patchwork Wed May 23 15:14:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 136675 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1023724lji; Wed, 23 May 2018 08:15:26 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoHtgbyHI2YC219fJ8SUDQ8ztLjNIX87m9mNKLO4f3tjZhQRytdIhEu/XpVq7JDtP/oICQa X-Received: by 2002:a65:6648:: with SMTP id z8-v6mr2581320pgv.397.1527088526454; Wed, 23 May 2018 08:15:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527088526; cv=none; d=google.com; s=arc-20160816; b=DALDFnXNXJ4Mq/koiFJYhw3sQk6ODtHlJvWOCXjOdnRknCz/LXlwBwL/q4YTXeSdXq XDJ4cODdgJ4+B0gfbgUXOU2wnhs3ojNjhLH/xZ1uiS5+S+S0M5GH/VOQfYfCzxOhxcQS dnqnTmrmqiaqyZUVRgxuIFUuyJ6aq+gmo+r6LXKQiN4eq7GYJpAYwudUjYa1T1lM6jag 6Esf+nrPT0Qy9uJe4h+hdlmnVkwEv1dz9xaIO8mbiB6amUSTQkbnRtMGK2h/FddPCJ+g TtqhEIKANiHVRsw0xSJocc2Sk3bbvCA7y3SghTpU00FwnvYsK7sXHp8IaAy+e37coJiQ yq6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=evJKh7q6mVf4RlxpLfqaycCUfHmeM1xoLWdrDcgOum0=; b=OAhnX01Ho8J6gSCtzSe/JdlnF6hjBTuEDnJq/6zSB5nkVTKsVEFSwY3yH4ZQG1Teuq uu02cnSUovEQ3E/0Y2yPgBLJnc8hoaYaAMD6G/CsO1xSyozHnhhUZXweoN2s2/zuLnJT SywFimqrJu/9ST/LAH1AQ73tjr+yJDAZOqZKeS+D1p6K55nZXpvCIPRMq0cp2uQFOreK jRvjsev2ndjpe/+igJ3BGAoQ4TPeXLm1/4Ps4yDF/j2cNyU9hc2+IwTGilL5HPcDVvoi JD9uIw2ckfjquQTdYEwlmzt0Psb847B+NUfvJLpzKEAWTUWWLEEMBDmdB8vZuo13kY7y i5Gg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=C8Wz7MU5; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id q137-v6si19637087pfc.68.2018.05.23.08.15.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 08:15:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=C8Wz7MU5; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id EEC27207E4E14; Wed, 23 May 2018 08:15:24 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::244; helo=mail-pl0-x244.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x244.google.com (mail-pl0-x244.google.com [IPv6:2607:f8b0:400e:c01::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 52FCB207E4E14 for ; Wed, 23 May 2018 08:15:23 -0700 (PDT) Received: by mail-pl0-x244.google.com with SMTP id c19-v6so13218716pls.6 for ; Wed, 23 May 2018 08:15:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cWV8pxN8zcskUCxuTGig1nnbJ/uSJiz6wHSI/nhEVH4=; b=C8Wz7MU5ulIaOIYR7BoZdk89Z3jEZEenxXaP36Dzawwsbauj4W1lLnKRZrCeZHTcg0 Dg8h+54yPwkrIDbcBzcfD+86r5coI5YtTZSIMkemYlyzxrD/mw2I5oWIyAS1URJstjD6 VjkW3FYq61k/Th74ro+XW6ZETZfgntwDp1oDo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cWV8pxN8zcskUCxuTGig1nnbJ/uSJiz6wHSI/nhEVH4=; b=Db3ibpC+pl75ma8H42XlPaSxgr0qfF3hGuqjzhRsgRTwuNIWCqmSN7xXkrGWFIveX3 FR0co70nD6MpBIMsOtmqVxYdlhQdgpBkJRb/N6XmcSXOq4GGoLkPVKsjDGdlfVe2lsWw OGkKU67l36vE2BdtGQ42+DD5y7UsFn+tkwLM5wib7N1K2t65+wPppM3+td8y4/EatGjW 5LK05Tx4vZBwOdwd8pyUk6XssPHLU7uoaPTIZTkGbavPXRFT47+cRJZtPtH55PvkymOU fcQJIpBXn4Y+Oh10ujvRqkWRLgcdJWV5MDuYaHnsAUXIMUrVlSwGJzcArTVotLNEoEko HCRA== X-Gm-Message-State: ALKqPwe2XNFv/OvMbIHu9vewN9QKJMTye4W9Lr3n5gwOnizOyBA3OUlr E2Buj/G4RtsFDY31507XyqrHp5HDgtA= X-Received: by 2002:a17:902:1a6:: with SMTP id b35-v6mr3385231plb.80.1527088522595; Wed, 23 May 2018 08:15:22 -0700 (PDT) Received: from localhost.localdomain ([64.64.108.17]) by smtp.gmail.com with ESMTPSA id s16-v6sm30466511pfm.114.2018.05.23.08.15.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 May 2018 08:15:21 -0700 (PDT) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Wed, 23 May 2018 23:14:56 +0800 Message-Id: <1527088497-495-6-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> References: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v5 5/6] Platform/HiKey: do basic initialization on hikey X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Do some basic initialization on HiKey platform, such as pin setting, regulators and making peripherals out of reset mode. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey/HiKey.dsc | 3 + Platform/Hisilicon/HiKey/HiKey.fdf | 3 + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c | 102 ++++++++++++++++++++++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h | 31 +++++++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf | 40 +++++++++ Silicon/Hisilicon/Hi6220/Include/Hi6220.h | 6 ++ Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h | 50 +++++++++++ 7 files changed, 235 insertions(+) create mode 100644 Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c create mode 100644 Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h create mode 100644 Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf create mode 100644 Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey/HiKey.dsc b/Platform/Hisilicon/HiKey/HiKey.dsc index 5c1604d7f689..5cc4ff27f01b 100644 --- a/Platform/Hisilicon/HiKey/HiKey.dsc +++ b/Platform/Hisilicon/HiKey/HiKey.dsc @@ -189,8 +189,11 @@ [Components.common] # # GPIO # + Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf + # # MMC/SD # diff --git a/Platform/Hisilicon/HiKey/HiKey.fdf b/Platform/Hisilicon/HiKey/HiKey.fdf index 2a5c5a4d6e79..39020d27dbcd 100644 --- a/Platform/Hisilicon/HiKey/HiKey.fdf +++ b/Platform/Hisilicon/HiKey/HiKey.fdf @@ -120,8 +120,11 @@ [FV.FvMain] # # GPIO # + INF Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + INF Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf + # # Multimedia Card Interface # diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c new file mode 100644 index 000000000000..b812f8bd483d --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c @@ -0,0 +1,102 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "HiKeyDxe.h" + +STATIC +VOID +UartInit ( + IN VOID + ) +{ + UINT32 Val; + + /* make UART1 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART1); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART1); + /* make UART2 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART2); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART2); + /* make UART3 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART3); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART3); + /* make UART4 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART4); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART4); + + /* make DW_MMC2 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS0, PERIPH_RST0_MMC2); + + /* enable clock for BT/WIFI */ + Val = MmioRead32 (PMUSSI_ONOFF8_REG) | PMUSSI_ONOFF8_EN_32KB; + MmioWrite32 (PMUSSI_ONOFF8_REG, Val); +} + +STATIC +VOID +MtcmosInit ( + IN VOID + ) +{ + UINT32 Data; + + /* enable MTCMOS for GPU */ + MmioWrite32 (AO_CTRL_BASE + SC_PW_MTCMOS_EN0, PW_EN0_G3D); + do { + Data = MmioRead32 (AO_CTRL_BASE + SC_PW_MTCMOS_ACK_STAT0); + } while ((Data & PW_EN0_G3D) == 0); +} + +EFI_STATUS +HiKeyInitPeripherals ( + IN VOID + ) +{ + UINT32 Data, Bits; + + /* make I2C0/I2C1/I2C2/SPI0 out of reset */ + Bits = PERIPH_RST3_I2C0 | PERIPH_RST3_I2C1 | PERIPH_RST3_I2C2 | \ + PERIPH_RST3_SSP; + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, Bits); + + do { + Data = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_RSTSTAT3); + } while (Data & Bits); + + UartInit (); + /* MTCMOS -- Multi-threshold CMOS */ + MtcmosInit (); + + /* Set DETECT_J15_FASTBOOT (GPIO24) pin as GPIO function */ + MmioWrite32 (IOCG_084_REG, 0); /* configure GPIO24 as nopull */ + MmioWrite32 (IOMG_080_REG, 0); /* configure GPIO24 as GPIO */ + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +HiKeyEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status = HiKeyInitPeripherals (); + if (EFI_ERROR (Status)) { + return Status; + } + return Status; +} diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h new file mode 100644 index 000000000000..07f9ae6a949a --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h @@ -0,0 +1,31 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HIKEYDXE_H__ +#define __HIKEYDXE_H__ + +#include +#include +#include + +#include +#include + +#define DETECT_J15_FASTBOOT 24 // GPIO3_0 + +#define ADB_REBOOT_ADDRESS 0x05F01000 +#define ADB_REBOOT_BOOTLOADER 0x77665500 +#define ADB_REBOOT_NONE 0x77665501 + +#endif /* __HIKEYDXE_H__ */ diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf new file mode 100644 index 000000000000..34734391b45a --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf @@ -0,0 +1,40 @@ +# +# Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved. +# Copyright (c) 2018, Linaro Ltd. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x0001001a + BASE_NAME = HiKeyDxe + FILE_GUID = f567684b-1089-4214-8881-d64b20cbda2f + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKeyEntryPoint + +[Sources.common] + HiKeyDxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + DebugLib + IoLib + UefiLib + UefiDriverEntryPoint + +[Guids] + gEfiEndOfDxeEventGroupGuid + +[Depex] + TRUE diff --git a/Silicon/Hisilicon/Hi6220/Include/Hi6220.h b/Silicon/Hisilicon/Hi6220/Include/Hi6220.h index 203424adfc8b..9b2508955772 100644 --- a/Silicon/Hisilicon/Hi6220/Include/Hi6220.h +++ b/Silicon/Hisilicon/Hi6220/Include/Hi6220.h @@ -23,6 +23,12 @@ #define HI6220_PERIPH_BASE 0xF4000000 #define HI6220_PERIPH_SZ 0x05800000 +#define IOMG_BASE 0xF7010000 +#define IOMG_080_REG (IOMG_BASE + 0x140) + +#define IOCG_BASE 0xF7010800 +#define IOCG_084_REG (IOCG_BASE + 0x150) + #define PERI_CTRL_BASE 0xF7030000 #define SC_PERIPH_CTRL4 0x00C #define CTRL4_FPGA_EXT_PHY_SEL BIT3 diff --git a/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h b/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h new file mode 100644 index 000000000000..0db8af37d2d0 --- /dev/null +++ b/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h @@ -0,0 +1,50 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HI6220_REGS_PERI_H__ +#define __HI6220_REGS_PERI_H__ + +#define SC_PERIPH_CLKEN3 0x230 +#define SC_PERIPH_RSTEN3 0x330 +#define SC_PERIPH_RSTDIS0 0x304 +#define SC_PERIPH_RSTDIS3 0x334 +#define SC_PERIPH_RSTSTAT3 0x338 + +/* SC_PERIPH_RSTEN0/RSTDIS0/RSTSTAT0 */ +#define PERIPH_RST0_MMC2 (1 << 2) + +/* SC_PERIPH_RSTEN3/RSTDIS3/RSTSTAT3 */ +#define PERIPH_RST3_CSSYS (1 << 0) +#define PERIPH_RST3_I2C0 (1 << 1) +#define PERIPH_RST3_I2C1 (1 << 2) +#define PERIPH_RST3_I2C2 (1 << 3) +#define PERIPH_RST3_I2C3 (1 << 4) +#define PERIPH_RST3_UART1 (1 << 5) +#define PERIPH_RST3_UART2 (1 << 6) +#define PERIPH_RST3_UART3 (1 << 7) +#define PERIPH_RST3_UART4 (1 << 8) +#define PERIPH_RST3_SSP (1 << 9) +#define PERIPH_RST3_PWM (1 << 10) +#define PERIPH_RST3_BLPWM (1 << 11) +#define PERIPH_RST3_TSENSOR (1 << 12) +#define PERIPH_RST3_DAPB (1 << 18) +#define PERIPH_RST3_HKADC (1 << 19) +#define PERIPH_RST3_CODEC_SSI (1 << 20) +#define PERIPH_RST3_PMUSSI1 (1 << 22) + +#define PMUSSI_REG(x) (PMUSSI_BASE + ((x) << 2)) +#define PMUSSI_ONOFF8_REG (PMUSSI_BASE + (0x1c << 2)) +#define PMUSSI_ONOFF8_EN_32KB BIT6 + +#endif /* __HI6220_REGS_PERI_H__ */ From patchwork Wed May 23 15:14:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 136676 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1023815lji; Wed, 23 May 2018 08:15:30 -0700 (PDT) X-Google-Smtp-Source: AB8JxZom2bc4B7a6Y3qDgKZVGtlboJPnCQ/YcN5WNNizcsmwXVbBYfACjgcLiaCckQ8TG2MWUU2H X-Received: by 2002:a17:902:8d81:: with SMTP id v1-v6mr3316753plo.136.1527088530539; Wed, 23 May 2018 08:15:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527088530; cv=none; d=google.com; s=arc-20160816; b=StsOGt3f50ZMyHJWfFGZDbhIv4PwA172n04qm5OBXkG+bmbxrzx6sXrkhqUTQJQUGU pKhfyvT9CSJffsyutJMVzNnzhNFk2/IoWSyMUssO5z/NgQ0rfCDsV2y6CYSQ7+cOxF6v st/eAoqdni21VNOo9or2mTo7yhsB8lCfzQ4HB014Fwsi8kaDPhxBKIJVcG6kU8DVBxgN B4iqq5G+SXehs9NUMdTr/g+fnT/f5IqAmzB9nnTb85Cy2xKw2OpeSv6z9Lc3lEmbkGIB zbVGOUXtX0Q9peWtnui5syZebMcbL1LGntNtJtA9/x2cQF4o+0ghZD3o4Rh9Tl7ttK16 ZyMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=zjMeG2bF6qpAbahqslcEevDn9btNohEATggiRtIq7Mc=; b=IxN6hhs50RwnkAxvRzQSBA5WUUjfi/GtZVcn+Mk2vZOK/r8hmZiCsEyaBpN4ddcJ5S qF7yuyJOIcvWy6ZklofUpGjBL9NUb+irCvu2yuzHGA8S88KXncVheDSxl90BU3HsxRqd IEI1jBJQEuIHJzdI9Gbk6v3CJjLuaKAHbzUp5/GlUy+Gss7Ki8EubrrNAV0yHUEBSzRK Q/5+uLZ0qmWl1+FnLvLc/GQu6DheesEy7RaxdMXQOO4wHHWVTV+m+icInhLH4Cm16gOw pAsKpseULFW9vxSiM+aSiEpWc5uPXV33YCuYFiVaxGC+gzcpe0TyhMSgJkL80bLYGYAH JTew== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=RoyBUd21; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id y8-v6si14815498pgp.527.2018.05.23.08.15.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 08:15:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=RoyBUd21; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 2471D207E4E19; Wed, 23 May 2018 08:15:28 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::242; helo=mail-pl0-x242.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x242.google.com (mail-pl0-x242.google.com [IPv6:2607:f8b0:400e:c01::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1350A21BADAB2 for ; Wed, 23 May 2018 08:15:27 -0700 (PDT) Received: by mail-pl0-x242.google.com with SMTP id c41-v6so13209230plj.10 for ; Wed, 23 May 2018 08:15:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AA5C7tr5aGnWTvtVEUml9wqWmOP/fZNqVecTfznqckw=; b=RoyBUd21MqsZlOeJ4Kr13sY2Keb9qixbN20688geXZeLyJSM6E0HUj8+/IPLmwzMiJ 8j57SzF/A+q5RTiVSHF95EXRZ5zbQjycmb6RQv3gkMc7mgIIQPn+LeXmBOUy3V+XG4Zg kbrxFr3Sj46eJBw99cAB8kfU4fMWEIwKSaq3k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AA5C7tr5aGnWTvtVEUml9wqWmOP/fZNqVecTfznqckw=; b=iGVDQbtVsFyj+Y3l3C3Ymdijg4gACnBWjcvBCHcdZPgQafOw2BMCV1x+9PuzMeJTKV M4WnJSxMjULPnu2j0JGtJtnqUK2tZOD8oHOVsvlRhSGtD48ivsSNl4mzq7lssg2zf+WN jpf3ZJizrXUfqOQbKfPaFZeXnKIjoXhusIFNjh8i+2oPd82lZ1umyH/dvteNrAGi6KtO tQ0xMpjT2Xaro5kY8LdcsINUmFyZuLcLDncNpzeoncB5DyDVcr/FPGlASOSnrYYFiJUF evhcUMuLBdg9DajJdP5LJZ7YtGvLMaxTxHTBN1fNXixAP1oti5DjP8a5blFPimu69pM+ 6B4g== X-Gm-Message-State: ALKqPwckR98dLc+7qnFrPDsxuhDibPsE+LDLphvFlzB6OUalw85otJ4W /3dZQfwUGQiFf5sZdzhYf4cNRm4Pevk= X-Received: by 2002:a17:902:d882:: with SMTP id b2-v6mr3273503plz.220.1527088526492; Wed, 23 May 2018 08:15:26 -0700 (PDT) Received: from localhost.localdomain ([64.64.108.17]) by smtp.gmail.com with ESMTPSA id s16-v6sm30466511pfm.114.2018.05.23.08.15.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 May 2018 08:15:25 -0700 (PDT) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Wed, 23 May 2018 23:14:57 +0800 Message-Id: <1527088497-495-7-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> References: <1527088497-495-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v5 6/6] Platform/HiKey: enable virtual keyboard X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Enable virtual keyboard on HiKey platform. It detects the pattern in memory and GPIO pin setting, and simulates them into virtual key. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey/HiKey.dsc | 5 ++ Platform/Hisilicon/HiKey/HiKey.fdf | 5 ++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c | 93 ++++++++++++++++++++++++++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h | 5 ++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf | 5 ++ 5 files changed, 113 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey/HiKey.dsc b/Platform/Hisilicon/HiKey/HiKey.dsc index 5cc4ff27f01b..83dd68a820b1 100644 --- a/Platform/Hisilicon/HiKey/HiKey.dsc +++ b/Platform/Hisilicon/HiKey/HiKey.dsc @@ -192,6 +192,11 @@ [Components.common] Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + # + # Virtual Keyboard + # + EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf # diff --git a/Platform/Hisilicon/HiKey/HiKey.fdf b/Platform/Hisilicon/HiKey/HiKey.fdf index 39020d27dbcd..2bca7232b6e5 100644 --- a/Platform/Hisilicon/HiKey/HiKey.fdf +++ b/Platform/Hisilicon/HiKey/HiKey.fdf @@ -123,6 +123,11 @@ [FV.FvMain] INF Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + INF Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf # diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c index b812f8bd483d..afd2f050896a 100644 --- a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c @@ -43,6 +43,8 @@ UartInit ( MmioWrite32 (PMUSSI_ONOFF8_REG, Val); } +STATIC EMBEDDED_GPIO *mGpio; + STATIC VOID MtcmosInit ( @@ -87,6 +89,90 @@ HiKeyInitPeripherals ( EFI_STATUS EFIAPI +VirtualKeyboardRegister ( + IN VOID + ) +{ + EFI_STATUS Status; + + Status = gBS->LocateProtocol ( + &gEmbeddedGpioProtocolGuid, + NULL, + (VOID **) &mGpio + ); + if (EFI_ERROR (Status)) { + return Status; + } + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardReset ( + IN VOID + ) +{ + EFI_STATUS Status; + + if (mGpio == NULL) { + return EFI_INVALID_PARAMETER; + } + Status = mGpio->Set (mGpio, DETECT_J15_FASTBOOT, GPIO_MODE_INPUT); + return Status; +} + +BOOLEAN +EFIAPI +VirtualKeyboardQuery ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + EFI_STATUS Status; + UINTN Value = 0; + + if ((VirtualKey == NULL) || (mGpio == NULL)) { + return FALSE; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + goto Done; + } else { + Status = mGpio->Get (mGpio, DETECT_J15_FASTBOOT, &Value); + if (EFI_ERROR (Status) || (Value != 0)) { + return FALSE; + } + } +Done: + VirtualKey->Signature = VIRTUAL_KEYBOARD_KEY_SIGNATURE; + VirtualKey->Key.ScanCode = SCAN_NULL; + VirtualKey->Key.UnicodeChar = L'f'; + return TRUE; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardClear ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + if (VirtualKey == NULL) { + return EFI_INVALID_PARAMETER; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + MmioWrite32 (ADB_REBOOT_ADDRESS, ADB_REBOOT_NONE); + WriteBackInvalidateDataCacheRange ((VOID *)ADB_REBOOT_ADDRESS, 4); + } + return EFI_SUCCESS; +} + +PLATFORM_VIRTUAL_KBD_PROTOCOL mVirtualKeyboard = { + VirtualKeyboardRegister, + VirtualKeyboardReset, + VirtualKeyboardQuery, + VirtualKeyboardClear +}; + +EFI_STATUS +EFIAPI HiKeyEntryPoint ( IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable @@ -98,5 +184,12 @@ HiKeyEntryPoint ( if (EFI_ERROR (Status)) { return Status; } + + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gPlatformVirtualKeyboardProtocolGuid, + EFI_NATIVE_INTERFACE, + &mVirtualKeyboard + ); return Status; } diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h index 07f9ae6a949a..3d608183fa58 100644 --- a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h @@ -15,10 +15,15 @@ #ifndef __HIKEYDXE_H__ #define __HIKEYDXE_H__ +#include #include #include +#include #include +#include +#include + #include #include diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf index 34734391b45a..41aa7f8081ed 100644 --- a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf @@ -28,11 +28,16 @@ [Packages] MdePkg/MdePkg.dec [LibraryClasses] + CacheMaintenanceLib DebugLib IoLib UefiLib UefiDriverEntryPoint +[Protocols] + gEmbeddedGpioProtocolGuid + gPlatformVirtualKeyboardProtocolGuid + [Guids] gEfiEndOfDxeEventGroupGuid