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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id o8sm9070242wmr.28.2021.04.01.10.41.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Apr 2021 10:41:23 -0700 (PDT) From: Bryan O'Donoghue To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, Jonathan Marek Subject: [PATCH v3 1/2] arm64: dts: qcom: sm8250: Add videocc DT node Date: Thu, 1 Apr 2021 18:42:55 +0100 Message-Id: <20210401174256.1810044-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210401174256.1810044-1-bryan.odonoghue@linaro.org> References: <20210401174256.1810044-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Marek This commit adds the videocc DTS node for sm8250. Signed-off-by: Jonathan Marek Signed-off-by: Bryan O'Donoghue Tested-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.30.1 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 947e1accae3a..23fb9a0e32b9 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -17,6 +17,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -2322,6 +2323,19 @@ usb_2_dwc3: dwc3@a800000 { }; }; + videocc: clock-controller@abf0000 { + compatible = "qcom,sm8250-videocc"; + reg = <0 0x0abf0000 0 0x10000>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>; + mmcx-supply = <&mmcx_reg>; + clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mdss: mdss@ae00000 { compatible = "qcom,sdm845-mdss"; reg = <0 0x0ae00000 0 0x1000>; From patchwork Thu Apr 1 17:42:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 413655 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp804437jai; Thu, 1 Apr 2021 11:33:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy17mlCgCIJ3cJdHVqBWZHhQpDhfS0Ebcn3A68Che/d4ZndBrr9ryezBfrGJToCnn8WeEDh X-Received: by 2002:a05:6402:10c6:: with SMTP id p6mr11288419edu.241.1617301995716; Thu, 01 Apr 2021 11:33:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617301995; cv=none; d=google.com; s=arc-20160816; b=jNF54y1f1OaaWZsBX51BDzrAQ3wmgzNL3htQUKNZY3+nliy7A+tIoZfRoX4JCPeDZh pGi0+3crcHMmBj96rxA9vnOlrqEcg3KeklAFzu4qIV4e0abu+Z1++y9fog6uRkn3bxm3 avPOb8Ti8Z6ozfsvpyl9ZtZJ7qw1V+SZIsMKMLIGmCOWHRdIVYbyYLuSkUTNGZpSCIJb wMsFpnEK4q8IMRDsHto0Ghpdo4hL6t5zGPMJp7sUI4xPoArKh+RRzv59k3j4EBhNUHyE +xDk8FL81u5zR8nF9YagBj1b0QHKAlEXk/3GWTTKf2y0Jk8AgG8AETH6TfmLZtDXBd6G xqGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0ZgsNptth5FfPKBSZvQ+tJje7mvJfg0p78cr8chWRLw=; b=GosfjDmLBWvCDf04nXJeBbT1LPZnBRnD95RaEPNjQfRmuuitdy/Q9oKRh8Z0Q8Kn+c ysi8Z/EjWliHNeWl94JMw4X44vhGNg0myPc0MXceEpS4ged+DORx6wrK8E6fu24c7uw8 nkLNSCBM16y4yh1pp6iml+ePQw0+AXusDXMn6m0DB1uFrcFuUT8ORbjtq0ZJcpPTxNr7 99x4YXhOdkyH2IHQoYKMmB8dJVEO+sgizMU/ak+kwHifhGaBfI6H7Li+qRx7SHbTua43 UK1PIVgOJt560SEpP/Kh5t2AIjYVBQM2f22qDLeKqJKIXG6REtT6aUxsIlB6k4jYU5BV 9DKw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tf9o30F6; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id o8sm9070242wmr.28.2021.04.01.10.41.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Apr 2021 10:41:24 -0700 (PDT) From: Bryan O'Donoghue To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, Dikshita Agarwal Subject: [PATCH v3 2/2] arm64: dts: qcom: sm8250: Add venus DT node Date: Thu, 1 Apr 2021 18:42:56 +0100 Message-Id: <20210401174256.1810044-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210401174256.1810044-1-bryan.odonoghue@linaro.org> References: <20210401174256.1810044-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT entries for the sm8250 venus encoder/decoder. Co-developed-by: Jonathan Marek Signed-off-by: Jonathan Marek Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Tested-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 59 ++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) -- 2.30.1 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 23fb9a0e32b9..cf602e8c40a7 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2323,6 +2323,65 @@ usb_2_dwc3: dwc3@a800000 { }; }; + venus: video-codec@aa00000 { + compatible = "qcom,sm8250-venus"; + reg = <0 0x0aa00000 0 0x100000>; + interrupts = ; + power-domains = <&videocc MVS0C_GDSC>, + <&videocc MVS0_GDSC>, + <&rpmhpd SM8250_MX>; + power-domain-names = "venus", "vcodec0", "mx"; + operating-points-v2 = <&venus_opp_table>; + + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>; + clock-names = "iface", "core", "vcodec0_core"; + + interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>, + <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>; + interconnect-names = "cpu-cfg", "video-mem"; + + iommus = <&apps_smmu 0x2100 0x0400>; + memory-region = <&video_mem>; + + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = "bus", "core"; + + video-decoder { + compatible = "venus-decoder"; + }; + + video-encoder { + compatible = "venus-encoder"; + }; + + venus_opp_table: venus-opp-table { + compatible = "operating-points-v2"; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-1014000000 { + opp-hz = /bits/ 64 <1014000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-1098000000 { + opp-hz = /bits/ 64 <1098000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-1332000000 { + opp-hz = /bits/ 64 <1332000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + videocc: clock-controller@abf0000 { compatible = "qcom,sm8250-videocc"; reg = <0 0x0abf0000 0 0x10000>;