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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:17 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 01/25] media: venus: Update v6 buffer descriptors Date: Fri, 2 Apr 2021 11:06:24 +0100 Message-Id: <20210402100648.1815854-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Currently hfi_platform_v6.c adds a bunch of capability parameters. Reviewing downstream we can see a number of these need to be updated. techpack/video/msm/vidc/msm_vidc_platform.c :: kona_capabilities[] Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- .../platform/qcom/venus/hfi_platform_v6.c | 138 +++++++++--------- 1 file changed, 69 insertions(+), 69 deletions(-) -- 2.30.1 diff --git a/drivers/media/platform/qcom/venus/hfi_platform_v6.c b/drivers/media/platform/qcom/venus/hfi_platform_v6.c index 2278be13cb90..dd1a03911b6c 100644 --- a/drivers/media/platform/qcom/venus/hfi_platform_v6.c +++ b/drivers/media/platform/qcom/venus/hfi_platform_v6.c @@ -9,15 +9,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_H264, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 5760, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 5760, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 1}, /* ((5760 * 2880) / 256) */ - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 36, 64800, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 200000000, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 220000000, 1}, .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 36, 1958400, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .num_caps = 9, .pl[0] = {HFI_H264_PROFILE_BASELINE, HFI_H264_LEVEL_52}, @@ -35,15 +35,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_HEVC, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 1}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, - .caps[4] = {HFI_CAPABILITY_SCALE_X, 4096, 65536, 1}, - .caps[5] = {HFI_CAPABILITY_SCALE_Y, 4096, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 2073600, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 2, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 220000000, 1}, + .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, + .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 3, 1}, .num_caps = 10, .pl[0] = {HFI_HEVC_PROFILE_MAIN, HFI_HEVC_LEVEL_6 | HFI_HEVC_TIER_HIGH0}, @@ -61,15 +61,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_VP8, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 1}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, - .caps[4] = {HFI_CAPABILITY_SCALE_X, 4096, 65536, 1}, - .caps[5] = {HFI_CAPABILITY_SCALE_Y, 4096, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 2073600, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 2, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 4096, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 4096, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 36864, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 100000000, 1}, + .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, + .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 4423680, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 120, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 3, 1}, .num_caps = 10, .pl[0] = {HFI_VPX_PROFILE_MAIN, HFI_VPX_LEVEL_VERSION_0}, @@ -86,15 +86,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_VP9, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 1}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, - .caps[4] = {HFI_CAPABILITY_SCALE_X, 4096, 65536, 1}, - .caps[5] = {HFI_CAPABILITY_SCALE_Y, 4096, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 2073600, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 2, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 220000000, 1}, + .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, + .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 3, 1}, .num_caps = 10, .pl[0] = {HFI_VP9_PROFILE_P0, 200}, @@ -112,15 +112,15 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_MPEG2, .domain = VIDC_SESSION_TYPE_DEC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 1920, 1}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 1920, 1}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 8160, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 1920, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 1920, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 8160, 1}, .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 40000000, 1}, - .caps[4] = {HFI_CAPABILITY_SCALE_X, 4096, 65536, 1}, - .caps[5] = {HFI_CAPABILITY_SCALE_Y, 4096, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 244800, 1}, + .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, + .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 30, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 2, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 1, 1}, .num_caps = 10, .pl[0] = {HFI_MPEG2_PROFILE_SIMPLE, HFI_MPEG2_LEVEL_H14}, @@ -135,21 +135,21 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_H264, .domain = VIDC_SESSION_TYPE_ENC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 16}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 16}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 1}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 1}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 220000000, 1}, .caps[4] = {HFI_CAPABILITY_SCALE_X, 8192, 65536, 1}, .caps[5] = {HFI_CAPABILITY_SCALE_Y, 8192, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 1036800, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 3, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_PEAKBITRATE, 32000, 160000000, 1}, - .caps[10] = {HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS, 0, 5, 1}, - .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 4, 1}, + .caps[10] = {HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS, 0, 6, 1}, + .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 2, 1}, .caps[12] = {HFI_CAPABILITY_LCU_SIZE, 16, 16, 1}, .caps[13] = {HFI_CAPABILITY_BFRAME, 0, 1, 1}, - .caps[14] = {HFI_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS, 0, 5, 1}, + .caps[14] = {HFI_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS, 0, 6, 1}, .caps[15] = {HFI_CAPABILITY_I_FRAME_QP, 0, 51, 1}, .caps[16] = {HFI_CAPABILITY_P_FRAME_QP, 0, 51, 1}, .caps[17] = {HFI_CAPABILITY_B_FRAME_QP, 0, 51, 1}, @@ -172,24 +172,24 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_HEVC, .domain = VIDC_SESSION_TYPE_ENC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 16}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 16}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 16}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 16}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 160000000, 1}, .caps[4] = {HFI_CAPABILITY_SCALE_X, 8192, 65536, 1}, .caps[5] = {HFI_CAPABILITY_SCALE_Y, 8192, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 1036800, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 3, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_PEAKBITRATE, 32000, 160000000, 1}, .caps[10] = {HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS, 0, 5, 1}, - .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 4, 1}, + .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 2, 1}, .caps[12] = {HFI_CAPABILITY_LCU_SIZE, 32, 32, 1}, .caps[13] = {HFI_CAPABILITY_BFRAME, 0, 1, 1}, .caps[14] = {HFI_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS, 0, 5, 1}, - .caps[15] = {HFI_CAPABILITY_I_FRAME_QP, 0, 63, 1}, - .caps[16] = {HFI_CAPABILITY_P_FRAME_QP, 0, 63, 1}, - .caps[17] = {HFI_CAPABILITY_B_FRAME_QP, 0, 63, 1}, + .caps[15] = {HFI_CAPABILITY_I_FRAME_QP, 0, 51, 1}, + .caps[16] = {HFI_CAPABILITY_P_FRAME_QP, 0, 51, 1}, + .caps[17] = {HFI_CAPABILITY_B_FRAME_QP, 0, 51, 1}, .caps[18] = {HFI_CAPABILITY_MAX_WORKMODES, 1, 2, 1}, .caps[19] = {HFI_CAPABILITY_RATE_CONTROL_MODES, 0x1000001, 0x1000005, 1}, .caps[20] = {HFI_CAPABILITY_COLOR_SPACE_CONVERSION, 0, 2, 1}, @@ -209,20 +209,20 @@ static const struct hfi_plat_caps caps[] = { .codec = HFI_VIDEO_CODEC_VP8, .domain = VIDC_SESSION_TYPE_ENC, .cap_bufs_mode_dynamic = true, - .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 16}, - .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 16}, - .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, - .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, + .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 4096, 16}, + .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 4096, 16}, + .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 36864, 1}, + .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 74000000, 1}, .caps[4] = {HFI_CAPABILITY_SCALE_X, 8192, 65536, 1}, .caps[5] = {HFI_CAPABILITY_SCALE_Y, 8192, 65536, 1}, - .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 1036800, 1}, - .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 240, 1}, - .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 3, 1}, + .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 4423680, 1}, + .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 120, 1}, + .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, .caps[9] = {HFI_CAPABILITY_PEAKBITRATE, 32000, 160000000, 1}, .caps[10] = {HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS, 0, 3, 1}, .caps[11] = {HFI_CAPABILITY_ENC_LTR_COUNT, 0, 2, 1}, .caps[12] = {HFI_CAPABILITY_LCU_SIZE, 16, 16, 1}, - .caps[13] = {HFI_CAPABILITY_BFRAME, 0, 1, 1}, + .caps[13] = {HFI_CAPABILITY_BFRAME, 0, 0, 1}, .caps[14] = {HFI_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS, 0, 5, 1}, .caps[15] = {HFI_CAPABILITY_I_FRAME_QP, 0, 127, 1}, .caps[16] = {HFI_CAPABILITY_P_FRAME_QP, 0, 127, 1}, From patchwork Fri Apr 2 10:06:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414724 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B75DC43618 for ; Fri, 2 Apr 2021 10:05:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EA28360FE9 for ; Fri, 2 Apr 2021 10:05:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234635AbhDBKFa (ORCPT ); Fri, 2 Apr 2021 06:05:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234397AbhDBKF2 (ORCPT ); Fri, 2 Apr 2021 06:05:28 -0400 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1AD0BC061794 for ; Fri, 2 Apr 2021 03:05:20 -0700 (PDT) Received: by mail-wm1-x330.google.com with SMTP id j20-20020a05600c1914b029010f31e15a7fso4109355wmq.1 for ; Fri, 02 Apr 2021 03:05:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Gu1aUpypBdZ1g5qKxxRYnsFtYrUSNKGTe+yXVLDDZJw=; b=ksnOHVigXlc06+QGymJwGypYZ0yHUSBjvgJ9S5ox1SFQaJuQX67kRqXCPyqRTy75cp KYE2Gq2pwsfTlbvQluFyIispAcWQ/O7+PljGRqxk6K6IWsl9gOtRV3Pt29TXpFmI1DJt DuXpDPsplc36VdxUb5nsn4wJ826xjsJNIzh9vq/XbjFkKFpT84ndzDsxTfdHSL2kmOEO rdDXOX80pWt5dgCIdzuz0YsjT39e6DIArQzXXnbHe7rqnOiGJwrGtgqAvNk9NHpsTTdw HOefLyGda9up2QVD9cpVzIgfWnMB/Zteng29+f23vahUwwSPDfgA7U5YnhkMNfYmsQ7i e7uQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Gu1aUpypBdZ1g5qKxxRYnsFtYrUSNKGTe+yXVLDDZJw=; b=AyBEhpI0bjLifDCoCR8Bqe96Us9tay55Y55KZKpBGfVzqz2AhKW7THPIaTuQUF6SO3 Ka2NFZagYRwpgGsPkIRO83Q5QtX6IGCLcj1rqDRSg0WwmYBNUvLlDnwTvgoFfqUPpIZr QVpjzNWtxDg3L3/mWgjnU3mCgZ0lyEwOjSBL8IG0m/w5Yth32cK7HaTpwdiKUAkyedit Qdizl1KVQdzKPWZBh3Axa7ofRjfnOmRM4lubuDd1CJGxKV5d3MSVrK4jRMqUC+MhSmu5 6mudiug6we9pAnfRNnEVrDzI+wAR2uUQxL7MNvgzzWu7JrueNvKs9Q24yHkAfNSNp72R VRhQ== X-Gm-Message-State: AOAM530w2RQpfoBxIV5DDYrTiT0PwQ1yc4fM0EtugQuQyjouJ9htx/Wj NEMQOJPkLaog2R2AkmmC03HJfA== X-Google-Smtp-Source: ABdhPJx0Djr1zdKJ1SvmWb1VYil+tIq/VtMx4mTIQccyktFnwuiddoiKt1XXXr5b2eFxKUMyKIYUOQ== X-Received: by 2002:a1c:6855:: with SMTP id d82mr12367791wmc.169.1617357918717; Fri, 02 Apr 2021 03:05:18 -0700 (PDT) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:18 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 02/25] media: venus: core,pm: Add handling for resets Date: Fri, 2 Apr 2021 11:06:25 +0100 Message-Id: <20210402100648.1815854-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Stanimir Varbanov The Venus driver has to control two reset signals related to gcc video_axi0 and videocc mvs0c for v6. Add it. Signed-off-by: Stanimir Varbanov Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/core.h | 4 ++ .../media/platform/qcom/venus/pm_helpers.c | 60 +++++++++++++++++++ 2 files changed, 64 insertions(+) diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 13c18c49714d..0a90cd79104b 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -24,6 +24,7 @@ #define VIDC_CLKS_NUM_MAX 4 #define VIDC_VCODEC_CLKS_NUM_MAX 2 #define VIDC_PMDOMAINS_NUM_MAX 3 +#define VIDC_RESETS_NUM_MAX 2 extern int venus_fw_debug; @@ -64,6 +65,8 @@ struct venus_resources { unsigned int vcodec_pmdomains_num; const char **opp_pmdomain; unsigned int vcodec_num; + const char * const resets[VIDC_RESETS_NUM_MAX]; + unsigned int resets_num; enum hfi_version hfi_version; u32 max_load; unsigned int vmem_id; @@ -130,6 +133,7 @@ struct venus_core { struct device *pmdomains[VIDC_PMDOMAINS_NUM_MAX]; struct device_link *opp_dl_venus; struct device *opp_pmdomain; + struct reset_control *resets[VIDC_RESETS_NUM_MAX]; struct video_device *vdev_dec; struct video_device *vdev_enc; struct v4l2_device v4l2_dev; diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index 95b4d40ff6a5..794c2d6f0543 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -847,6 +848,52 @@ static void vcodec_domains_put(struct venus_core *core) dev_pm_opp_detach_genpd(core->opp_table); } +static int core_resets_reset(struct venus_core *core) +{ + const struct venus_resources *res = core->res; + unsigned char i; + int ret; + + if (!res->resets_num) + return 0; + + for (i = 0; i < res->resets_num; i++) { + ret = reset_control_assert(core->resets[i]); + if (ret) + goto err; + + usleep_range(150, 250); + ret = reset_control_deassert(core->resets[i]); + if (ret) + goto err; + } + +err: + return ret; +} + +static int core_resets_get(struct venus_core *core) +{ + struct device *dev = core->dev; + const struct venus_resources *res = core->res; + unsigned char i; + int ret; + + if (!res->resets_num) + return 0; + + for (i = 0; i < res->resets_num; i++) { + core->resets[i] = + devm_reset_control_get_exclusive(dev, res->resets[i]); + if (IS_ERR(core->resets[i])) { + ret = PTR_ERR(core->resets[i]); + return ret; + } + } + + return 0; +} + static int core_get_v4(struct venus_core *core) { struct device *dev = core->dev; @@ -870,6 +917,10 @@ static int core_get_v4(struct venus_core *core) if (ret) return ret; + ret = core_resets_get(core); + if (ret) + return ret; + if (legacy_binding) return 0; @@ -929,6 +980,13 @@ static int core_power_v4(struct venus_core *core, int on) } } + ret = core_resets_reset(core); + if (ret) { + if (pmctrl) + pm_runtime_put_sync(pmctrl); + return ret; + } + ret = core_clks_enable(core); if (ret < 0 && pmctrl) pm_runtime_put_sync(pmctrl); @@ -939,6 +997,8 @@ static int core_power_v4(struct venus_core *core, int on) core_clks_disable(core); + ret = core_resets_reset(core); + if (pmctrl) pm_runtime_put_sync(pmctrl); } From patchwork Fri Apr 2 10:06:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414328 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1283887jai; Fri, 2 Apr 2021 03:06:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxg3FZ7WiR3d5iAgTUyH6YGwVGwVaU/ecDUFLvQC7qL7neiWU0Op3YLduYf6gxTE+paJxWi X-Received: by 2002:a5d:818c:: with SMTP id u12mr10428702ion.81.1617357960585; Fri, 02 Apr 2021 03:06:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617357960; cv=none; d=google.com; s=arc-20160816; b=we+PsQP/N34y7x9RHMT3TZ9m7Yu8HOVgHWGLI7m7N5T2QcVHBvSFXAQrTCwH0Yt5qn OSNig/q9XQ1d50tfPvgHA+JhALP715hi1Hpw+kaj5hHxuGLSXHd02MOKej5gUqgiPf0D /mpGdZt4DNJd+/BCkiuCLKKKpRTWcctCZGdkPZdc9A+XmaZ84jaCydRK0J2RsgzBwosh W0XhAtCdqA0xf34ezylInnQxA3ZdMJPUU7s0FHJjTNSutCdIiNo01jaSWOXpEpsxWTr7 n+c0euQLgKrjt+K4/fFM/TV/nxxrqu2R/vG2G0GYOXcG7ODSdpGL1IYWvnKy7nWxS0cv ve/A== ARC-Message-Signature: i=1; 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:19 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 03/25] media: venus: core: add sm8250 DT compatible and resource data Date: Fri, 2 Apr 2021 11:06:26 +0100 Message-Id: <20210402100648.1815854-4-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Adds an sm8250 compatible binding to the venus core. Co-developed-by: Jonathan Marek Signed-off-by: Jonathan Marek Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/core.c | 54 ++++++++++++++++++++++++ 1 file changed, 54 insertions(+) -- 2.30.1 diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index 00d6883d3859..68358a9f3cda 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -627,12 +627,66 @@ static const struct venus_resources sc7180_res = { .fwname = "qcom/venus-5.4/venus.mdt", }; +static const struct freq_tbl sm8250_freq_table[] = { + { 0, 444000000 }, + { 0, 366000000 }, + { 0, 338000000 }, + { 0, 240000000 }, +}; + +static const struct bw_tbl sm8250_bw_table_enc[] = { + { 1944000, 1954000, 0, 3711000, 0 }, /* 3840x2160@60 */ + { 972000, 996000, 0, 1905000, 0 }, /* 3840x2160@30 */ + { 489600, 645000, 0, 977000, 0 }, /* 1920x1080@60 */ + { 244800, 332000, 0, 498000, 0 }, /* 1920x1080@30 */ +}; + +static const struct bw_tbl sm8250_bw_table_dec[] = { + { 2073600, 2403000, 0, 4113000, 0 }, /* 4096x2160@60 */ + { 1036800, 1224000, 0, 2079000, 0 }, /* 4096x2160@30 */ + { 489600, 812000, 0, 998000, 0 }, /* 1920x1080@60 */ + { 244800, 416000, 0, 509000, 0 }, /* 1920x1080@30 */ +}; + +static const struct reg_val sm8250_reg_preset[] = { + { 0xb0088, 0 }, +}; + +static const struct venus_resources sm8250_res = { + .freq_tbl = sm8250_freq_table, + .freq_tbl_size = ARRAY_SIZE(sm8250_freq_table), + .reg_tbl = sm8250_reg_preset, + .reg_tbl_size = ARRAY_SIZE(sm8250_reg_preset), + .bw_tbl_enc = sm8250_bw_table_enc, + .bw_tbl_enc_size = ARRAY_SIZE(sm8250_bw_table_enc), + .bw_tbl_dec = sm8250_bw_table_dec, + .bw_tbl_dec_size = ARRAY_SIZE(sm8250_bw_table_dec), + .clks = {"core", "iface"}, + .clks_num = 2, + .resets = { "bus", "core" }, + .resets_num = 2, + .vcodec0_clks = { "vcodec0_core" }, + .vcodec_clks_num = 1, + .vcodec_pmdomains = { "venus", "vcodec0" }, + .vcodec_pmdomains_num = 2, + .opp_pmdomain = (const char *[]) { "mx", NULL }, + .vcodec_num = 1, + .max_load = 7833600, + .hfi_version = HFI_VERSION_6XX, + .vmem_id = VIDC_RESOURCE_NONE, + .vmem_size = 0, + .vmem_addr = 0, + .dma_mask = 0xe0000000 - 1, + .fwname = "qcom/sm8250/venus.mdt", +}; + static const struct of_device_id venus_dt_match[] = { { .compatible = "qcom,msm8916-venus", .data = &msm8916_res, }, { .compatible = "qcom,msm8996-venus", .data = &msm8996_res, }, { .compatible = "qcom,sdm845-venus", .data = &sdm845_res, }, { .compatible = "qcom,sdm845-venus-v2", .data = &sdm845_res_v2, }, { .compatible = "qcom,sc7180-venus", .data = &sc7180_res, }, + { .compatible = "qcom,sm8250-venus", .data = &sm8250_res, }, { } }; MODULE_DEVICE_TABLE(of, venus_dt_match); From patchwork Fri Apr 2 10:06:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414331 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1283939jai; Fri, 2 Apr 2021 03:06:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxiwBrtK7KFbAd4rzZ53AOyg437/wx8j6eGb/NjbMXt3mvID9ZESjdmTJgMe5647xAECuQw X-Received: by 2002:a02:7f0e:: with SMTP id r14mr12087476jac.112.1617357964717; Fri, 02 Apr 2021 03:06:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617357964; cv=none; d=google.com; s=arc-20160816; b=Jccsw+76yl5FSmTfReuXeLpVqloc8dNrBjkzg3JR2bcfQ3VrZHeCZK1pfT2GZ11sQW BkYs4oUzbgsC40L0aZGkFk/2zaYYgdKXPa74olEYl+f5jyBy0quU8wI9O9RbrWc1GHLs qpA1r0OakMYBI8egwkMAjUMf23PCzZo9Sr7NkjEF8mqyq1Umh+mf9jn4V4+8tgQIv53B bceCHzOBLvBOpmGZCcEKGFlk2k5h7omhhJz4V150yssuZfLOLaio9/QdyaM7bAq8wc6E BguECXpm0G06+am+9eq0pw36fGQU4VbgyRHnZDD6BZu74+V+ljjmkdvNGb/8ecLTN00Q +JMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=r3VPHqO4mG67G3XO/qgUwmeeueucvqFjM6Se2njI3O4=; b=xeOjbdWdntWSzVJ7zTSvcWuWI3oC/UpdlmeuCyByM3SVEglPhU3Wdi/ex9t1yKumqc P8hXLpi46DhmINCB9mngYFOjo+uLxi1rqwumMTevmFupWeU73j+9ho34hgSxEH2XgIgT IvpRweit/nxskOWZGOck0Mako76mZJrWeB0x1+SGs9ig1rxkUnx3zY7/0+xvRuFWbYO4 lX9I30RY1maGbkOv4fze4RmCm1izmCERjE135zBLTGGVOKJFtCKWTbFgp/PSs/Jf72hF HXVBuHMWi0eGYGqoVildT08ra3H2RKPeQ6IjVeupfe703d7Jmo2LZE6spGm5ufiLAH62 kSyw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zdCV4WNX; spf=pass (google.com: domain of linux-media-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-media-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:21 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 05/25] media: venus: hfi, pm, firmware: Convert to block relative addressing Date: Fri, 2 Apr 2021 11:06:28 +0100 Message-Id: <20210402100648.1815854-6-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org An upcoming silicon change places a number of existing blocks within the Venus at different relative offsets to the base address of IO region. In order to handle this difference this patch changes the address offsets of the registers to function as offsets relative to the relevant sub-block of registers within the IO region not the base address of the IO region. As a result of this change venus_readl() and venus_writel() are deleted. Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/firmware.c | 28 +++---- drivers/media/platform/qcom/venus/hfi_venus.c | 82 ++++++++++--------- .../media/platform/qcom/venus/hfi_venus_io.h | 80 +++++++++--------- .../media/platform/qcom/venus/pm_helpers.c | 12 +-- 4 files changed, 105 insertions(+), 97 deletions(-) -- 2.30.1 diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c index 2b1d95ecd381..8c2c68114bbd 100644 --- a/drivers/media/platform/qcom/venus/firmware.c +++ b/drivers/media/platform/qcom/venus/firmware.c @@ -27,19 +27,19 @@ static void venus_reset_cpu(struct venus_core *core) { u32 fw_size = core->fw.mapped_mem_size; - void __iomem *base = core->base; + void __iomem *wrapper_base = core->wrapper_base; - writel(0, base + WRAPPER_FW_START_ADDR); - writel(fw_size, base + WRAPPER_FW_END_ADDR); - writel(0, base + WRAPPER_CPA_START_ADDR); - writel(fw_size, base + WRAPPER_CPA_END_ADDR); - writel(fw_size, base + WRAPPER_NONPIX_START_ADDR); - writel(fw_size, base + WRAPPER_NONPIX_END_ADDR); - writel(0x0, base + WRAPPER_CPU_CGC_DIS); - writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG); + writel(0, wrapper_base + WRAPPER_FW_START_ADDR); + writel(fw_size, wrapper_base + WRAPPER_FW_END_ADDR); + writel(0, wrapper_base + WRAPPER_CPA_START_ADDR); + writel(fw_size, wrapper_base + WRAPPER_CPA_END_ADDR); + writel(fw_size, wrapper_base + WRAPPER_NONPIX_START_ADDR); + writel(fw_size, wrapper_base + WRAPPER_NONPIX_END_ADDR); + writel(0x0, wrapper_base + WRAPPER_CPU_CGC_DIS); + writel(0x0, wrapper_base + WRAPPER_CPU_CLOCK_CONFIG); /* Bring ARM9 out of reset */ - writel(0, base + WRAPPER_A9SS_SW_RESET); + writel(0, wrapper_base + WRAPPER_A9SS_SW_RESET); } int venus_set_hw_state(struct venus_core *core, bool resume) @@ -56,7 +56,7 @@ int venus_set_hw_state(struct venus_core *core, bool resume) if (resume) venus_reset_cpu(core); else - writel(1, core->base + WRAPPER_A9SS_SW_RESET); + writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET); return 0; } @@ -159,12 +159,12 @@ static int venus_shutdown_no_tz(struct venus_core *core) size_t unmapped; u32 reg; struct device *dev = core->fw.dev; - void __iomem *base = core->base; + void __iomem *wrapper_base = core->wrapper_base; /* Assert the reset to ARM9 */ - reg = readl_relaxed(base + WRAPPER_A9SS_SW_RESET); + reg = readl_relaxed(wrapper_base + WRAPPER_A9SS_SW_RESET); reg |= WRAPPER_A9SS_SW_RESET_BIT; - writel_relaxed(reg, base + WRAPPER_A9SS_SW_RESET); + writel_relaxed(reg, wrapper_base + WRAPPER_A9SS_SW_RESET); /* Make sure reset is asserted before the mapping is removed */ mb(); diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index 50e03f8fc278..f95cdd3d530c 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -345,16 +345,6 @@ static void venus_free(struct venus_hfi_device *hdev, struct mem_desc *mem) dma_free_attrs(dev, mem->size, mem->kva, mem->da, mem->attrs); } -static void venus_writel(struct venus_hfi_device *hdev, u32 reg, u32 value) -{ - writel(value, hdev->core->base + reg); -} - -static u32 venus_readl(struct venus_hfi_device *hdev, u32 reg) -{ - return readl(hdev->core->base + reg); -} - static void venus_set_registers(struct venus_hfi_device *hdev) { const struct venus_resources *res = hdev->core->res; @@ -363,12 +353,14 @@ static void venus_set_registers(struct venus_hfi_device *hdev) unsigned int i; for (i = 0; i < count; i++) - venus_writel(hdev, tbl[i].reg, tbl[i].value); + writel(tbl[i].value, hdev->core->base + tbl[i].reg); } static void venus_soft_int(struct venus_hfi_device *hdev) { - venus_writel(hdev, CPU_IC_SOFTINT, BIT(CPU_IC_SOFTINT_H2A_SHIFT)); + void __iomem *cpu_ic_base = hdev->core->cpu_ic_base; + + writel(BIT(CPU_IC_SOFTINT_H2A_SHIFT), cpu_ic_base + CPU_IC_SOFTINT); } static int venus_iface_cmdq_write_nolock(struct venus_hfi_device *hdev, @@ -452,14 +444,16 @@ static int venus_boot_core(struct venus_hfi_device *hdev) static const unsigned int max_tries = 100; u32 ctrl_status = 0; unsigned int count = 0; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + void __iomem *wrapper_base = hdev->core->wrapper_base; int ret = 0; - venus_writel(hdev, VIDC_CTRL_INIT, BIT(VIDC_CTRL_INIT_CTRL_SHIFT)); - venus_writel(hdev, WRAPPER_INTR_MASK, WRAPPER_INTR_MASK_A2HVCODEC_MASK); - venus_writel(hdev, CPU_CS_SCIACMDARG3, 1); + writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT); + writel(WRAPPER_INTR_MASK_A2HVCODEC_MASK, wrapper_base + WRAPPER_INTR_MASK); + writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3); while (!ctrl_status && count < max_tries) { - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if ((ctrl_status & CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK) == 4) { dev_err(dev, "invalid setting for UC_REGION\n"); ret = -EINVAL; @@ -479,9 +473,11 @@ static int venus_boot_core(struct venus_hfi_device *hdev) static u32 venus_hwversion(struct venus_hfi_device *hdev) { struct device *dev = hdev->core->dev; - u32 ver = venus_readl(hdev, WRAPPER_HW_VERSION); + void __iomem *wrapper_base = hdev->core->wrapper_base; + u32 ver; u32 major, minor, step; + ver = readl(wrapper_base + WRAPPER_HW_VERSION); major = ver & WRAPPER_HW_VERSION_MAJOR_VERSION_MASK; major = major >> WRAPPER_HW_VERSION_MAJOR_VERSION_SHIFT; minor = ver & WRAPPER_HW_VERSION_MINOR_VERSION_MASK; @@ -496,6 +492,7 @@ static u32 venus_hwversion(struct venus_hfi_device *hdev) static int venus_run(struct venus_hfi_device *hdev) { struct device *dev = hdev->core->dev; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; int ret; /* @@ -504,12 +501,12 @@ static int venus_run(struct venus_hfi_device *hdev) */ venus_set_registers(hdev); - venus_writel(hdev, UC_REGION_ADDR, hdev->ifaceq_table.da); - venus_writel(hdev, UC_REGION_SIZE, SHARED_QSIZE); - venus_writel(hdev, CPU_CS_SCIACMDARG2, hdev->ifaceq_table.da); - venus_writel(hdev, CPU_CS_SCIACMDARG1, 0x01); + writel(hdev->ifaceq_table.da, cpu_cs_base + UC_REGION_ADDR); + writel(SHARED_QSIZE, cpu_cs_base + UC_REGION_SIZE); + writel(hdev->ifaceq_table.da, cpu_cs_base + CPU_CS_SCIACMDARG2); + writel(0x01, cpu_cs_base + CPU_CS_SCIACMDARG1); if (hdev->sfr.da) - venus_writel(hdev, SFR_ADDR, hdev->sfr.da); + writel(hdev->sfr.da, cpu_cs_base + SFR_ADDR); ret = venus_boot_core(hdev); if (ret) { @@ -524,17 +521,18 @@ static int venus_run(struct venus_hfi_device *hdev) static int venus_halt_axi(struct venus_hfi_device *hdev) { - void __iomem *base = hdev->core->base; + void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *vbif_base = hdev->core->vbif_base; struct device *dev = hdev->core->dev; u32 val; int ret; if (IS_V4(hdev->core)) { - val = venus_readl(hdev, WRAPPER_CPU_AXI_HALT); + val = readl(wrapper_base + WRAPPER_CPU_AXI_HALT); val |= WRAPPER_CPU_AXI_HALT_HALT; - venus_writel(hdev, WRAPPER_CPU_AXI_HALT, val); + writel(val, wrapper_base + WRAPPER_CPU_AXI_HALT); - ret = readl_poll_timeout(base + WRAPPER_CPU_AXI_HALT_STATUS, + ret = readl_poll_timeout(wrapper_base + WRAPPER_CPU_AXI_HALT_STATUS, val, val & WRAPPER_CPU_AXI_HALT_STATUS_IDLE, POLL_INTERVAL_US, @@ -548,12 +546,12 @@ static int venus_halt_axi(struct venus_hfi_device *hdev) } /* Halt AXI and AXI IMEM VBIF Access */ - val = venus_readl(hdev, VBIF_AXI_HALT_CTRL0); + val = readl(vbif_base + VBIF_AXI_HALT_CTRL0); val |= VBIF_AXI_HALT_CTRL0_HALT_REQ; - venus_writel(hdev, VBIF_AXI_HALT_CTRL0, val); + writel(val, vbif_base + VBIF_AXI_HALT_CTRL0); /* Request for AXI bus port halt */ - ret = readl_poll_timeout(base + VBIF_AXI_HALT_CTRL1, val, + ret = readl_poll_timeout(vbif_base + VBIF_AXI_HALT_CTRL1, val, val & VBIF_AXI_HALT_CTRL1_HALT_ACK, POLL_INTERVAL_US, VBIF_AXI_HALT_ACK_TIMEOUT_US); @@ -1046,19 +1044,21 @@ static irqreturn_t venus_isr(struct venus_core *core) { struct venus_hfi_device *hdev = to_hfi_priv(core); u32 status; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; + void __iomem *wrapper_base = hdev->core->wrapper_base; if (!hdev) return IRQ_NONE; - status = venus_readl(hdev, WRAPPER_INTR_STATUS); + status = readl(wrapper_base + WRAPPER_INTR_STATUS); if (status & WRAPPER_INTR_STATUS_A2H_MASK || status & WRAPPER_INTR_STATUS_A2HWD_MASK || status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) hdev->irq_status = status; - venus_writel(hdev, CPU_CS_A2HSOFTINTCLR, 1); - venus_writel(hdev, WRAPPER_INTR_CLEAR, status); + writel(1, cpu_cs_base + CPU_CS_A2HSOFTINTCLR); + writel(status, wrapper_base + WRAPPER_INTR_CLEAR); return IRQ_WAKE_THREAD; } @@ -1391,6 +1391,7 @@ static int venus_suspend_1xx(struct venus_core *core) { struct venus_hfi_device *hdev = to_hfi_priv(core); struct device *dev = core->dev; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status; int ret; @@ -1425,7 +1426,7 @@ static int venus_suspend_1xx(struct venus_core *core) return -EINVAL; } - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (!(ctrl_status & CPU_CS_SCIACMDARG0_PC_READY)) { mutex_unlock(&hdev->lock); return -EINVAL; @@ -1446,10 +1447,12 @@ static int venus_suspend_1xx(struct venus_core *core) static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) { + void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status, cpu_status; - cpu_status = venus_readl(hdev, WRAPPER_CPU_STATUS); - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (cpu_status & WRAPPER_CPU_STATUS_WFI && ctrl_status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) @@ -1460,10 +1463,12 @@ static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) static bool venus_cpu_idle_and_pc_ready(struct venus_hfi_device *hdev) { + void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status, cpu_status; - cpu_status = venus_readl(hdev, WRAPPER_CPU_STATUS); - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (cpu_status & WRAPPER_CPU_STATUS_WFI && ctrl_status & CPU_CS_SCIACMDARG0_PC_READY) @@ -1476,6 +1481,7 @@ static int venus_suspend_3xx(struct venus_core *core) { struct venus_hfi_device *hdev = to_hfi_priv(core); struct device *dev = core->dev; + void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status; bool val; int ret; @@ -1492,7 +1498,7 @@ static int venus_suspend_3xx(struct venus_core *core) return -EINVAL; } - ctrl_status = venus_readl(hdev, CPU_CS_SCIACMDARG0); + ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (ctrl_status & CPU_CS_SCIACMDARG0_PC_READY) goto power_off; diff --git a/drivers/media/platform/qcom/venus/hfi_venus_io.h b/drivers/media/platform/qcom/venus/hfi_venus_io.h index 3b52f98478db..4c392b67252c 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus_io.h +++ b/drivers/media/platform/qcom/venus/hfi_venus_io.h @@ -8,27 +8,28 @@ #define VBIF_BASE 0x80000 -#define VBIF_AXI_HALT_CTRL0 (VBIF_BASE + 0x208) -#define VBIF_AXI_HALT_CTRL1 (VBIF_BASE + 0x20c) +#define VBIF_AXI_HALT_CTRL0 0x208 +#define VBIF_AXI_HALT_CTRL1 0x20c #define VBIF_AXI_HALT_CTRL0_HALT_REQ BIT(0) #define VBIF_AXI_HALT_CTRL1_HALT_ACK BIT(0) #define VBIF_AXI_HALT_ACK_TIMEOUT_US 500000 #define CPU_BASE 0xc0000 + #define CPU_CS_BASE (CPU_BASE + 0x12000) #define CPU_IC_BASE (CPU_BASE + 0x1f000) -#define CPU_CS_A2HSOFTINTCLR (CPU_CS_BASE + 0x1c) +#define CPU_CS_A2HSOFTINTCLR 0x1c -#define VIDC_CTRL_INIT (CPU_CS_BASE + 0x48) +#define VIDC_CTRL_INIT 0x48 #define VIDC_CTRL_INIT_RESERVED_BITS31_1_MASK 0xfffffffe #define VIDC_CTRL_INIT_RESERVED_BITS31_1_SHIFT 1 #define VIDC_CTRL_INIT_CTRL_MASK 0x1 #define VIDC_CTRL_INIT_CTRL_SHIFT 0 /* HFI control status */ -#define CPU_CS_SCIACMDARG0 (CPU_CS_BASE + 0x4c) +#define CPU_CS_SCIACMDARG0 0x4c #define CPU_CS_SCIACMDARG0_MASK 0xff #define CPU_CS_SCIACMDARG0_SHIFT 0x0 #define CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK 0xfe @@ -39,42 +40,43 @@ #define CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK BIT(30) /* HFI queue table info */ -#define CPU_CS_SCIACMDARG1 (CPU_CS_BASE + 0x50) +#define CPU_CS_SCIACMDARG1 0x50 /* HFI queue table address */ -#define CPU_CS_SCIACMDARG2 (CPU_CS_BASE + 0x54) +#define CPU_CS_SCIACMDARG2 0x54 /* Venus cpu */ -#define CPU_CS_SCIACMDARG3 (CPU_CS_BASE + 0x58) +#define CPU_CS_SCIACMDARG3 0x58 -#define SFR_ADDR (CPU_CS_BASE + 0x5c) -#define MMAP_ADDR (CPU_CS_BASE + 0x60) -#define UC_REGION_ADDR (CPU_CS_BASE + 0x64) -#define UC_REGION_SIZE (CPU_CS_BASE + 0x68) +#define SFR_ADDR 0x5c +#define MMAP_ADDR 0x60 +#define UC_REGION_ADDR 0x64 +#define UC_REGION_SIZE 0x68 -#define CPU_IC_SOFTINT (CPU_IC_BASE + 0x18) +/* Relative to CPU_IC_BASE */ +#define CPU_IC_SOFTINT 0x18 #define CPU_IC_SOFTINT_H2A_MASK 0x8000 #define CPU_IC_SOFTINT_H2A_SHIFT 0xf /* Venus wrapper */ #define WRAPPER_BASE 0x000e0000 -#define WRAPPER_HW_VERSION (WRAPPER_BASE + 0x00) +#define WRAPPER_HW_VERSION 0x00 #define WRAPPER_HW_VERSION_MAJOR_VERSION_MASK 0x78000000 #define WRAPPER_HW_VERSION_MAJOR_VERSION_SHIFT 28 #define WRAPPER_HW_VERSION_MINOR_VERSION_MASK 0xfff0000 #define WRAPPER_HW_VERSION_MINOR_VERSION_SHIFT 16 #define WRAPPER_HW_VERSION_STEP_VERSION_MASK 0xffff -#define WRAPPER_CLOCK_CONFIG (WRAPPER_BASE + 0x04) +#define WRAPPER_CLOCK_CONFIG 0x04 -#define WRAPPER_INTR_STATUS (WRAPPER_BASE + 0x0c) +#define WRAPPER_INTR_STATUS 0x0c #define WRAPPER_INTR_STATUS_A2HWD_MASK 0x10 #define WRAPPER_INTR_STATUS_A2HWD_SHIFT 0x4 #define WRAPPER_INTR_STATUS_A2H_MASK 0x4 #define WRAPPER_INTR_STATUS_A2H_SHIFT 0x2 -#define WRAPPER_INTR_MASK (WRAPPER_BASE + 0x10) +#define WRAPPER_INTR_MASK 0x10 #define WRAPPER_INTR_MASK_A2HWD_BASK 0x10 #define WRAPPER_INTR_MASK_A2HWD_SHIFT 0x4 #define WRAPPER_INTR_MASK_A2HVCODEC_MASK 0x8 @@ -82,41 +84,41 @@ #define WRAPPER_INTR_MASK_A2HCPU_MASK 0x4 #define WRAPPER_INTR_MASK_A2HCPU_SHIFT 0x2 -#define WRAPPER_INTR_CLEAR (WRAPPER_BASE + 0x14) +#define WRAPPER_INTR_CLEAR 0x14 #define WRAPPER_INTR_CLEAR_A2HWD_MASK 0x10 #define WRAPPER_INTR_CLEAR_A2HWD_SHIFT 0x4 #define WRAPPER_INTR_CLEAR_A2H_MASK 0x4 #define WRAPPER_INTR_CLEAR_A2H_SHIFT 0x2 -#define WRAPPER_POWER_STATUS (WRAPPER_BASE + 0x44) -#define WRAPPER_VDEC_VCODEC_POWER_CONTROL (WRAPPER_BASE + 0x48) -#define WRAPPER_VENC_VCODEC_POWER_CONTROL (WRAPPER_BASE + 0x4c) -#define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET (WRAPPER_BASE + 0x64) +#define WRAPPER_POWER_STATUS 0x44 +#define WRAPPER_VDEC_VCODEC_POWER_CONTROL 0x48 +#define WRAPPER_VENC_VCODEC_POWER_CONTROL 0x4c +#define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64 -#define WRAPPER_CPU_CLOCK_CONFIG (WRAPPER_BASE + 0x2000) -#define WRAPPER_CPU_AXI_HALT (WRAPPER_BASE + 0x2008) +#define WRAPPER_CPU_CLOCK_CONFIG 0x2000 +#define WRAPPER_CPU_AXI_HALT 0x2008 #define WRAPPER_CPU_AXI_HALT_HALT BIT(16) -#define WRAPPER_CPU_AXI_HALT_STATUS (WRAPPER_BASE + 0x200c) +#define WRAPPER_CPU_AXI_HALT_STATUS 0x200c #define WRAPPER_CPU_AXI_HALT_STATUS_IDLE BIT(24) -#define WRAPPER_CPU_CGC_DIS (WRAPPER_BASE + 0x2010) -#define WRAPPER_CPU_STATUS (WRAPPER_BASE + 0x2014) +#define WRAPPER_CPU_CGC_DIS 0x2010 +#define WRAPPER_CPU_STATUS 0x2014 #define WRAPPER_CPU_STATUS_WFI BIT(0) -#define WRAPPER_SW_RESET (WRAPPER_BASE + 0x3000) -#define WRAPPER_CPA_START_ADDR (WRAPPER_BASE + 0x1020) -#define WRAPPER_CPA_END_ADDR (WRAPPER_BASE + 0x1024) -#define WRAPPER_FW_START_ADDR (WRAPPER_BASE + 0x1028) -#define WRAPPER_FW_END_ADDR (WRAPPER_BASE + 0x102C) -#define WRAPPER_NONPIX_START_ADDR (WRAPPER_BASE + 0x1030) -#define WRAPPER_NONPIX_END_ADDR (WRAPPER_BASE + 0x1034) -#define WRAPPER_A9SS_SW_RESET (WRAPPER_BASE + 0x3000) +#define WRAPPER_SW_RESET 0x3000 +#define WRAPPER_CPA_START_ADDR 0x1020 +#define WRAPPER_CPA_END_ADDR 0x1024 +#define WRAPPER_FW_START_ADDR 0x1028 +#define WRAPPER_FW_END_ADDR 0x102C +#define WRAPPER_NONPIX_START_ADDR 0x1030 +#define WRAPPER_NONPIX_END_ADDR 0x1034 +#define WRAPPER_A9SS_SW_RESET 0x3000 #define WRAPPER_A9SS_SW_RESET_BIT BIT(4) /* Venus 4xx */ -#define WRAPPER_VCODEC0_MMCC_POWER_STATUS (WRAPPER_BASE + 0x90) -#define WRAPPER_VCODEC0_MMCC_POWER_CONTROL (WRAPPER_BASE + 0x94) +#define WRAPPER_VCODEC0_MMCC_POWER_STATUS 0x90 +#define WRAPPER_VCODEC0_MMCC_POWER_CONTROL 0x94 -#define WRAPPER_VCODEC1_MMCC_POWER_STATUS (WRAPPER_BASE + 0x110) -#define WRAPPER_VCODEC1_MMCC_POWER_CONTROL (WRAPPER_BASE + 0x114) +#define WRAPPER_VCODEC1_MMCC_POWER_STATUS 0x110 +#define WRAPPER_VCODEC1_MMCC_POWER_CONTROL 0x114 #endif diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index 794c2d6f0543..ccbbac2036d2 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -323,9 +323,9 @@ vcodec_control_v3(struct venus_core *core, u32 session_type, bool enable) void __iomem *ctrl; if (session_type == VIDC_SESSION_TYPE_DEC) - ctrl = core->base + WRAPPER_VDEC_VCODEC_POWER_CONTROL; + ctrl = core->wrapper_base + WRAPPER_VDEC_VCODEC_POWER_CONTROL; else - ctrl = core->base + WRAPPER_VENC_VCODEC_POWER_CONTROL; + ctrl = core->wrapper_base + WRAPPER_VENC_VCODEC_POWER_CONTROL; if (enable) writel(0, ctrl); @@ -401,11 +401,11 @@ static int vcodec_control_v4(struct venus_core *core, u32 coreid, bool enable) int ret; if (coreid == VIDC_CORE_ID_1) { - ctrl = core->base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; - stat = core->base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; + ctrl = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; + stat = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; } else { - ctrl = core->base + WRAPPER_VCODEC1_MMCC_POWER_CONTROL; - stat = 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:23 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 07/25] media: venus: hfi: Define additional 6xx registers Date: Fri, 2 Apr 2021 11:06:30 +0100 Message-Id: <20210402100648.1815854-8-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Dikshita Agarwal - Add X2 RPMh registers and definitions from the downstream example. - Add 6xx core power definitions - Add 6xx AON definitions - Add 6xx wrapper tz definitions - Add 6xx wrapper interrupt definitions - Add 6xx soft interrupt definitions - Define wrapper LPI register offsets Signed-off-by: Dikshita Agarwal Co-developed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- .../media/platform/qcom/venus/hfi_venus_io.h | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/media/platform/qcom/venus/hfi_venus_io.h b/drivers/media/platform/qcom/venus/hfi_venus_io.h index 8604b213f03f..300c6e47e72f 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus_io.h +++ b/drivers/media/platform/qcom/venus/hfi_venus_io.h @@ -56,10 +56,22 @@ #define UC_REGION_ADDR 0x64 #define UC_REGION_SIZE 0x68 +#define CPU_CS_H2XSOFTINTEN_V6 0x148 + +#define CPU_CS_X2RPMH_V6 0x168 +#define CPU_CS_X2RPMH_MASK0_BMSK_V6 0x1 +#define CPU_CS_X2RPMH_MASK0_SHFT_V6 0x0 +#define CPU_CS_X2RPMH_MASK1_BMSK_V6 0x2 +#define CPU_CS_X2RPMH_MASK1_SHFT_V6 0x1 +#define CPU_CS_X2RPMH_SWOVERRIDE_BMSK_V6 0x4 +#define CPU_CS_X2RPMH_SWOVERRIDE_SHFT_V6 0x3 + /* Relative to CPU_IC_BASE */ #define CPU_IC_SOFTINT 0x18 +#define CPU_IC_SOFTINT_V6 0x150 #define CPU_IC_SOFTINT_H2A_MASK 0x8000 #define CPU_IC_SOFTINT_H2A_SHIFT 0xf +#define CPU_IC_SOFTINT_H2A_SHIFT_V6 0x0 /* Venus wrapper */ #define WRAPPER_BASE_V6 0x000b0000 @@ -88,6 +100,9 @@ #define WRAPPER_INTR_MASK_A2HCPU_MASK 0x4 #define WRAPPER_INTR_MASK_A2HCPU_SHIFT 0x2 +#define WRAPPER_INTR_STATUS_A2HWD_MASK_V6 0x8 +#define WRAPPER_INTR_MASK_A2HWD_BASK_V6 0x8 + #define WRAPPER_INTR_CLEAR 0x14 #define WRAPPER_INTR_CLEAR_A2HWD_MASK 0x10 #define WRAPPER_INTR_CLEAR_A2HWD_SHIFT 0x4 @@ -97,6 +112,8 @@ #define WRAPPER_POWER_STATUS 0x44 #define WRAPPER_VDEC_VCODEC_POWER_CONTROL 0x48 #define WRAPPER_VENC_VCODEC_POWER_CONTROL 0x4c +#define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6 0x54 +#define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6 0x58 #define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64 #define WRAPPER_CPU_CLOCK_CONFIG 0x2000 @@ -125,4 +142,17 @@ #define WRAPPER_VCODEC1_MMCC_POWER_STATUS 0x110 #define WRAPPER_VCODEC1_MMCC_POWER_CONTROL 0x114 +/* Venus 6xx */ +#define WRAPPER_CORE_POWER_STATUS_V6 0x80 +#define WRAPPER_CORE_POWER_CONTROL_V6 0x84 + +/* Wrapper TZ 6xx */ +#define WRAPPER_TZ_BASE_V6 0x000c0000 +#define WRAPPER_TZ_CPU_STATUS_V6 0x10 + +/* Venus AON */ +#define AON_BASE_V6 0x000e0000 +#define AON_WRAPPER_MVP_NOC_LPI_CONTROL 0x00 +#define AON_WRAPPER_MVP_NOC_LPI_STATUS 0x04 + #endif From patchwork Fri Apr 2 10:06:31 2021 Content-Type: text/plain; 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:24 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 08/25] media: venus: core: Add differentiator IS_V6(core) Date: Fri, 2 Apr 2021 11:06:31 +0100 Message-Id: <20210402100648.1815854-9-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org This commit adds the macro helper IS_V6() which will be used to differentiate iris2/v6 silicon from previous versions. Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/core.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 110287279f05..85047806142f 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -420,6 +420,7 @@ struct venus_inst { #define IS_V1(core) ((core)->res->hfi_version == HFI_VERSION_1XX) #define IS_V3(core) ((core)->res->hfi_version == HFI_VERSION_3XX) #define IS_V4(core) ((core)->res->hfi_version == HFI_VERSION_4XX) +#define IS_V6(core) ((core)->res->hfi_version == HFI_VERSION_6XX) #define ctrl_to_inst(ctrl) \ container_of((ctrl)->handler, struct venus_inst, ctrl_handler) From patchwork Fri Apr 2 10:06:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6A2EC433B4 for ; Fri, 2 Apr 2021 10:05:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8B67A61166 for ; Fri, 2 Apr 2021 10:05:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234989AbhDBKFk (ORCPT ); Fri, 2 Apr 2021 06:05:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234626AbhDBKFa (ORCPT ); Fri, 2 Apr 2021 06:05:30 -0400 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70C04C0613AC for ; Fri, 2 Apr 2021 03:05:27 -0700 (PDT) Received: by mail-wr1-x42c.google.com with SMTP id v4so4284350wrp.13 for ; Fri, 02 Apr 2021 03:05:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7R+42MHtLVjz5D1+bPy8QR3kBlUIryDw6BfwYHtrXnI=; b=E+D8wYKgfKbboUDP058OCuC/Ni3y9Gauzr7vGXM/qJQOskSVL/y/cqQ6hyf6uOK/In QTRWcqcs971RQL2fNsiBe6/g7B2C61nMG9xOh+p3a3NhXqEdluS0oZkrq1TBIeQ8JY0p bjgR/YSRt8beXs6OmF2ot13QzCU1/7w1guq2sTsjbUVm/Xj+vvObp8b8tu/6WEcC/ukf UD0sXWP52aAG+9WJes54M3l2DlM8KyKfpaJuPH/K+Is27hAsB6T0rTVa463wH7vAwIu0 pV12cY3H2AxqP5WnVa1s+3RNQzBz/dAwzZKkG6lDNyLcaxUg3BpIWCi0gNstX3WfyBKF FFBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7R+42MHtLVjz5D1+bPy8QR3kBlUIryDw6BfwYHtrXnI=; b=hwNVRMfttxNRkBhk6hG+DARLSuq4yK4784qf2R92w4m5u36AjJkBhTMBZE/zw1/E5I gUxgVj2riDhjU8r7YtcyGhI2yjRYUtOeSUMyqkvFK/93hvW1Neq+VSoH2/Yj5FWGBB4w F5JbTJFskddNX996gQGYUoyBWq610M9MZ1Boo8qttW4RAtMALEUwnzVbDNm1a+Wzj6Up KqO841eroOOiMzZnP1VQNvb0x0jeNkFjf7OHLRdRT+C5AhHIrlL5F+B3f7ULoZf/J3qL /4wlgPvZK1yJGcNXZiXzq0Sk8uC04FalG/Dny8195eiseQJydpw/Sn9SE2zfyNQWbTKb zniw== X-Gm-Message-State: AOAM531dDVrDGg6LD+KvpVy+y1YwUrxVP5q10ckrR/MMQ4fhiV5NxvUw 5Dz+6+4km7ah0dOwDC+88sGX1A== X-Google-Smtp-Source: ABdhPJxyig7jM7Kn4kClS9i8YydNKtcAeG8wdqOqW/oytaNoyKu8aadEiuJobzr+B3OBct150eWnZA== X-Received: by 2002:a5d:604b:: with SMTP id j11mr14256113wrt.424.1617357926185; Fri, 02 Apr 2021 03:05:26 -0700 (PDT) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:25 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 09/25] media: venus: core: Add an io base for TZ wrapper regs Date: Fri, 2 Apr 2021 11:06:32 +0100 Message-Id: <20210402100648.1815854-10-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org 6xx silicon needs to access registers from a wrapper trust-zone base address range. This commit defines the necessary variable for later use. Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/core.c | 1 + drivers/media/platform/qcom/venus/core.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index 7124d9111001..cf2aa83c4378 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -215,6 +215,7 @@ static void venus_assign_register_offsets(struct venus_core *core) core->cpu_cs_base = core->base + CPU_CS_BASE; core->cpu_ic_base = core->base + CPU_IC_BASE; core->wrapper_base = core->base + WRAPPER_BASE; + core->wrapper_tz_base = 0; } static int venus_probe(struct platform_device *pdev) diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 85047806142f..0c519211fac3 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -95,6 +95,7 @@ struct venus_format { * @cpu_cs_base IO memory cpu_cs base address * @cpu_ic_base IO memory cpu_ic base address * @wrapper_base IO memory wrapper base address + * @wrapper_base IO memory wrapper TZ base address * @irq: Venus irq * @clks: an array of struct clk pointers * @vcodec0_clks: an array of vcodec0 struct clk pointers @@ -132,6 +133,7 @@ struct venus_core { void __iomem *cpu_cs_base; void __iomem *cpu_ic_base; void __iomem *wrapper_base; + void __iomem *wrapper_tz_base; int irq; struct clk *clks[VIDC_CLKS_NUM_MAX]; struct clk *vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX]; From patchwork Fri Apr 2 10:06:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414720 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB231C43618 for ; Fri, 2 Apr 2021 10:05:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8C39561177 for ; Fri, 2 Apr 2021 10:05:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234888AbhDBKFn (ORCPT ); Fri, 2 Apr 2021 06:05:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45490 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234869AbhDBKFg (ORCPT ); Fri, 2 Apr 2021 06:05:36 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A703C061797 for ; Fri, 2 Apr 2021 03:05:32 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id x16so4308268wrn.4 for ; Fri, 02 Apr 2021 03:05:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TpEdR2IV3OYZgpVzePZ+eNmYK6P9QMXJzc4TaX/ELQk=; b=X0DWWLLKc2F+bRVX6HmEEm/ze5bEgsc0OnnHssty+AIW/Hj/0PYJ85KH1rKj2yT5nr ulUkv96arIo7iFiaFyEULoYYdv2DocrCqtskMfMYCbxS5lUMmnM9Gzd9WXlT8tby62y0 MWpNgUCpW1SlcqRRvHxQxgQLhGF6XBeuSH0AhEz6YJatct80WoHVAg6I90C5mDPY01DR OmhpROsubbAZnV8n+YmtUrh1nnE6k97/rEF+GFSMhtEozpZ6RPe1DRA8SCqwusowCqJK 0bDsl6Ia/1EYu1ZUmdwuguYO47TKhYtRvI+bXCaZUfyCdmKOa1a22Iu+MDEsEX85pupq +xug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TpEdR2IV3OYZgpVzePZ+eNmYK6P9QMXJzc4TaX/ELQk=; b=Z2z5YWsbqSPlDx4BG6pgVnymm0FREkiB5e80RW/1TV4hU4VQQ66AWRDnurhq6+uyJ2 u17ADsuyYkdTsfRs+W5KMwWnUdWg2zJgk2WUTW3UQdptCRhhMEQr1BfezBfdJ+r8rEWZ RRlXErwGvm2cNxFSi7pHv5Mm+v3HfnYg8/SEI6oeV+mxNuExTpPGLxMhuPI2g76ZZWMg 4aYV6N5sDSbC03VtnMXCYiVnUSFBlxKVUUAxT6PyfRgsCPc5gVJuRtKH50Fa8vG+DBUe tktLSIFjhGG3fYCavNVp2qH8zyDDLyn4a7XvvKbJvJROiYIO69lPvygmDj6GNDcOo/xy tc9w== X-Gm-Message-State: AOAM530GeajYZSmcCkZOAMvmUNXA2+Thonwg/m01pyw9hBehlwFDCg9d pEkxymLqocQucRsmhE75NWgMuQ== X-Google-Smtp-Source: ABdhPJx6zuju6c6vErH4WLDmvrZPl4ipTPT5k608owgLv8y+rUa463X0GcBz5NC1soIfPn/+QjHLQw== X-Received: by 2002:a5d:58ce:: with SMTP id o14mr14743393wrf.4.1617357931225; Fri, 02 Apr 2021 03:05:31 -0700 (PDT) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:30 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 14/25] media: venus: hfi: Read WRAPPER_TZ_CPU_STATUS_V6 on 6xx Date: Fri, 2 Apr 2021 11:06:37 +0100 Message-Id: <20210402100648.1815854-15-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org On 6xx we should read wrapper cpu status from the wrapper TZ register set. Co-developed-by: Jonathan Marek Signed-off-by: Jonathan Marek Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/hfi_venus.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index 09fc81da0645..dabff8654f97 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -1472,10 +1472,14 @@ static int venus_suspend_1xx(struct venus_core *core) static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) { void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *wrapper_tz_base = hdev->core->wrapper_tz_base; void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status, cpu_status; - cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); + if (IS_V6(hdev->core)) + cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6); + else + cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (cpu_status & WRAPPER_CPU_STATUS_WFI && @@ -1488,10 +1492,14 @@ static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) static bool venus_cpu_idle_and_pc_ready(struct venus_hfi_device *hdev) { void __iomem *wrapper_base = hdev->core->wrapper_base; + void __iomem *wrapper_tz_base = hdev->core->wrapper_tz_base; void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; u32 ctrl_status, cpu_status; - cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); + if (IS_V6(hdev->core)) + cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6); + else + cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); if (cpu_status & WRAPPER_CPU_STATUS_WFI && From patchwork Fri Apr 2 10:06:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25133C43611 for ; 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:31 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org, Dikshita Agarwal Subject: [PATCH v3 15/25] media: venus: hfi, vdec: v6 Add IS_V6() to existing IS_V4() if locations Date: Fri, 2 Apr 2021 11:06:38 +0100 Message-Id: <20210402100648.1815854-16-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In various places in the venus codebase we have if (IS_V4()) which takes the code down paths for 4xx silicon. This logic is broadly applicable to 6xx silicon also. In this patch we add IS_V6() to various IS_V4() decision locations. Co-developed-by: Dikshita Agarwal Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/helpers.c | 5 ++--- drivers/media/platform/qcom/venus/hfi_venus.c | 4 ++-- drivers/media/platform/qcom/venus/vdec.c | 6 +++--- 3 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/qcom/venus/helpers.c b/drivers/media/platform/qcom/venus/helpers.c index 76ece2ff8d39..2515a2225614 100644 --- a/drivers/media/platform/qcom/venus/helpers.c +++ b/drivers/media/platform/qcom/venus/helpers.c @@ -488,7 +488,7 @@ static bool is_dynamic_bufmode(struct venus_inst *inst) * v4 doesn't send BUFFER_ALLOC_MODE_SUPPORTED property and supports * dynamic buffer mode by default for HFI_BUFFER_OUTPUT/OUTPUT2. */ - if (IS_V4(core)) + if (IS_V4(core) || IS_V6(core)) return true; caps = venus_caps_by_codec(core, inst->hfi_codec, inst->session_type); @@ -1084,11 +1084,10 @@ int venus_helper_set_work_mode(struct venus_inst *inst, u32 mode) const u32 ptype = HFI_PROPERTY_PARAM_WORK_MODE; struct hfi_video_work_mode wm; - if (!IS_V4(inst->core)) + if (!IS_V4(inst->core) && !IS_V6(inst->core)) return 0; wm.video_work_mode = mode; - return hfi_session_set_property(inst, ptype, &wm); } EXPORT_SYMBOL_GPL(venus_helper_set_work_mode); diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index dabff8654f97..24cf20f76e7f 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -897,7 +897,7 @@ static int venus_sys_set_default_properties(struct venus_hfi_device *hdev) * enable it explicitly in order to make suspend functional by checking * WFI (wait-for-interrupt) bit. */ - if (IS_V4(hdev->core)) + if (IS_V4(hdev->core) || IS_V6(hdev->core)) venus_sys_idle_indicator = true; ret = venus_sys_set_idle_message(hdev, venus_sys_idle_indicator); @@ -1577,7 +1577,7 @@ static int venus_suspend_3xx(struct venus_core *core) static int venus_suspend(struct venus_core *core) { - if (IS_V3(core) || IS_V4(core)) + if (IS_V3(core) || IS_V4(core) || IS_V6(core)) return venus_suspend_3xx(core); return venus_suspend_1xx(core); diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index c20496a14a55..5cefa396f2b5 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -670,8 +670,8 @@ static int vdec_output_conf(struct venus_inst *inst) if (width > 1920 && height > ALIGN(1080, 32)) ubwc = true; - /* For Venus v4 UBWC format is mandatory */ - if (IS_V4(core)) + /* For Venus v4/v6 UBWC format is mandatory */ + if (IS_V4(core) || IS_V6(core)) ubwc = true; ret = venus_helper_get_out_fmts(inst, inst->fmt_cap->pixfmt, &out_fmt, @@ -722,7 +722,7 @@ static int vdec_output_conf(struct venus_inst *inst) return ret; } - if (IS_V3(core) || IS_V4(core)) { + if (IS_V3(core) || IS_V4(core) || IS_V6(core)) { ret = venus_helper_get_bufreq(inst, HFI_BUFFER_OUTPUT, &bufreq); if (ret) return ret; From patchwork Fri Apr 2 10:06:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81A00C001B6 for ; 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:35 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 19/25] media: venus: pm: Toggle 6xx wrapper power in vcodec_control Date: Fri, 2 Apr 2021 11:06:42 +0100 Message-Id: <20210402100648.1815854-20-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Dikshita Agarwal When in vcodec_control_v4() on the 4xx path we select between one of two vcodec cores to toggle power control bits. In 6xx there is only one core which offsets the relevant control registers to a slightly different address. This patch accounts for the address offset for 6xx silicon. Signed-off-by: Dikshita Agarwal Co-developed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/pm_helpers.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media/platform/qcom/venus/pm_helpers.c index a91dc24de2a4..dfe3ee84eeb6 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -414,7 +414,10 @@ static int vcodec_control_v4(struct venus_core *core, u32 coreid, bool enable) u32 val; int ret; - if (coreid == VIDC_CORE_ID_1) { + if (IS_V6(core)) { + ctrl = core->wrapper_base + WRAPPER_CORE_POWER_CONTROL_V6; + stat = core->wrapper_base + WRAPPER_CORE_POWER_STATUS_V6; + } else if (coreid == VIDC_CORE_ID_1) { ctrl = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; stat = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; } else { From patchwork Fri Apr 2 10:06:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53E9DC41602 for ; Fri, 2 Apr 2021 10:05:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2F53C61165 for ; Fri, 2 Apr 2021 10:05:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234902AbhDBKFq (ORCPT ); Fri, 2 Apr 2021 06:05:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234724AbhDBKFj (ORCPT ); Fri, 2 Apr 2021 06:05:39 -0400 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF809C061794 for ; Fri, 2 Apr 2021 03:05:38 -0700 (PDT) Received: by mail-wr1-x429.google.com with SMTP id c8so4291134wrq.11 for ; Fri, 02 Apr 2021 03:05:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Z7UGuQOdemv2oMoc8naE5ESdlFA5KVU47RowvDDBw/A=; b=RZWnwEPMTOD/SqfAAtj8lLmPKW1RgZzkRNMlIvQVskMyjVR9Pfuba1H64f6O8U8XAV TZd1V1WkcMxJ/pB/0iEtxQh0CDK5DCKS46sXB7hNg38Yb614O8KICbgYPg4+wKCJ/1U8 v/G7PtMBNPh1EpmOcWtTEB/HezTpcN/68HJueRGkNPImoVBxFOiAhXFW+qcF39hZJ/sj gbN/zV+bIgUAMebyDjwEFbxZ9jN8933kY4VUVHhlhul15w7ojmfgavQfeh5KqUTV69Nu yNFVWzYdxK4LMyqtMcc0q/hJmfraJUh4pSdIxcKCniWCKwG/+Xv7R+7raZuT48132TUa CeAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Z7UGuQOdemv2oMoc8naE5ESdlFA5KVU47RowvDDBw/A=; b=qiJGT78qNlckD6RuePfNVy+E6n4WB3xY7l0VFRaP/dL4wziVuj6DDnMdGFc36YJi1j I2qUMVV9huKQdJ4LzY2OuFneaOLPRpJF0e6Z2p5QWLjZOVbk8cDu7dP/TkZNORFM4DBz QvH3tcul0LibzdGSHufKIKVttdiHh4J2W5wUUUfntnswJi9+4SQGi8cYHYPfzHGJLpLP TyI6DwRNMBJlG8eZ50tP8CaVhSOfCSzY495k/EnMOfHa0YQu36SyXbwNgJbe0QXBfp/2 mpKNk4Sy30Ymh7vCexyO7J3r66f/W1bhvmyKR7E2Qrvl2kRLbr7WDjcoiW738PxYFU5S X8jA== X-Gm-Message-State: AOAM5323NTOgcBHwiU+XCAj7cLUCcr8wzk42yOOw65K0CivHmLmddXhV 5WlLIPn7Z/mp86tFu4bDF05P8w== X-Google-Smtp-Source: ABdhPJzIHTvmDD9e2LzC1lgTzAGkC2mxdXk6HJgTG5efd+S4WGD38D8sVsR05QKEFcQLAFs0PlqYow== X-Received: by 2002:a05:6000:1acd:: with SMTP id i13mr14378178wry.48.1617357937428; Fri, 02 Apr 2021 03:05:37 -0700 (PDT) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:37 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 20/25] media: venus: firmware: Do not toggle WRAPPER_A9SS_SW_RESET on 6xx Date: Fri, 2 Apr 2021 11:06:43 +0100 Message-Id: <20210402100648.1815854-21-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Dikshita Agarwal Do not toggle the WRAPPER_A9SS_SW_RESET on 6xx. Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/firmware.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c index 8c2c68114bbd..227bd3b3f84c 100644 --- a/drivers/media/platform/qcom/venus/firmware.c +++ b/drivers/media/platform/qcom/venus/firmware.c @@ -53,10 +53,12 @@ int venus_set_hw_state(struct venus_core *core, bool resume) return ret; } - if (resume) + if (resume) { venus_reset_cpu(core); - else - writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET); + } else { + if (!IS_V6(core)) + writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET); + } return 0; } From patchwork Fri Apr 2 10:06:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD5E0C41603 for ; Fri, 2 Apr 2021 10:05:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CD65A61165 for ; Fri, 2 Apr 2021 10:05:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235174AbhDBKFq (ORCPT ); Fri, 2 Apr 2021 06:05:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234626AbhDBKFk (ORCPT ); Fri, 2 Apr 2021 06:05:40 -0400 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AC642C06178C for ; Fri, 2 Apr 2021 03:05:39 -0700 (PDT) Received: by mail-wr1-x432.google.com with SMTP id o16so4331736wrn.0 for ; Fri, 02 Apr 2021 03:05:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b46nTbsZeh6iAZ6HbCYVxnlS3c8ZIKectHfSK1nlNZU=; b=Txmm2M/Uvq/RjX25n3ccoHvfLHBzOJtNvk/wxa2+pz6ca52d7kKZZ0SLLEIOOEjNXk mn8jCwoeLl29tDGmP+FnwwqebL2tOoo/qegfqhxDEECCPQviAU/I2msSbpyvQ7Fvy5dH 9JegzgApLACjcoc1tV/tMjE7PKZ6rnVMQ4fVPlxFWDU2owk6BgqGb7aaR9WAj7bH2QZx BwYALDGOKVYLpEuEFnZiAbHci1wn8S6XEnJ+p32DjaDqzX20mbd2+fl2OaojeYIU3Lqi erIg3P7TeDJ6nZRwjs+6Drnzk7KmLo3A/qfdOduzJYpQ0lIExXRNVwWNCKaGy74K5nom PtEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=b46nTbsZeh6iAZ6HbCYVxnlS3c8ZIKectHfSK1nlNZU=; b=Jd3809C1CjfwhnJB0A2GiwhmArvWAlXmvLGzKwNhqEAZmSkKBV4wMHg7ai5XZLIlAg kgG5E4i5pdwfOxSGQc+acwTMJBZuGt/0ydTc+vos8eLASdUznbk/QtidsSLTc2NvU0cC j0fg9DY9BkeadtFOmM+uePkDJOZZKmD0oanlhZ2XpuVj8G5QzrYKxX5JA/PwRE4sB9lW POn4Fa9y1oDudk64dsQHGLmCEbJd+wy9FswP9jiJyYAMdXs5ypzKYsk6lQ/KvNO3OsmS +bdR5irBOOwO8GMvRq4lQslBb7lpoBUKi/tLqIRuAdp+JowxaVlWHbJt3VUE13J3OwWr Wgkg== X-Gm-Message-State: AOAM530oayqZM7LGvx8gOEdISmw5crUwpEBTsyhoalMNdhATMMhEMgZ+ n5yuCgGGnLTSHH77MZ436N3ehg== X-Google-Smtp-Source: ABdhPJx+By/3uU6xnJLHZlv7nzadMqu30Y73RgvnxX5ec1pGT03Nj6hUWDE8MyjPEm7KkIR5SjU9lw== X-Received: by 2002:adf:e843:: with SMTP id d3mr14758931wrn.56.1617357938402; Fri, 02 Apr 2021 03:05:38 -0700 (PDT) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:38 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 21/25] media: venus: helpers: Add internal buffer list for v6 Date: Fri, 2 Apr 2021 11:06:44 +0100 Message-Id: <20210402100648.1815854-22-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Dikshita Agarwal - Internal buffers required by v6 are different than v4, add new list of internal buffers for v6. - Differentiate encoder/decoder buffers for 6xx Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/venus/helpers.c | 13 ++++++++++++- drivers/media/platform/qcom/venus/hfi_helper.h | 9 ++++++--- .../media/platform/qcom/venus/hfi_plat_bufs_v6.c | 4 ++-- 3 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/qcom/venus/helpers.c b/drivers/media/platform/qcom/venus/helpers.c index 2515a2225614..8b08632b0296 100644 --- a/drivers/media/platform/qcom/venus/helpers.c +++ b/drivers/media/platform/qcom/venus/helpers.c @@ -279,13 +279,24 @@ static const unsigned int intbuf_types_4xx[] = { HFI_BUFFER_INTERNAL_PERSIST_1, }; +static const unsigned int intbuf_types_6xx[] = { + HFI_BUFFER_INTERNAL_SCRATCH(HFI_VERSION_6XX), + HFI_BUFFER_INTERNAL_SCRATCH_1(HFI_VERSION_6XX), + HFI_BUFFER_INTERNAL_SCRATCH_2(HFI_VERSION_6XX), + HFI_BUFFER_INTERNAL_PERSIST, + HFI_BUFFER_INTERNAL_PERSIST_1, +}; + int venus_helper_intbufs_alloc(struct venus_inst *inst) { const unsigned int *intbuf; size_t arr_sz, i; int ret; - if (IS_V4(inst->core)) { + if (IS_V6(inst->core)) { + arr_sz = ARRAY_SIZE(intbuf_types_6xx); + intbuf = intbuf_types_6xx; + } else if (IS_V4(inst->core)) { arr_sz = ARRAY_SIZE(intbuf_types_4xx); intbuf = intbuf_types_4xx; } else { diff --git a/drivers/media/platform/qcom/venus/hfi_helper.h b/drivers/media/platform/qcom/venus/hfi_helper.h index 6b524c7cde5f..f367f43c9fb7 100644 --- a/drivers/media/platform/qcom/venus/hfi_helper.h +++ b/drivers/media/platform/qcom/venus/hfi_helper.h @@ -395,11 +395,14 @@ #define HFI_BUFFER_INTERNAL_PERSIST 0x4 #define HFI_BUFFER_INTERNAL_PERSIST_1 0x5 #define HFI_BUFFER_INTERNAL_SCRATCH(ver) \ - (((ver) == HFI_VERSION_4XX) ? 0x6 : 0x1000001) + (((ver) == HFI_VERSION_4XX || \ + (ver) == HFI_VERSION_6XX) ? 0x6 : 0x1000001) #define HFI_BUFFER_INTERNAL_SCRATCH_1(ver) \ - (((ver) == HFI_VERSION_4XX) ? 0x7 : 0x1000005) + (((ver) == HFI_VERSION_4XX || \ + (ver) == HFI_VERSION_6XX) ? 0x7 : 0x1000005) #define HFI_BUFFER_INTERNAL_SCRATCH_2(ver) \ - (((ver) == HFI_VERSION_4XX) ? 0x8 : 0x1000006) + (((ver) == HFI_VERSION_4XX || \ + (ver) == HFI_VERSION_6XX) ? 0x8 : 0x1000006) #define HFI_BUFFER_EXTRADATA_INPUT(ver) \ (((ver) == HFI_VERSION_4XX) ? 0xc : 0x1000002) #define HFI_BUFFER_EXTRADATA_OUTPUT(ver) \ diff --git a/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c b/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c index d43d1a53e72d..776581b99cd3 100644 --- a/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c +++ b/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c @@ -1233,7 +1233,7 @@ static int bufreq_dec(struct hfi_plat_buffers_params *params, u32 buftype, } else if (buftype == HFI_BUFFER_INTERNAL_PERSIST_1) { bufreq->size = dec_ops->persist1(); } else { - return -EINVAL; + bufreq->size = 0; } return 0; @@ -1301,7 +1301,7 @@ static int bufreq_enc(struct hfi_plat_buffers_params *params, u32 buftype, } else if (buftype == HFI_BUFFER_INTERNAL_PERSIST) { bufreq->size = enc_ops->persist(); } else { - return -EINVAL; + bufreq->size = 0; } return 0; From patchwork Fri Apr 2 10:06:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64061C001BD for ; Fri, 2 Apr 2021 10:05:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3B9266115C for ; Fri, 2 Apr 2021 10:05:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234687AbhDBKFr (ORCPT ); Fri, 2 Apr 2021 06:05:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235040AbhDBKFm (ORCPT ); Fri, 2 Apr 2021 06:05:42 -0400 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB60BC06178A for ; Fri, 2 Apr 2021 03:05:41 -0700 (PDT) Received: by mail-wr1-x435.google.com with SMTP id o16so4331817wrn.0 for ; Fri, 02 Apr 2021 03:05:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aDqQvCRa3kdfOyvfWacjxvKlUGJz1tew7Y5b7q0Z5aE=; b=YFH9+bBCpogKNSZmqzps1VvtLkavlabqgxOt0LB78PW3SnOfwPQxTlkmmp2aR+zia5 vtqBYDI9+9jEuKRr7XtCEdMqSaNsf288IA0jNwt+fkuE5f29qaj96Ix8v27GESHjXr0i adIrkXAkeCh94eqyehP1mo9GWO5GSzuNLWALCHG/VyKO1E7DXgqrYTsc3N/MvryaZUzi 0O39INlDGMPCmZzPCqb89WpR9GGhN4TW/qcmBI0guKPT9wux7N38xMUFkzAI7Scr25xs 1IFZr0fAdRfGwm9a+tcSKOrl4lVd9plNA53r2w0fiJaaC8x/HcGdVU7zd1cBfF2c1k0J URmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aDqQvCRa3kdfOyvfWacjxvKlUGJz1tew7Y5b7q0Z5aE=; b=iBihtbDZl6gdXg267we/ub6Grc9AH5K8qfwtQ0FsgHyL9Ce+xRy88F1ioszIX5LAS2 8reJHA4kxXj4301SzlGZP7MzMIV2DI0/NyGrtNyN/vYK8/AZUBZeNUB/PNWFNaUOm7IH Dh6p736B/eSysYXCfKkb76jw0EhHJSruTsWSRnxCf0FvGWkmoO9XnFe5im/KZmTP1Ryn Ht2UNahhqRcTXrrpM2XwGUTkg9ljK3h+WyejsEg4Xvee4N2um4PVnGhkLB2bMe/5XMIt glJLfxtkDnsMDuC8c/GjiRbkrNr2GWRtX9nWJOLr8CbdJmW7M6uXf3m0BOoxB5ZCWBrq CAZg== X-Gm-Message-State: AOAM530coFgbGQeVgpa5rkVJqyrODfQWFX8YS+xdLucV0RVeYfC+ZHxE 1smsZg/0uutu3HP3mVoctx19sQ== X-Google-Smtp-Source: ABdhPJzpFt0pBzp6IwLvJYQAIoehMWFOmkW0wDnyWOYgY4YlIkErixZi2x9t59RhKxeld/whrCE7tg== X-Received: by 2002:a05:6000:12c5:: with SMTP id l5mr14153031wrx.208.1617357940412; Fri, 02 Apr 2021 03:05:40 -0700 (PDT) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:40 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 23/25] media: venus: hfi: Increase plat_buf_v6 o/p buffer count. Date: Fri, 2 Apr 2021 11:06:46 +0100 Message-Id: <20210402100648.1815854-24-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Dikshita Agarwal Presently, minimum buffer count for output buffers for h264 & hevc codec is kept as 8 which might not be sufficient for few use cases so increasing the value to 18. Signed-off-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c b/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c index 776581b99cd3..4979d493f4d9 100644 --- a/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c +++ b/drivers/media/platform/qcom/venus/hfi_plat_bufs_v6.c @@ -1159,7 +1159,7 @@ static int output_buffer_count(u32 session_type, u32 codec) case V4L2_PIX_FMT_H264: case V4L2_PIX_FMT_HEVC: default: - output_min_count = 8; + output_min_count = 18; break; } } else { From patchwork Fri Apr 2 10:06:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 414714 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B48B3C43470 for ; Fri, 2 Apr 2021 10:05:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 96BDD6115C for ; Fri, 2 Apr 2021 10:05:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235176AbhDBKFr (ORCPT ); Fri, 2 Apr 2021 06:05:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235087AbhDBKFo (ORCPT ); Fri, 2 Apr 2021 06:05:44 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79BABC061788 for ; Fri, 2 Apr 2021 03:05:43 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id k8so4317747wrc.3 for ; Fri, 02 Apr 2021 03:05:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mdYuWwgCAgpe/tpCk/WPHQPCQeWl/PCSYj7cNktgbbg=; b=IQjVngtaEmv8R+bycJCfbeb4LCx60QpT0m+RAJ7LHyxaDRtdLhSMJhkSHcwO4e8XgA qr/emy+/hycZKPNrpCfCLWFZ7C2KdgVGXEoJTuuISSotKViPbeDBZ21AmWYhZ+45p0vq a+wo97dJNDZqIuflUgjpLT1sAu3WZT0y64ZyuweW5oyW3SFNCjLMrfX2hqf2zeOMkR3b K0Vo7cD7WjFu46mC7zjzgnj9GjBsDSMyX9rXFf1FTmKe3ltntKD0T10mu3Cw/5g5b2W8 9lSL+1di3+oO+MKHIDOmaDQKTqpfstQXJH0vJD3oty4AfqU/WXthLzC8A5YcYrGHk/U6 /pZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mdYuWwgCAgpe/tpCk/WPHQPCQeWl/PCSYj7cNktgbbg=; b=mRwxNy6VLBX1rH4vyVZVzK/K561pQSOoVLjdfOed0Q9UFO3qG3zevjEdFM/6oOEYsN rWY5qvgNvpxBKCUlXTIRj5QPTzpPVvYjjDQBLFkfX/R1JyC18mIUAJofNHAsp4WfY5/T awoZHzrIDW1fUnXmbzeiJjk4NNngQNVlSbu6f69YsxSHF5kbaWiRYLf3xbZ7B3o5wM0n Xvb4Y9IC6Q9KP3TJc6eEfp/4QLqKWLyxPz/lV8ssWzLm1L853PhABn5lfZgpiE5motzk ra1lO3XTI9YrKW1iVpyxrDsrP6WsaH5LV8RRPbtuIcld2HE0LwJOCiMgcKHv36SQXMZD mnNA== X-Gm-Message-State: AOAM5327ulI7ZBL70naGlWnQGE8+SjWJTyZGmDR/NwifC+bsc/6S4fX6 sgPLrFkt482LQDMdzGBAZJS92g== X-Google-Smtp-Source: ABdhPJzBaRKTuvXu72RbacAbK15IHL4Zj8LyA1VmGP4kKBs0i+dJ6YN2hBwFe6gky8aamXoVR1RB6A== X-Received: by 2002:a05:6000:1acd:: with SMTP id i13mr14378546wry.48.1617357942265; Fri, 02 Apr 2021 03:05:42 -0700 (PDT) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:41 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 25/25] media: venus: vdec: Fix decoder cmd STOP issue Date: Fri, 2 Apr 2021 11:06:48 +0100 Message-Id: <20210402100648.1815854-26-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Stanimir Varbanov Fixes an issue when issuing a stop command to the controller, negating the following firmware error. "SFR message from FW: Exception: TID = Unknown IP = 0x3b7dc FA = 0x0 cause = 0x6" Signed-off-by: Stanimir Varbanov Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/hfi_cmds.c | 2 +- drivers/media/platform/qcom/venus/vdec.c | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/venus/hfi_cmds.c b/drivers/media/platform/qcom/venus/hfi_cmds.c index 0bcd434e7876..fb64046d1e35 100644 --- a/drivers/media/platform/qcom/venus/hfi_cmds.c +++ b/drivers/media/platform/qcom/venus/hfi_cmds.c @@ -254,7 +254,7 @@ int pkt_session_unset_buffers(struct hfi_session_release_buffer_pkt *pkt, int pkt_session_etb_decoder(struct hfi_session_empty_buffer_compressed_pkt *pkt, void *cookie, struct hfi_frame_data *in_frame) { - if (!cookie || !in_frame->device_addr) + if (!cookie) return -EINVAL; pkt->shdr.hdr.size = sizeof(*pkt); diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 0fe4863371e2..04f457cbf631 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -515,7 +515,10 @@ vdec_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd) fdata.buffer_type = HFI_BUFFER_INPUT; fdata.flags |= HFI_BUFFERFLAG_EOS; - fdata.device_addr = 0xdeadb000; + if (IS_V6(inst->core)) + fdata.device_addr = 0; + else + fdata.device_addr = 0xdeadb000; ret = hfi_session_process_buf(inst, &fdata);