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Signed-off-by: Dmitry Baryshkov Reviewed-by: Taniya Das --- drivers/clk/qcom/dispcc-sc7180.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sc7180.c b/drivers/clk/qcom/dispcc-sc7180.c index f487515701e3..3334bf9cfb94 100644 --- a/drivers/clk/qcom/dispcc-sc7180.c +++ b/drivers/clk/qcom/dispcc-sc7180.c @@ -19,8 +19,6 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_EVEN, P_DISP_CC_PLL0_OUT_MAIN, P_DP_PHY_PLL_LINK_CLK, From patchwork Fri Apr 2 20:57:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414387 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705362jai; Fri, 2 Apr 2021 13:58:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz2mEKI+RPTZh5fE7WJSsiWOamlgUetzlqtXRljsgKUUbXnA7ERU0N6hilYzJSCYPoxLpwE X-Received: by 2002:a17:906:4d8f:: with SMTP id s15mr16065328eju.350.1617397099542; Fri, 02 Apr 2021 13:58:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397099; cv=none; d=google.com; s=arc-20160816; b=JxbrZ8pKAzf8Hw/Tfa5oIkqN7kCW36q+zzyXEwmC5Uyq5i083xC0wVqUuQoOIomBtL EntS5/XTtW+bCTBzuTlqnRnHUXlgz4K/wbeuhdMFYE9eoCairTb8wl7LWJ3ulgqtbr9Z +fl7Wm3XYeyG+QTQeg/HeJHoHEGibggKwNdM11P0/RDfJxMx1ho657JBl5eidTE6/EEH KNJoY4WwGPdKnmjADcpB9vz4lK3SIezkx/jN1rLZsBaZ6CUQnz0eequXN7NSm2mwTOQ5 JwPFPkOXPXR2cqTyuyeEOTeOU5CT7TLdEoELSDNsf2L1iQ8VPzFQ8e9aBaOqLwKVHaua ukzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=r9B4hH0XQcWzr0ChjxI/N+85fa5tVGRkG7jorPots9g=; b=LCOxOjX7z0me+I9wDNAlwLmwRzEVb7qUrPekK7f2F7talIqgRmbRlHDolxRDGR9fDE nw5aJAlJ0i/68yBjMbEtLao7Gz1wOBMw5uhdU/ukOVe3R77GxXPeq2XEIEcVDPdIj/xF XGzbQESQoxsub+JSz5HzboEqvp/sui4PF08XIEx+0VJk7+J+wvS8645CZnTvpIqCTz8C mzVsABbUsTCAUSBenVicpJrZqGuOhFrFuwJgXSI70wasuX6zLomoLRvBRHSUtAyDNZdN mH56ROjcru2mcM4wDWL/zp+gP9ZGo9dMSev4dyi6cHlWlyo5dLiN0ga914z5mTfbNZBd Jwbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LfxJvu5o; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sm8250.c | 8 -------- 1 file changed, 8 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index 588575e1169d..86275814e055 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -21,23 +21,15 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_MAIN, P_DISP_CC_PLL1_OUT_EVEN, P_DISP_CC_PLL1_OUT_MAIN, P_DP_PHY_PLL_LINK_CLK, P_DP_PHY_PLL_VCO_DIV_CLK, - P_DPTX1_PHY_PLL_LINK_CLK, - P_DPTX1_PHY_PLL_VCO_DIV_CLK, - P_DPTX2_PHY_PLL_LINK_CLK, - P_DPTX2_PHY_PLL_VCO_DIV_CLK, P_DSI0_PHY_PLL_OUT_BYTECLK, P_DSI0_PHY_PLL_OUT_DSICLK, P_DSI1_PHY_PLL_OUT_BYTECLK, P_DSI1_PHY_PLL_OUT_DSICLK, - P_EDP_PHY_PLL_LINK_CLK, - P_EDP_PHY_PLL_VCO_DIV_CLK, }; static struct pll_vco vco_table[] = { From patchwork Fri Apr 2 20:57:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414388 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705366jai; Fri, 2 Apr 2021 13:58:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwLtzAJ0m3fpanC5BOf+qHVXDCxmYWI3Kx9xDs9BOMfLJWN0BOh0KPe7wWcYfLF84KshDVJ X-Received: by 2002:a05:6402:4407:: with SMTP id y7mr17479938eda.247.1617397100161; Fri, 02 Apr 2021 13:58:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397100; cv=none; d=google.com; s=arc-20160816; b=AGmYgBzFx4d5wP82mcXnKoqyZj1wK7HKcqPL+Uce/kT/Rry8FZaVeMguHdC7EpHM4l zqaqi6yfNoqj1pg9pNzNPzpQLH59TuNemt4raafWEyMaqFG+DyOzsabgOyWL+LGbT8Ak ReNhT2GbVH74NmKZWIL1/q9GfCfHOLe9uGRZoOD1g77uP37cr6MEYmfUZQhRo6iip4g2 jNuiMAG6bTp5Skp+n9r0yfa8eSrJjZ1y3yfquOGm1EkTDJK80zzoRZnTKwolHMGUehcm YvQTZoQoWe6OKziB1sIpU44symtYdvzgFhwsqHhGmh20DyIoW51rbqWAHRQXvVudA5yd bQ1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Yw9v3FzQxmFiB5ZmaLj1VaafcFx5aWR8q2x1pRfX23w=; b=jOh75f/9qNIuHGOgfnwh7LZCAjTyrA53fLItcODndN61pJXhs/QbOQ0wIM25se/r0F ynHKCdb9645ijTPyCzp77uFUMa3htlYdLDJxYMCTBzKAVEkxjMPcKfWSTo0BvjRX4xFl 2NH2aTsfu50fcUGBYaUjRCaJLaDV6fCZzDn/in7scyP7g6X+S3I9oq5nYx34qhHUCimD x/Z/AKwCOuFRnPs8vTB+awwzqOZFrk0j9tMKqRTrVz0qiufAs49XSPEFULj5A9Wc1mED pUZVbBhUn08skYccAC1dKchFTLn6OSYHpD7e0yw69B2RFQ800r4IIQnVP4nSGnyGrpnY wYRw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EdE4Uaue; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gcc-sm8250.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gcc-sm8250.c b/drivers/clk/qcom/gcc-sm8250.c index ab594a0f0c40..86626a027f6f 100644 --- a/drivers/clk/qcom/gcc-sm8250.c +++ b/drivers/clk/qcom/gcc-sm8250.c @@ -25,7 +25,6 @@ enum { P_BI_TCXO, P_AUD_REF_CLK, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, P_GPLL4_OUT_MAIN, From patchwork Fri Apr 2 20:57:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414389 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705378jai; Fri, 2 Apr 2021 13:58:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwpGQ+MkKMKYE8CZwWQeonQ4mHwUOn40u8Nm1c5oa58hZNYUPmerIFe1GLTxlz6rKHclss+ X-Received: by 2002:a17:907:e8f:: with SMTP id ho15mr16180946ejc.541.1617397101164; Fri, 02 Apr 2021 13:58:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397101; cv=none; d=google.com; s=arc-20160816; b=lJP0bv6nEERZ414y6PoRFYrioTgsJAWu1yhNeJLVijz9ERwuqEJE1RW4hjNsqm2hTd a2wFnN818X6Px/9tutStAZT+FwO+IhlMKqHOQcPbO8Kdl5CxI/dURHaBuo2fKNkDqhXN RkCZNPtHfze0xVbzJedqWx3vaPH74gTAfw6LizreVsUWazKwogHaaj7Mk9PacanPvFeG bcGR61VOLsXrK02WA582tfbSpkdbvIXWHJfDszrZHbTURqbS32WWvDmmVenUXdSe6KxI efPZcGtFtEd8ZxilDtVq58xS68txATVXdyCGdBNgpUUVBiDq59SrCVFrw+sKFTM6mUws 4drA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=dCFJAklUokvx3G+IzOXh/1EQ/pUoJjWKvsCg2z2tyJc=; b=zegoQR+FOHUn8Q/KyHqr0F10PNGeh9hJ8icboFywodUNNhAAyqxsGYufg//idbFE9K 9iuWZ00uGXns67FOyEIf/nOdrphdgiTeLJJJD3VRZiw8+MeYY6nBvjB6xTP110wFYH4j ovG8CYlZjcQpHDD2FqkQ9IXw8xQNXFrQPjdPb1IcjQpetxIXu+4XsDxFgJ+bLUyZhxDh cpcHEKYZbaj9b15DfbrqvnWXaodJrquUjkJfo4jANeM/ORmAg27RCw0NpwnSzUn/Ey2L 06WlVz/88Ot3zaARWI7CO03Mnq4858QZgwdmU87+dnua2Ftcchr01RD2PefjhzkceYts xDZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RQseK+v2; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sc7180.c | 3 --- 1 file changed, 3 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sc7180.c b/drivers/clk/qcom/gpucc-sc7180.c index 88a739b6fec3..d738251cba17 100644 --- a/drivers/clk/qcom/gpucc-sc7180.c +++ b/drivers/clk/qcom/gpucc-sc7180.c @@ -26,12 +26,9 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, - P_GPU_CC_PLL1_OUT_EVEN, P_GPU_CC_PLL1_OUT_MAIN, - P_GPU_CC_PLL1_OUT_ODD, }; static const struct pll_vco fabia_vco[] = { From patchwork Fri Apr 2 20:57:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414390 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705385jai; Fri, 2 Apr 2021 13:58:22 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxTIJS17jLT23WNvRR2iiyXm5WMkcgeuUx1EvToRbUwG5QBxFD2gqaVIU50DidIohTp0LEz X-Received: by 2002:aa7:ce0b:: with SMTP id d11mr8191308edv.209.1617397102249; Fri, 02 Apr 2021 13:58:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397102; cv=none; d=google.com; s=arc-20160816; b=NHDEkBlYqw/V3xXSkvRNKWfqKN7PhFal2E4/3gCrXatuVG9cNME0QKmLM689EJQeS7 ws2Z1osM8d0mEglCxlu2dTSWWiw+PaI+GT7ydgoZS1KeJPohutYi7+TBm2OZDox097Zz Ct7GC1fv5JivylZS1Lo3jNOZkti0xFtXG8ycDmkD4ZjGRgoqDuzjGC57OAbg1Yi+qnbH Q6+EZLhtFTsj6ey/icCIRVoxZIaRnWciWuBEBQLvh86lZ0teiIunHtuxhEQpilHecrKJ nt9NaNGDC9GykST906MaEPEF1R7ZYwSCn2c4r30CTFh2lWr2oeRtpBSVVu5epCM3IZbO 9FCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=kMkSpD3OcWTd6f37s3IGkgZFUGHa0Z/7pX7Q5b4doiI=; b=M+MCpgnLi0hVHojkwifZtTkWyHC8EsaRh8SpH6pZq/imBGl6cLx1LtWijEBaz7pTnj t/8dwdaBF924fAA7A7Mto5eSSOz1lRdh5VuqQid22Nq9XIYNmlGZDcroxImddSeUH0SU Fsx4/2qFHT4B2hmkgC9WsDYzfuc9JWrRMeCxCIEt5U4Y8XQp6G+vh3o7zd3ghzd9cQy/ F4Vu0fQItEvQMpgaZmvy3wB4LZxRrmEWdoTB6l4YHSAbrnYnf1LlYcQXfHLNbT6qVHBf jcY2c94SsBmQ+NEStMnx8Cp31QE0T3auZWcEitj4hpY75/Tbw7JewVOj2XCr4TOWOE8w zUdw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fR7Mm9cV; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sdm845.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sdm845.c b/drivers/clk/qcom/gpucc-sdm845.c index 5663698b306b..2d7dc89915e8 100644 --- a/drivers/clk/qcom/gpucc-sdm845.c +++ b/drivers/clk/qcom/gpucc-sdm845.c @@ -30,9 +30,7 @@ enum { P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, - P_GPU_CC_PLL1_OUT_EVEN, P_GPU_CC_PLL1_OUT_MAIN, - P_GPU_CC_PLL1_OUT_ODD, }; static const struct parent_map gpu_cc_parent_map_0[] = { From patchwork Fri Apr 2 20:57:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414392 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705409jai; Fri, 2 Apr 2021 13:58:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx97cJVvIHAQVNy6ne/pwX9dnT29LMijUKkFzEe5YAKMZimJJuPP+/E7dIq7UPTOqPemLvY X-Received: by 2002:aa7:ce0b:: with SMTP id d11mr8191448edv.209.1617397104687; Fri, 02 Apr 2021 13:58:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397104; cv=none; d=google.com; s=arc-20160816; b=FYy/4bI8GXoRRcXxMlWb0atS7VsfInAQeme+uZkXpyuTYMnTyQIaTrB08f6BAAaYcq 5v5k3kvzMbFY7qBgdapx57t7n8AVBb5VNx3TxxOkxMe3SZ0xNKrHs6wrUMaViLH2NKA4 fRnIhhXBviRkjn8T0xjPBcHGygDM4/7rrn1fQWqbBvCyH4yff/Y5eK59BoOdbmO0TZhT Ey+IKflR+/lLWTB8MbwIUIRfQYBW1qD26vwn8egpe0bNJCoe13JV4ZGPKg6mBZNiHREn nMNhY3MT/wBJUMdy8W5+qe/ph9lwS4wfv0vAjGnrJx0c7rjGDvVvlEjc7u37aLYrDRZG /Upw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LaVGcGxnlvWl/N60TSPqkBXVPvOJpnJu23KDJt8v/cE=; b=zhucytQZxzM8ZQOJxF1H82PeRlaxVpnwWJb/oOC6bguR0ph2dCC0eL+iE6EEM2Z9aT cIkUL7ObkoO3Z1gxFvtjoG3UffYYN9tzO41xo/PqP3F1UIuI2f0Gn7kvG0U4vIux08QC xfbZKzoGDSP9ZkdXiT0rLsqOCxFDf8+Tc8zWH7X+CmGDueDo7HpqA5j6m3iD2TVJxNn8 ldL9Vkky3RuV3rx8c3VzzKtPoKf/W67CippyLbTT476LcdMZkIEAErBc3ySX0kQAemZ+ JSDVC12hLpkusVCGQA9r0PATqEpLksdBpCvOhoFn19Brn2YPV/wQSwGrMfUCXEjrWw5M 2pzA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=V9QLJFr5; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sm8150.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sm8150.c b/drivers/clk/qcom/gpucc-sm8150.c index 27c40754b2c7..2b952f561537 100644 --- a/drivers/clk/qcom/gpucc-sm8150.c +++ b/drivers/clk/qcom/gpucc-sm8150.c @@ -21,7 +21,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, P_GPU_CC_PLL1_OUT_MAIN, From patchwork Fri Apr 2 20:57:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414391 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705394jai; Fri, 2 Apr 2021 13:58:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyECbVP4f2l4MfPLAJlTkfiJoelFoLcrzrJ7TbA6NVSEAWC9USIYGG87vqepyt0F3v7tZ78 X-Received: by 2002:a05:6402:4309:: with SMTP id m9mr18134653edc.25.1617397103399; Fri, 02 Apr 2021 13:58:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397103; cv=none; d=google.com; s=arc-20160816; b=gPvR6QjteLsh/hdN51Too9EhJ6K/qZj/5z/MjZqS42IVb18MizmLzexUJBGRjfUiO2 BceXr8VEk/xbPHtpBTDLoN+yOU2T4aDmpUGAIjNm07er8PT9s7PEBSzi/sk2bAXtaHPT JJ7UoA0jF7gcBiw11prvo3SY/9mj6C9sVY6jWk5rA9xV2HsGN+ux3/R17oWtU4wILa16 FV2q7zJJABM0rXdODgkC/yYpUY7TlCMSFgmXQeZLLIbGYR7ktVhzcA0D5XIwOCOAFdCD uAMoT8i15qmKypT28ivGsCAIEa/hVyg8FAyqDgQ2m4wGENuDIslQyGnego1M6gLTbvJ0 Mq4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1jU9us/3mI30guyXLRXo1PxXu6Cnze2Bw7/gT4xxmgc=; b=aB/od4pxoBJJywWGMQGafwKqRUnjQY/AQ2uSGySidJtwK6sfG26AE6tfvImqa7LQmy e4W9eXnbVBw/N0cik4zcRZEEKjSJv+1RmmhyhVUmfLXvcRwmqgkgecbl5Ms2PI2eCHpy lNKIfiJZReerbGdduKHyEOsRpJhlCw0qUfyxcBQj3QkQj7LgVu19c7Lgnvqd3fQzK4tH 9HyfctRQ3vcEpjTrbMA7PTr5yYVOmSnktAm/25T6UNTHfFUBUmTOeFxZ+WdZm+WRKXMl qEqVaM+YQP2gIieA8GNPtDrpeLM0B5NMDnIOS6KMbL6OT9QFY9cvY3SxK52vkZjgRxbg DAgQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GTnbEgbK; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov Reviewed-by: Taniya Das --- drivers/clk/qcom/gpucc-sm8250.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sm8250.c b/drivers/clk/qcom/gpucc-sm8250.c index 3fa7d1f9ff98..67c136a77efb 100644 --- a/drivers/clk/qcom/gpucc-sm8250.c +++ b/drivers/clk/qcom/gpucc-sm8250.c @@ -26,7 +26,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, P_GPU_CC_PLL0_OUT_MAIN, From patchwork Fri Apr 2 20:57:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414393 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705454jai; Fri, 2 Apr 2021 13:58:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxXWy3FqumM3uxqDrSs/Y7VJBkjmjLnk+5ynWIlCpSSScb3ZhESRz14I0xoG6O+kJbQYsze X-Received: by 2002:a17:906:4cd6:: with SMTP id q22mr15818007ejt.469.1617397111711; Fri, 02 Apr 2021 13:58:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397111; cv=none; d=google.com; s=arc-20160816; b=f/oGF7UmJTc66aIQZXH4wi5SGocr0IOn9DIfm2XgSnlk4otGxRC5GivdylRpxQyZWZ wkRjlGeTMafUtBKWncwLZhzeigrVUhi9ULdSB1VKvk1rylpEcv7NX5WD1gryL956zRhC 5P8+NtBbrPAIOYZlVU5zdoFcr3yLDDxd6cdXY3tFTR6eT0u9EGr0KxPeu7vzakrhbfIB vXhLRrBVa8hS7WYm5frlZaYCvztaHf5x10VhL/A3VYTCmBKMtpdph7txejjZdl3KpV2e GHN6LDmvuoSC4fsaFMd7SkJRxjy3Iebg4NCZAsMaRYuPO+4md8/Oxy4U81gUSGOEJ5ip G9SA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=b5s+r9vXI8ypakYfW1qP+Mc/8XhHgo5jUKnSXepZgcA=; b=X7XP/ZCpiRDna04+sy5uZJ4zrRe890423fk+l//xjJEuWQtJR/x9n6ZCS/Nfn9bww6 gByAlQD6o44VThbLB/9yNqw0lCQxepw/VgglxgZZBR2CIFVjBLeJ6ytQhd9s0THhpsRF rbanp/W4IUg3UipIsky/4boX5RoyRVodUVkLkR+fnRMeZkGKRwTOQlaY8R5K0CkbOTG6 HeTM6xamUQuRZvdzf4+Q2AzoIcztBf8toBChN/lrOlH3eDJWDl3sh3zA0CFULYuGsLbU tSqAtOBngwL0fMHU+MdZ8nVvBpDP0Z1kzAczPpNpjIUJ3QCBla2c2LCX4h/ow/8pJdzR nnkw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bePA6RO1; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov Reviewed-by: Taniya Das --- drivers/clk/qcom/videocc-sc7180.c | 4 ---- 1 file changed, 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c index 276e5ecd4840..ed57bbb19f88 100644 --- a/drivers/clk/qcom/videocc-sc7180.c +++ b/drivers/clk/qcom/videocc-sc7180.c @@ -19,11 +19,7 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, - P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_MAIN, - P_VIDEO_PLL0_OUT_ODD, }; static const struct pll_vco fabia_vco[] = { From patchwork Fri Apr 2 20:57:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414394 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705466jai; Fri, 2 Apr 2021 13:58:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwzBDGb0sMg5+klU7Wo8IP7j+C8AzEb3U43AXREnKXfnYwkoEL6ydGmnaOOYt52myaeywLs X-Received: by 2002:a17:907:689:: with SMTP id wn9mr15817904ejb.485.1617397113539; Fri, 02 Apr 2021 13:58:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397113; cv=none; d=google.com; s=arc-20160816; b=h2VRQXdjGqTB4XRTKNKENT4dsZIjp41cJIyUzyTwgS+TCGy7HtMIs0aYbM9vbh09a0 7nyn94vq0doKWoe25bmm2zWiBKhHV8nv7svMk6fLqgxZIXovIwkh5thSHsPMrRvhG1TR 1NcRgTyVD0FtP17j3UdsW8+hudVWAntTvaJhEAX/pvTjBYeuTJX6IJYr3/0TwHGr8QTa aBPl1YXFpDcMWt5ljNavTAs7mR/XCN9R6RSmmnCxLEGzuUs+trAM/pfrHCvTloycwXFH 5/f7H9fEfLyVWE2YKpfUcw4OQdMHAzJ/8aYIVNmUk8Sv5dH3oIQKndNLVQUIXjrkHowU avjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uc2bBmZbtEdOHqgSTXP/SGQ9SxGSu18X6WnoYCdFGZg=; b=ViVVaoMDAL7/zwd/K1QCrGi6fwb0ciOUQMzztdvfC2yo7ZKyV6x1+qdSGeUJL9gmtH jdecEhQEZZixwHUUCdcDBVEQ87T0eRsPqARZIR7C0TqDtok1F5sfq1+i7IUgVgP81G9g 2JInzUK5MYY+xYH1BRWJm0rhO31n9ZW/qAaHdKtdXstFrJrrNGMxk0YwGWSI55k4wj4H qc90xmtXXcJ3Ku8ohbloSV6wQXTvZmH3zwD4AN/MIalOpUsB3QZr2q88daKo4q2KmbgX Ibj8uNt/SlaSt8Y3NcRz+kJKtOugl58VXtJr9W8DtcTJ1ql7UGzIWKpuA3gF9UxnyT+V LvCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i4xIYRHX; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8150.c | 4 ---- 1 file changed, 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sm8150.c b/drivers/clk/qcom/videocc-sm8150.c index 3087e2ec8fd4..85b0bbc2b151 100644 --- a/drivers/clk/qcom/videocc-sm8150.c +++ b/drivers/clk/qcom/videocc-sm8150.c @@ -20,11 +20,7 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, - P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_MAIN, - P_VIDEO_PLL0_OUT_ODD, }; static struct pll_vco trion_vco[] = { From patchwork Fri Apr 2 20:57:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414395 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705485jai; Fri, 2 Apr 2021 13:58:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyTLycD3MIzPLUsXS18YYYJ21A1JiMUVjH5JizuZap6OLCmlRrXVzkAW18tiKuJx2FfsueO X-Received: by 2002:a17:906:38da:: with SMTP id r26mr16284744ejd.251.1617397115983; Fri, 02 Apr 2021 13:58:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397115; cv=none; d=google.com; s=arc-20160816; b=Lcr8A1VrJCvAy6SbJuN/VPqWqLvoAAE+0w2iVMqZvwH9IMuXXp6mwAqo+2AZpEgCct UE2v4TTkxGXd1ZHCwJ425Zf1DJrFOWw3ZLj2lswOvB+oh0TiC8WPRPDhdMKgtUcrBzgA TOThfBhXXF/oa9bZ2Jx6+zgxd2tmAtMUX3sMMRGytx7bSNRoa9d9NYHG2CTYZXkn/QPp fjyw/s/2EX2I7/FEoQofkjev7IyzqjQYS/2SrZG3IKnrXyxvDtdkVeEwJjAMfW2ZgmLB NFA3UmZT0ZKvoiJXpr2Z4kYT4hulGr15aUSZ63vMbdVKxE4Ney4cIP1PShGoTiOY0GDi 5o9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e7cDGwvCK159I/9FSrY1M64d33eVbPn2loBLKSHFDao=; b=WTzI50xYTrbnpt7nskVY7ckf6189bGplRpr246dThI7MmFF6VZMd7bWy2x2zbruzGW 4mzmt9DZbHzrGW9E/XtvCDxzbKPAmcmMS4b76Y4PYIvkz7B27iDBcJj3NpMhITmS5vvQ sV9wgS7gVnUPXDLmI0qrMoVu4aRMdpabCXpQ4m+HZ+IYiE9rjhzZGDsl7S1JkWYPXZZP u9T5DsatCv59oZbNmGpoZ/XDkNGc3C5itLQs4YzqtwdOetVbr5LdS8O/brzeYsh+uxnh Zte9B+VCkFvQzV3UXMOtekvP4ZIteOnjxVrt9B8VZeyfTU8HWBFvBmku9R8jaQ2OlM0w rzJg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UIOLlYXe; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8250.c | 2 -- 1 file changed, 2 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index b0efadc19634..06a8a2c98deb 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -21,8 +21,6 @@ enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, - P_CORE_BI_PLL_TEST_SE, P_VIDEO_PLL0_OUT_MAIN, P_VIDEO_PLL1_OUT_MAIN, }; From patchwork Fri Apr 2 20:57:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414396 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705494jai; Fri, 2 Apr 2021 13:58:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw6S4oGrDcUfJ+xNuZx9lMM/W4nXKnRBZpNHRLAhBqenhdk6OhpnaJled9tg5oEwqljBVqo X-Received: by 2002:a17:906:229b:: with SMTP id p27mr16304000eja.287.1617397117665; Fri, 02 Apr 2021 13:58:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397117; cv=none; d=google.com; s=arc-20160816; b=p4o08WwPSYV4phOLBSLHUpJR8vVX3dciaK+1MKhFZTKHgjMD06JdXI2sSTpGyJ4JZH l+D7vzir52RXxOLBXg3XTGhv9PhwjmOAw8uWnRrJYDvwCz2+hGJU8gHfMfiAWd8CW8aH KOPKdQ6sE/dBKmPELlS+Mju+o/pUUEqltlXyyQ9+QCUkWbqVl7/eFzG4uvtkAz3lZscb OM7aAZBbeIk8OEJh0bI/Gc0NYwxlchcds/zzu7L/1aB8+O/pl++NRd+KhYJa9tZMpJsO dzI23odFbkbTEokmMb+pB6DVr/zXxdFGmRYTzFNcEam/7KWyYZ1vilnlhBi/aYRZoT9f k9Pw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nFKRMT+uuLb0v0tcxrynoQiqJNSnoW1UORVuiU4smjw=; b=A3uNCoUtrkMXWF5cu26UcWbd9i2NxtQJf6wqQzlvEPXAQQIWLVy59L0dR2S9cgS42e EK5+1c6WsHFdsQHXbFfP11KYlrCnbZbDMHmaVoD8VaNoOdEM8BWAxxa6SxQjdf9Kvs/0 swtyd3oWQdBM6Wml5y7wMU1vxul325+BJ+IqMgQMP5152qlNGOW2NDJW2+p/q9qkzErK AQqLH4yF5uCuJ/xMyEF252jQHcqTALaL/8L7MTD9ZoKZhNmtukHINhQ60IdBHVzNpVDt 2FFmjF3640iF0uoeT8BlX3j4MMLUjGY37wqb+oPucfk8KeusL90r0Db2CYJIHJHcijqr jMAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vndj7mQX; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sdm845.c | 188 ++++++++++++++++--------------- 1 file changed, 95 insertions(+), 93 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c index 5c932cd17b14..bf5e8a4a0230 100644 --- a/drivers/clk/qcom/dispcc-sdm845.c +++ b/drivers/clk/qcom/dispcc-sdm845.c @@ -33,6 +33,21 @@ enum { P_DP_PHY_PLL_VCO_DIV_CLK, }; +static struct clk_alpha_pll disp_cc_pll0 = { + .offset = 0x0, + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], + .clkr = { + .hw.init = &(struct clk_init_data){ + .name = "disp_cc_pll0", + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", .name = "bi_tcxo", + }, + .num_parents = 1, + .ops = &clk_alpha_pll_fabia_ops, + }, + }, +}; + static const struct parent_map disp_cc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_BYTECLK, 1 }, @@ -40,11 +55,11 @@ static const struct parent_map disp_cc_parent_map_0[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_0[] = { - "bi_tcxo", - "dsi0_phy_pll_out_byteclk", - "dsi1_phy_pll_out_byteclk", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_0[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "dsi0_phy_pll_out_byteclk", .name = "dsi0_phy_pll_out_byteclk" }, + { .fw_name = "dsi1_phy_pll_out_byteclk", .name = "dsi1_phy_pll_out_byteclk" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_1[] = { @@ -54,11 +69,11 @@ static const struct parent_map disp_cc_parent_map_1[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_1[] = { - "bi_tcxo", - "dp_link_clk_divsel_ten", - "dp_vco_divided_clk_src_mux", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_1[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "dp_link_clk_divsel_ten", .name = "dp_link_clk_divsel_ten" }, + { .fw_name = "dp_vco_divided_clk_src_mux", .name = "dp_vco_divided_clk_src_mux" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_2[] = { @@ -66,9 +81,9 @@ static const struct parent_map disp_cc_parent_map_2[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_2[] = { - "bi_tcxo", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_2[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_3[] = { @@ -79,12 +94,12 @@ static const struct parent_map disp_cc_parent_map_3[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_3[] = { - "bi_tcxo", - "disp_cc_pll0", - "gcc_disp_gpll0_clk_src", - "gcc_disp_gpll0_div_clk_src", - "core_bi_pll_test_se", +static const struct clk_parent_data disp_cc_parent_data_3[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .hw = &disp_cc_pll0.clkr.hw }, + { .fw_name = "gcc_disp_gpll0_clk_src", .name = "gcc_disp_gpll0_clk_src" }, + { .fw_name = "gcc_disp_gpll0_div_clk_src", .name = "gcc_disp_gpll0_div_clk_src" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_4[] = { @@ -94,24 +109,11 @@ static const struct parent_map disp_cc_parent_map_4[] = { { P_CORE_BI_PLL_TEST_SE, 7 }, }; -static const char * const disp_cc_parent_names_4[] = { - "bi_tcxo", - "dsi0_phy_pll_out_dsiclk", - "dsi1_phy_pll_out_dsiclk", - "core_bi_pll_test_se", -}; - -static struct clk_alpha_pll disp_cc_pll0 = { - .offset = 0x0, - .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_FABIA], - .clkr = { - .hw.init = &(struct clk_init_data){ - .name = "disp_cc_pll0", - .parent_names = (const char *[]){ "bi_tcxo" }, - .num_parents = 1, - .ops = &clk_alpha_pll_fabia_ops, - }, - }, +static const struct clk_parent_data disp_cc_parent_data_4[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .fw_name = "dsi0_phy_pll_out_dsiclk", .name = "dsi0_phy_pll_out_dsiclk" }, + { .fw_name = "dsi1_phy_pll_out_dsiclk", .name = "dsi1_phy_pll_out_dsiclk" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; /* Return the HW recalc rate for idle use case */ @@ -122,7 +124,7 @@ static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { .parent_map = disp_cc_parent_map_0, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, @@ -137,7 +139,7 @@ static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { .parent_map = disp_cc_parent_map_0, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, @@ -157,7 +159,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_dp_aux_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk_src", - .parent_names = disp_cc_parent_names_2, + .parent_data = disp_cc_parent_data_2, .num_parents = 2, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_ops, @@ -171,7 +173,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_crypto_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .ops = &clk_byte2_ops, }, @@ -184,7 +186,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, @@ -198,7 +200,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel1_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel1_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, @@ -212,7 +214,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel_clk_src = { .parent_map = disp_cc_parent_map_1, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel_clk_src", - .parent_names = disp_cc_parent_names_1, + .parent_data = disp_cc_parent_data_1, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, @@ -232,7 +234,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_esc0_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc0_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .ops = &clk_rcg2_ops, }, @@ -246,7 +248,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_esc0_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc1_clk_src", - .parent_names = disp_cc_parent_names_0, + .parent_data = disp_cc_parent_data_0, .num_parents = 4, .ops = &clk_rcg2_ops, }, @@ -273,7 +275,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_clk_src", - .parent_names = disp_cc_parent_names_3, + .parent_data = disp_cc_parent_data_3, .num_parents = 5, .ops = &clk_rcg2_shared_ops, }, @@ -287,7 +289,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = { .parent_map = disp_cc_parent_map_4, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk0_clk_src", - .parent_names = disp_cc_parent_names_4, + .parent_data = disp_cc_parent_data_4, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, @@ -302,7 +304,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { .parent_map = disp_cc_parent_map_4, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk1_clk_src", - .parent_names = disp_cc_parent_names_4, + .parent_data = disp_cc_parent_data_4, .num_parents = 4, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, @@ -326,7 +328,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_rot_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rot_clk_src", - .parent_names = disp_cc_parent_names_3, + .parent_data = disp_cc_parent_data_3, .num_parents = 5, .ops = &clk_rcg2_shared_ops, }, @@ -340,7 +342,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = { .freq_tbl = ftbl_disp_cc_mdss_esc0_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_vsync_clk_src", - .parent_names = disp_cc_parent_names_2, + .parent_data = disp_cc_parent_data_2, .num_parents = 2, .ops = &clk_rcg2_ops, }, @@ -381,8 +383,8 @@ static struct clk_branch disp_cc_mdss_byte0_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte0_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -399,8 +401,8 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_div_clk_src", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte0_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_regmap_div_ops, @@ -417,8 +419,8 @@ static struct clk_branch disp_cc_mdss_byte0_intf_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_intf_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte0_div_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte0_div_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -436,8 +438,8 @@ static struct clk_branch disp_cc_mdss_byte1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -454,8 +456,8 @@ static struct clk_regmap_div disp_cc_mdss_byte1_div_clk_src = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_div_clk_src", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte1_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_regmap_div_ops, @@ -472,8 +474,8 @@ static struct clk_branch disp_cc_mdss_byte1_intf_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_intf_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_byte1_div_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_byte1_div_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -490,8 +492,8 @@ static struct clk_branch disp_cc_mdss_dp_aux_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_aux_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_aux_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -508,8 +510,8 @@ static struct clk_branch disp_cc_mdss_dp_crypto_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_crypto_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_crypto_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_crypto_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -526,8 +528,8 @@ static struct clk_branch disp_cc_mdss_dp_link_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_link_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -545,8 +547,8 @@ static struct clk_branch disp_cc_mdss_dp_link_intf_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_intf_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_link_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_link_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_branch2_ops, @@ -562,8 +564,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_pixel1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_pixel1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -580,8 +582,8 @@ static struct clk_branch disp_cc_mdss_dp_pixel_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_dp_pixel_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_dp_pixel_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -598,8 +600,8 @@ static struct clk_branch disp_cc_mdss_esc0_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc0_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_esc0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_esc0_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -616,8 +618,8 @@ static struct clk_branch disp_cc_mdss_esc1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_esc1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_esc1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -634,8 +636,8 @@ static struct clk_branch disp_cc_mdss_mdp_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_mdp_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -652,8 +654,8 @@ static struct clk_branch disp_cc_mdss_mdp_lut_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_lut_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_mdp_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_mdp_clk_src.clkr.hw, }, .num_parents = 1, .ops = &clk_branch2_ops, @@ -670,8 +672,8 @@ static struct clk_branch disp_cc_mdss_pclk0_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk0_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_pclk0_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_pclk0_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -689,8 +691,8 @@ static struct clk_branch disp_cc_mdss_pclk1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk1_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_pclk1_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_pclk1_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -707,8 +709,8 @@ static struct clk_branch disp_cc_mdss_rot_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rot_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_rot_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_rot_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -738,8 +740,8 @@ static struct clk_branch disp_cc_mdss_rscc_vsync_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rscc_vsync_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_vsync_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_vsync_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -756,8 +758,8 @@ static struct clk_branch disp_cc_mdss_vsync_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_vsync_clk", - .parent_names = (const char *[]){ - "disp_cc_mdss_vsync_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &disp_cc_mdss_vsync_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, From patchwork Fri Apr 2 20:58:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414397 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705510jai; Fri, 2 Apr 2021 13:58:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyAo2oIVRtrzOCJyi4d2o6+v8aNoH4jOzvp72ZcEtB+1pm0Ubmc0sfpLyU2OGpTI8zQL2ux X-Received: by 2002:a17:907:7651:: with SMTP id kj17mr15861414ejc.127.1617397119664; Fri, 02 Apr 2021 13:58:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397119; cv=none; d=google.com; s=arc-20160816; b=MUhMeJHHJbE5WuqejyBBSoODiSzQ0uIGL/45NDa974k0lHI0Ctraz4HwKc4AcTar26 HP8913beEK9xPdgDSysoLO6IMCGQxRFTldOK9KB8kQnLnJxBo4HYe+OyGV97GUsUFl4w 8hMeEIghwXQ8pALF0uYpd4gRsDbZYa6556+3DWd/aOndtXxcliNOdSak6OERxIutDswT 325KG2OA/RVUhAO9yirMnenbnAssyEGQzO6VQZvHjyXKc7SDmonIoh6V7KiX8QKdnrXE XrAnnJeKKFaBncMOZB7RApZIQD2R2TsyetAdVSj1k0stSa0HZCJjId542ArQonNb1U35 YZLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=oD24D/NHNTgtv3QYd7/t2oeh57K22Anyb+KS67fLkXQ=; b=XnQSIvGLLlN6GfbAAZ1kC7t5w5tDnKs/BmMtv/wLvPE6WCEFlwPKNRNp1vTkpGK2dk 1yJZsPSQUrtnIZMam7nW6bTD7A2zbx41KjM6veOTeCvd5j19AyFPoJeq6RZOQ/E1MiH1 XF6MVQiJZyjqJ29O+802aPDjI9H+3RUseuGM25060Ri8HgaGnfcW3FjUgVF4aJYItGy4 cJRsloaV13JJGVOYnBXVYHOPGOWwKiwNaZ8o2KtzU0GdLE5Wy6Vm26vIVAcx0paA/TiJ wpu743jVZk8XWY/H2eYJF/I9hVmv6UaUVYYzTTQw7RTf0USv9DqWCQqKeIqd28tMAjSe kmkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=o2dXMLlO; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sdm845.c | 42 +++++++++++++++++---------------- 1 file changed, 22 insertions(+), 20 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sdm845.c b/drivers/clk/qcom/gpucc-sdm845.c index 2d7dc89915e8..44039fd2abf2 100644 --- a/drivers/clk/qcom/gpucc-sdm845.c +++ b/drivers/clk/qcom/gpucc-sdm845.c @@ -33,22 +33,6 @@ enum { P_GPU_CC_PLL1_OUT_MAIN, }; -static const struct parent_map gpu_cc_parent_map_0[] = { - { P_BI_TCXO, 0 }, - { P_GPU_CC_PLL1_OUT_MAIN, 3 }, - { P_GPLL0_OUT_MAIN, 5 }, - { P_GPLL0_OUT_MAIN_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, -}; - -static const char * const gpu_cc_parent_names_0[] = { - "bi_tcxo", - "gpu_cc_pll1", - "gcc_gpu_gpll0_clk_src", - "gcc_gpu_gpll0_div_clk_src", - "core_bi_pll_test_se", -}; - static const struct alpha_pll_config gpu_cc_pll1_config = { .l = 0x1a, .alpha = 0xaab, @@ -60,13 +44,31 @@ static struct clk_alpha_pll gpu_cc_pll1 = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "gpu_cc_pll1", - .parent_names = (const char *[]){ "bi_tcxo" }, + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", .name = "bi_tcxo", + }, .num_parents = 1, .ops = &clk_alpha_pll_fabia_ops, }, }, }; +static const struct parent_map gpu_cc_parent_map_0[] = { + { P_BI_TCXO, 0 }, + { P_GPU_CC_PLL1_OUT_MAIN, 3 }, + { P_GPLL0_OUT_MAIN, 5 }, + { P_GPLL0_OUT_MAIN_DIV, 6 }, + { P_CORE_BI_PLL_TEST_SE, 7 }, +}; + +static const struct clk_parent_data gpu_cc_parent_data_0[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .hw = &gpu_cc_pll1.clkr.hw }, + { .fw_name = "gcc_gpu_gpll0_clk_src", .name = "gcc_gpu_gpll0_clk_src" }, + { .fw_name = "gcc_gpu_gpll0_div_clk_src", .name = "gcc_gpu_gpll0_div_clk_src" }, + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, +}; + static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), F(200000000, P_GPLL0_OUT_MAIN_DIV, 1.5, 0, 0), @@ -82,7 +84,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { .freq_tbl = ftbl_gpu_cc_gmu_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "gpu_cc_gmu_clk_src", - .parent_names = gpu_cc_parent_names_0, + .parent_data = gpu_cc_parent_data_0, .num_parents = 5, .ops = &clk_rcg2_shared_ops, }, @@ -96,8 +98,8 @@ static struct clk_branch gpu_cc_cx_gmu_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gpu_cc_cx_gmu_clk", - .parent_names = (const char *[]){ - "gpu_cc_gmu_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &gpu_cc_gmu_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, From patchwork Fri Apr 2 20:58:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414398 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705519jai; Fri, 2 Apr 2021 13:58:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwF3SUICpKen72Wt3KUExY6DD2JE//xy2L+tahpfV4TmzUdMpBquyesoHRjcCdZZyo3mw3R X-Received: by 2002:a17:906:6882:: with SMTP id n2mr15820952ejr.50.1617397121163; Fri, 02 Apr 2021 13:58:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397121; cv=none; d=google.com; s=arc-20160816; b=pKPS2PSrGRD2xaZG5vYDl57Bt4IL/bl1voY4rjvAM7ZXpE6+Gz3I90FpbMkEzsSym4 bUzgJ2GwwA4W2Cpc6M2G+kkZJuFrVUfGjyAEMONmevfmpkdPlCSpujQ1mAe+Wbrg8EXB CUQuHvL2B4l3PDsry/qc0kPW45Rhb0pObCDDZZ7jz7i+Wg0w+x7n1ZgIuBXYcZsYprjq THs7ST3vViXpF3J4StTIlpIftdOjqvMhf673si0hU4lBydfzJJwrANEUQQN0xnDU9s+z TkWdhGcnleKT29XQSwF2BUQDK0Zb02CbmrwfG/nMwlvz7ntmikk++N4vFJVlMhKlpqhc aLgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4rfoVHAT7dOrwGC4eft9E0a4rQB1P3qx5SzpVkr4yy8=; b=io8eLYP9wx4uVNPqeN+VP4Y752w5OUI8KcRLx1Y08ewxLSRAPB+sDPGAstploTEEO2 jiQKDlCXO7sTH0C2XHPLRqh7rCOIJKdU1bJcXEXSJtkM4Ri3fD8As0msqnxWscMSGbWC 9HLQAwC/q2+T0tCzG2pt2HcNzUjJXvlDdeqF7z77Ee8Ab5PEwpObnFtVeOiu4KNZFyfU +G0emGMW65UTcxeAAaqd83a2+ugiOonrz3mvTD1P3ab4wrL5vGgI6rCJ8u9lZOHxRV+2 b+2Dao5eIvTZAZNTUuGyMwyeEuhI5wcHXw0MhpmEvYR3WMiFYcXMpxAXe/Hl2pwoe4oy rn6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZgWYNeOe; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sdm845.c | 56 ++++++++++++++++--------------- 1 file changed, 29 insertions(+), 27 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c index 5d6a7724a194..ac808ed859f9 100644 --- a/drivers/clk/qcom/videocc-sdm845.c +++ b/drivers/clk/qcom/videocc-sdm845.c @@ -21,25 +21,9 @@ enum { P_BI_TCXO, P_CORE_BI_PLL_TEST_SE, - P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_MAIN, - P_VIDEO_PLL0_OUT_ODD, -}; - -static const struct parent_map video_cc_parent_map_0[] = { - { P_BI_TCXO, 0 }, - { P_VIDEO_PLL0_OUT_MAIN, 1 }, - { P_VIDEO_PLL0_OUT_EVEN, 2 }, - { P_VIDEO_PLL0_OUT_ODD, 3 }, - { P_CORE_BI_PLL_TEST_SE, 4 }, -}; - -static const char * const video_cc_parent_names_0[] = { - "bi_tcxo", - "video_pll0", - "video_pll0_out_even", - "video_pll0_out_odd", - "core_bi_pll_test_se", + /* P_VIDEO_PLL0_OUT_EVEN, + P_VIDEO_PLL0_OUT_ODD, */ }; static const struct alpha_pll_config video_pll0_config = { @@ -53,13 +37,31 @@ static struct clk_alpha_pll video_pll0 = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "video_pll0", - .parent_names = (const char *[]){ "bi_tcxo" }, + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", .name = "bi_tcxo", + }, .num_parents = 1, .ops = &clk_alpha_pll_fabia_ops, }, }, }; +static const struct parent_map video_cc_parent_map_0[] = { + { P_BI_TCXO, 0 }, + { P_VIDEO_PLL0_OUT_MAIN, 1 }, + /* { P_VIDEO_PLL0_OUT_EVEN, 2 }, + { P_VIDEO_PLL0_OUT_ODD, 3 }, */ + { P_CORE_BI_PLL_TEST_SE, 4 }, +}; + +static const struct clk_parent_data video_cc_parent_data_0[] = { + { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, + { .hw = &video_pll0.clkr.hw }, + /* { .name = "video_pll0_out_even" }, + { .name = "video_pll0_out_odd" }, */ + { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, +}; + static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = { F(100000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0), F(200000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0), @@ -78,8 +80,8 @@ static struct clk_rcg2 video_cc_venus_clk_src = { .freq_tbl = ftbl_video_cc_venus_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "video_cc_venus_clk_src", - .parent_names = video_cc_parent_names_0, - .num_parents = 5, + .parent_data = video_cc_parent_data_0, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_shared_ops, }, @@ -158,8 +160,8 @@ static struct clk_branch video_cc_vcodec0_core_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "video_cc_vcodec0_core_clk", - .parent_names = (const char *[]){ - "video_cc_venus_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_venus_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -189,8 +191,8 @@ static struct clk_branch video_cc_vcodec1_core_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "video_cc_vcodec1_core_clk", - .parent_names = (const char *[]){ - "video_cc_venus_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_venus_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -233,8 +235,8 @@ static struct clk_branch video_cc_venus_ctl_core_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "video_cc_venus_ctl_core_clk", - .parent_names = (const char *[]){ - "video_cc_venus_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_venus_clk_src.clkr.hw, }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, From patchwork Fri Apr 2 20:58:02 2021 Content-Type: text/plain; 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Remove it. Suggested-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-sdm845.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/gpucc-sdm845.c b/drivers/clk/qcom/gpucc-sdm845.c index 44039fd2abf2..621ad03fe154 100644 --- a/drivers/clk/qcom/gpucc-sdm845.c +++ b/drivers/clk/qcom/gpucc-sdm845.c @@ -27,7 +27,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL0_OUT_MAIN_DIV, P_GPU_CC_PLL1_OUT_MAIN, @@ -58,7 +57,6 @@ static const struct parent_map gpu_cc_parent_map_0[] = { { P_GPU_CC_PLL1_OUT_MAIN, 3 }, { P_GPLL0_OUT_MAIN, 5 }, { P_GPLL0_OUT_MAIN_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gpu_cc_parent_data_0[] = { @@ -66,7 +64,6 @@ static const struct clk_parent_data gpu_cc_parent_data_0[] = { { .hw = &gpu_cc_pll1.clkr.hw }, { .fw_name = "gcc_gpu_gpll0_clk_src", .name = "gcc_gpu_gpll0_clk_src" }, { .fw_name = "gcc_gpu_gpll0_div_clk_src", .name = "gcc_gpu_gpll0_div_clk_src" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = { @@ -85,7 +82,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gpu_cc_gmu_clk_src", .parent_data = gpu_cc_parent_data_0, - .num_parents = 5, + .num_parents = 4, .ops = &clk_rcg2_shared_ops, }, }; From patchwork Fri Apr 2 20:58:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414401 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705537jai; Fri, 2 Apr 2021 13:58:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzUoe1Ok/V9uTxBKaDiJjOLgYraR5zF9MaFulDiTPBxUQej9I2Egr1UUrxvhQEw2kLeYLW0 X-Received: by 2002:a17:907:689:: with SMTP id wn9mr15818341ejb.485.1617397123580; Fri, 02 Apr 2021 13:58:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397123; cv=none; d=google.com; s=arc-20160816; b=VImDhvyb0qYxiFDKnA50hSRTutMI6g8VFJxFB/SjAiPlnNDDzQKomeWQXyiomX534l ginduJP+EzeMlGD/+sO4owbFG6O2JhSkL/cQb7WFCQR8ziye4KaYJoYWur4XRN9rJOZc Vd3HzUaoJVTem4Dlbh4oKeoz2gjBV172VDc9FS8/Zlz7TSBW8aGtzvGgl/6C2MeeHWFz A+ouA3tlw3qzsIFMV2YXsj9DynTC6Mqg2k9Gcj/Xu/fR2zxMkHVReHLxXvCAB5d3MbuY OG7ouAS+fH+12Ye7lOvyZXTnCzsZ4M6fE7s9ueCm+jE4WEFuWlSpiUJlpOdUEXnlQtD/ c47w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vlFFAnWw2oQS6KQuBOzl9VFGrwAtxCUu1GQdT8KGelI=; b=qiIwI27nChHw7oDbPTBJcgmy05n+Z7yA99T/Dja2shl0IeyQ3T8VAbvTAMVQLR5G0L BWWXjZEcGsIvKlRnVQqRV0HS/a8kwEAXLgN91rxHV6oOhAwAsDc3Urjz+foJCZsZpx/l dHV47VV+p0PmhXkJUfziuqqekwqsuSvqRlvM92I6yeimPrfpH6zLHHSjfFGlcqwtHvcG I+eeJpRlSKGayQ1Lk+qh/uWy/p5C57NyuboUZg/BfhVyZ0oWHSYTY/NwrUna3nqEzPNc IVMNJBajRmgS0DytusATRUtGOLFOIqH3Uf8KgBIrc6MzQx3UTmSL0DJREW92Y1ZNrcWx RUUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TK09IY7e; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Remove it. Suggested-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sdm845.c | 39 ++++++++++++-------------------- 1 file changed, 14 insertions(+), 25 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c index bf5e8a4a0230..195cecf9f294 100644 --- a/drivers/clk/qcom/dispcc-sdm845.c +++ b/drivers/clk/qcom/dispcc-sdm845.c @@ -21,7 +21,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_MAIN, P_DSI0_PHY_PLL_OUT_BYTECLK, P_DSI0_PHY_PLL_OUT_DSICLK, @@ -52,38 +51,32 @@ static const struct parent_map disp_cc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_BYTECLK, 1 }, { P_DSI1_PHY_PLL_OUT_BYTECLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_0[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_byteclk", .name = "dsi0_phy_pll_out_byteclk" }, { .fw_name = "dsi1_phy_pll_out_byteclk", .name = "dsi1_phy_pll_out_byteclk" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_1[] = { { P_BI_TCXO, 0 }, { P_DP_PHY_PLL_LINK_CLK, 1 }, { P_DP_PHY_PLL_VCO_DIV_CLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_1[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "dp_link_clk_divsel_ten", .name = "dp_link_clk_divsel_ten" }, { .fw_name = "dp_vco_divided_clk_src_mux", .name = "dp_vco_divided_clk_src_mux" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_2[] = { { P_BI_TCXO, 0 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_2[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_3[] = { @@ -91,7 +84,6 @@ static const struct parent_map disp_cc_parent_map_3[] = { { P_DISP_CC_PLL0_OUT_MAIN, 1 }, { P_GPLL0_OUT_MAIN, 4 }, { P_GPLL0_OUT_MAIN_DIV, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_3[] = { @@ -99,21 +91,18 @@ static const struct clk_parent_data disp_cc_parent_data_3[] = { { .hw = &disp_cc_pll0.clkr.hw }, { .fw_name = "gcc_disp_gpll0_clk_src", .name = "gcc_disp_gpll0_clk_src" }, { .fw_name = "gcc_disp_gpll0_div_clk_src", .name = "gcc_disp_gpll0_div_clk_src" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_4[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_DSICLK, 1 }, { P_DSI1_PHY_PLL_OUT_DSICLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_4[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_dsiclk", .name = "dsi0_phy_pll_out_dsiclk" }, { .fw_name = "dsi1_phy_pll_out_dsiclk", .name = "dsi1_phy_pll_out_dsiclk" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; /* Return the HW recalc rate for idle use case */ @@ -125,7 +114,7 @@ static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte0_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, }, @@ -140,7 +129,7 @@ static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_byte1_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, }, @@ -160,7 +149,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk_src", .parent_data = disp_cc_parent_data_2, - .num_parents = 2, + .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_ops, }, @@ -174,7 +163,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_crypto_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_crypto_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .ops = &clk_byte2_ops, }, }; @@ -187,7 +176,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_byte2_ops, }, @@ -201,7 +190,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel1_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, }, @@ -215,7 +204,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_pixel_clk_src", .parent_data = disp_cc_parent_data_1, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_dp_ops, }, @@ -235,7 +224,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc0_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .ops = &clk_rcg2_ops, }, }; @@ -249,7 +238,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_esc1_clk_src", .parent_data = disp_cc_parent_data_0, - .num_parents = 4, + .num_parents = 3, .ops = &clk_rcg2_ops, }, }; @@ -276,7 +265,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_mdp_clk_src", .parent_data = disp_cc_parent_data_3, - .num_parents = 5, + .num_parents = 4, .ops = &clk_rcg2_shared_ops, }, }; @@ -290,7 +279,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk0_clk_src", .parent_data = disp_cc_parent_data_4, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, }, @@ -305,7 +294,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_pclk1_clk_src", .parent_data = disp_cc_parent_data_4, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, .ops = &clk_pixel_ops, }, @@ -329,7 +318,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_rot_clk_src", .parent_data = disp_cc_parent_data_3, - .num_parents = 5, + .num_parents = 4, .ops = &clk_rcg2_shared_ops, }, }; @@ -343,7 +332,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_vsync_clk_src", .parent_data = disp_cc_parent_data_2, - .num_parents = 2, + .num_parents = 1, .ops = &clk_rcg2_ops, }, }; From patchwork Fri Apr 2 20:58:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 414400 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1705533jai; Fri, 2 Apr 2021 13:58:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzs+/By/0tDaXDYZM0pEqKtyHe0qh1q/aAU6iSZDbgFpwquzFn/yqKPIiK8qiB2JHzC55jJ X-Received: by 2002:a17:906:7a0b:: with SMTP id d11mr15727432ejo.113.1617397123090; Fri, 02 Apr 2021 13:58:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617397123; cv=none; d=google.com; s=arc-20160816; b=CzecsHRsihVvDGRuR6tqn0IPC9d+ECJsIOI5e3J0vvUk81H2BTY+t6O0cXMIDVvAhJ /2kiQgZ619tqZ3JjMTDSiDSRJ0Fb4f6Rf/6tJBvhqJBSY77kMgr2G9klt9WuODcTir8I p2+ZbBO6aAkIy/gGmivnvPk93IB5V2t4ZzlAj2/GZEzQV09xzAGqDdmo2Eb5Jlg1sO6C 2QHCvLpus3XSqgbUUSnztb1mjx608Tix+glnJzGy+7OZDYkcPE2Tg2z3l4kU9RgRNDEh MIByIfhZvdmEC563POXQeyCPGurDAsA/bv7rDCSZVMju5ioo8hvGrqBdqxaby7nwB+kF p/aA== ARC-Message-Signature: i=1; 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Remove it. Suggested-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sdm845.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c index ac808ed859f9..1c917cd60c6f 100644 --- a/drivers/clk/qcom/videocc-sdm845.c +++ b/drivers/clk/qcom/videocc-sdm845.c @@ -20,7 +20,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_VIDEO_PLL0_OUT_MAIN, /* P_VIDEO_PLL0_OUT_EVEN, P_VIDEO_PLL0_OUT_ODD, */ @@ -51,7 +50,6 @@ static const struct parent_map video_cc_parent_map_0[] = { { P_VIDEO_PLL0_OUT_MAIN, 1 }, /* { P_VIDEO_PLL0_OUT_EVEN, 2 }, { P_VIDEO_PLL0_OUT_ODD, 3 }, */ - { P_CORE_BI_PLL_TEST_SE, 4 }, }; static const struct clk_parent_data video_cc_parent_data_0[] = { @@ -59,7 +57,6 @@ static const struct clk_parent_data video_cc_parent_data_0[] = { { .hw = &video_pll0.clkr.hw }, /* { .name = "video_pll0_out_even" }, { .name = "video_pll0_out_odd" }, */ - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = { @@ -81,7 +78,7 @@ static struct clk_rcg2 video_cc_venus_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "video_cc_venus_clk_src", .parent_data = video_cc_parent_data_0, - .num_parents = 3, + .num_parents = 2, .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_shared_ops, },