From patchwork Mon Apr 12 22:36:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 419670 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EFF57C433ED for ; Mon, 12 Apr 2021 22:36:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A9B476135C for ; Mon, 12 Apr 2021 22:36:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240663AbhDLWgp (ORCPT ); Mon, 12 Apr 2021 18:36:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240461AbhDLWgp (ORCPT ); Mon, 12 Apr 2021 18:36:45 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F5F9C061574; Mon, 12 Apr 2021 15:36:26 -0700 (PDT) Received: by mail-ed1-x534.google.com with SMTP id z1so16993321edb.8; Mon, 12 Apr 2021 15:36:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=PCOQOWXTwfhkR+0L4ZauafZ+IJNAVs6L3CJ2sNHUQY8=; b=jZxqWTmRDZRSaxNzAEYEgxfkixY7xakoWasaoKXnE32gQoAjkLQdYEB2QR/AA39KuS vAM2y54IF33qMJh0ItuwD5JdoSMD6DeWNlf8WNdmcGYI9GdUTw1iG4YSW3veZZXbHg9p ecfv6ZrnJofFEdOg6MDZVnBIDuUUXRQEuaOyJkX8zLBsyCLHdmJ5P+sy2xFW1KXwDaul lu4z1zXZVApYc/vqzyfewYZqSZjCSJIJKb3hsKmuQ/WBO3V0jiUPUYZZrxCidvLhCULZ 6YSZxrxGwiSamlYH3dSQn9E+MRM/964QttOhQSPJntY3613LUiV1+Sio+hJDG3NyDsz0 bRfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=PCOQOWXTwfhkR+0L4ZauafZ+IJNAVs6L3CJ2sNHUQY8=; b=Su6B1O4vqFzlvGoOe4g4Dpd/XcUnO2Z81K6en5rNQJfcmqInyJgRwQeQpNqvhw/JXz YUtqZe58U0+LGnVyhyb/JH0+i4FOGbxoCtHh8uJ8oqovkkV88aHQ3X//sehvn5tdxq3C rKYaz44hOGa8Rh8sUsnumnPeqjTHnPC3oGsNwwTDRTQCzxJoJMCQZhktyE98K86yTezQ qd8vQ1s1k4ADO58ogPYwc0PlVzoQMbQW+PhN/PjrsqJTwxUNEYMkBZefUX4VNPb/Pa95 em5FgKFammtVmhOjJXJpEyR2sBEMCglK29GZ3x2RUaTzp2+5lk1BPISUk9yG9wPjJHAo TzxQ== X-Gm-Message-State: AOAM530AJ9FVjRp6Xed/UmNPb9pMB/e0iSZMYtX2lxAF8xPHxtEtu8ms m/znzaCi4SuzNTuTL/0jNdM= X-Google-Smtp-Source: ABdhPJw+YvEYtJMzuEKk1ETc2B4l3L35SVDmbqMmrZESh4suaxrIyFV4hUg+5YEtDYRWlhnLfzV60w== X-Received: by 2002:a50:fd16:: with SMTP id i22mr31119515eds.239.1618266984692; Mon, 12 Apr 2021 15:36:24 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id d10sm7817209edp.77.2021.04.12.15.36.23 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Apr 2021 15:36:24 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, linus.walleij@linaro.org, bgolaszewski@baylibre.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] dt-bindings: gpio: add YAML description for rockchip, gpio-bank Date: Tue, 13 Apr 2021 00:36:15 +0200 Message-Id: <20210412223617.8634-1-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Current dts files with "rockchip,gpio-bank" subnodes are manually verified. In order to automate this process the text that describes the compatible in rockchip,pinctrl.txt is removed and converted to YAML in rockchip,gpio-bank.yaml. Signed-off-by: Johan Jonker Reviewed-by: Rob Herring --- Changed V2: changed example gpio nodename --- .../bindings/gpio/rockchip,gpio-bank.yaml | 82 ++++++++++++++++++++++ .../bindings/pinctrl/rockchip,pinctrl.txt | 58 +-------------- 2 files changed, 83 insertions(+), 57 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml new file mode 100644 index 000000000..d993e002c --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip GPIO bank + +maintainers: + - Heiko Stuebner + +properties: + compatible: + enum: + - rockchip,gpio-bank + - rockchip,rk3188-gpio-bank0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: false + +examples: + - | + #include + pinctrl: pinctrl { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gpio0: gpio@2000a000 { + compatible = "rockchip,rk3188-gpio-bank0"; + reg = <0x2000a000 0x100>; + interrupts = ; + clocks = <&clk_gates8 9>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio@2003c000 { + compatible = "rockchip,gpio-bank"; + reg = <0x2003c000 0x100>; + interrupts = ; + clocks = <&clk_gates8 10>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt index d3eae61a3..4719a6a07 100644 --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt @@ -50,23 +50,7 @@ Deprecated properties for iomux controller: Use rockchip,grf and rockchip,pmu described above instead. Required properties for gpio sub nodes: - - compatible: "rockchip,gpio-bank" - - reg: register of the gpio bank (different than the iomux registerset) - - interrupts: base interrupt of the gpio bank in the interrupt controller - - clocks: clock that drives this bank - - gpio-controller: identifies the node as a gpio controller and pin bank. - - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO - binding is used, the amount of cells must be specified as 2. See generic - GPIO binding documentation for description of particular cells. - - interrupt-controller: identifies the controller node as interrupt-parent. - - #interrupt-cells: the value of this property should be 2 and the interrupt - cells should use the standard two-cell scheme described in - bindings/interrupt-controller/interrupts.txt - -Deprecated properties for gpio sub nodes: - - compatible: "rockchip,rk3188-gpio-bank0" - - reg: second element: separate pull register for rk3188 bank0, use - rockchip,pmu described above instead +See rockchip,gpio-bank.yaml Required properties for pin configuration node: - rockchip,pins: 3 integers array, represents a group of pins mux and config @@ -127,43 +111,3 @@ uart2: serial@20064000 { pinctrl-names = "default"; pinctrl-0 = <&uart2_xfer>; }; - -Example for rk3188: - - pinctrl@20008000 { - compatible = "rockchip,rk3188-pinctrl"; - rockchip,grf = <&grf>; - rockchip,pmu = <&pmu>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - gpio0: gpio0@2000a000 { - compatible = "rockchip,rk3188-gpio-bank0"; - reg = <0x2000a000 0x100>; - interrupts = ; - clocks = <&clk_gates8 9>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio1@2003c000 { - compatible = "rockchip,gpio-bank"; - reg = <0x2003c000 0x100>; - interrupts = ; - clocks = <&clk_gates8 10>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - ... - - }; From patchwork Mon Apr 12 22:36:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 419669 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66922C43461 for ; Mon, 12 Apr 2021 22:36:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3A634613C0 for ; Mon, 12 Apr 2021 22:36:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240983AbhDLWgu (ORCPT ); Mon, 12 Apr 2021 18:36:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240974AbhDLWgt (ORCPT ); Mon, 12 Apr 2021 18:36:49 -0400 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 886EEC061574; Mon, 12 Apr 2021 15:36:27 -0700 (PDT) Received: by mail-ej1-x636.google.com with SMTP id e14so22804799ejz.11; Mon, 12 Apr 2021 15:36:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lLwjdfFdp3zRi4PK8zglE9mVb84ajZiNMIXRGSeC74w=; b=uaj9y2bz5k3eZZGDylatN9ASgJjpPcw5q85e0ub3OKibxRuRcGvih3/tLeXsN82Dej Wph9+5cQWRp/Ngja7aUyLwjQqIb71zWzi+tZAbgjFiGeuIKQYMZWALgxj7DNojlRXHh7 m+4pjZDzv4VwZxns4b8O5KTVLa6cBNv89t5KrNfF7lneR+PSKhLUEpG5Em4YZuHzUGmA UfkDNUahociAzdy7EEaQKoo1RB1/lhmi/LuYlVQ+/ck/wz4R7Ktk16BlVncG5Vme3IC/ Rit6PgJkiZW4FhgM1MPPwqUF99JSMPnIm5n+xRYqRGXvJctbVUCpZJKt5FtZTXaUXfRZ D0Cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lLwjdfFdp3zRi4PK8zglE9mVb84ajZiNMIXRGSeC74w=; b=T//pvzydbJYQmsqktNks1zNm3DFPRse9P0Adjz5gzLgdUhThlAU3UOxTPXRL4dQunO r7pOZiPKZxS/xSFYiehMFg2FBXk+CpUnB7cGGvXnPzjvYo1g2xn5TNRIW4eBcCHKjCbJ BvBMlDXGvRjTswbTxPZ2POvD6kB9ACltvcDhT4zPI6hLPJMinEk5bz4qDQ4q3P2G8G5s hpOGByM8raNSIueOGvKTAUn8MbQk+bMBT79/RLc1x2PjVyndesREwrjZW1as/bYCzA2N DiLCBYyV9jbMf9gBGSNuCgpAviyTWtzqhIdZ1DOVo28KS7GbCrXoLYn6NsVHWG6AK2F9 4Lew== X-Gm-Message-State: AOAM533uQxnd55bqMH2erceXfNywbNMk0I9ZZoc6udD2E8j7d99ptazY ibDovK3AmM+5EuJMCfOj+dE= X-Google-Smtp-Source: ABdhPJxs5rIWJ913wkFrbZmj7COR+OK3FJ6qBQGScfnHbGx7n7mKSA8P/fdMEBLketsfhK7YU1yJgg== X-Received: by 2002:a17:906:9598:: with SMTP id r24mr26858876ejx.397.1618266986260; Mon, 12 Apr 2021 15:36:26 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id d10sm7817209edp.77.2021.04.12.15.36.24 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Apr 2021 15:36:25 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, linus.walleij@linaro.org, bgolaszewski@baylibre.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] ARM: dts: rockchip: change gpio nodenames Date: Tue, 13 Apr 2021 00:36:16 +0200 Message-Id: <20210412223617.8634-2-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210412223617.8634-1-jbx6244@gmail.com> References: <20210412223617.8634-1-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Currently all gpio nodenames are sort of identical to there label. Nodenames should be of a generic type, so change them all. Signed-off-by: Johan Jonker Reviewed-by: Linus Walleij --- arch/arm/boot/dts/rk3036.dtsi | 6 +++--- arch/arm/boot/dts/rk3066a.dtsi | 12 ++++++------ arch/arm/boot/dts/rk3188.dtsi | 8 ++++---- arch/arm/boot/dts/rk322x.dtsi | 8 ++++---- arch/arm/boot/dts/rk3288.dtsi | 18 +++++++++--------- arch/arm/boot/dts/rv1108.dtsi | 8 ++++---- 6 files changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index e24230d50..33ddede4b 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -505,7 +505,7 @@ #size-cells = <1>; ranges; - gpio0: gpio0@2007c000 { + gpio0: gpio@2007c000 { compatible = "rockchip,gpio-bank"; reg = <0x2007c000 0x100>; interrupts = ; @@ -518,7 +518,7 @@ #interrupt-cells = <2>; }; - gpio1: gpio1@20080000 { + gpio1: gpio@20080000 { compatible = "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; @@ -531,7 +531,7 @@ #interrupt-cells = <2>; }; - gpio2: gpio2@20084000 { + gpio2: gpio@20084000 { compatible = "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 252750c97..cf3ea32e5 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -297,7 +297,7 @@ #size-cells = <1>; ranges; - gpio0: gpio0@20034000 { + gpio0: gpio@20034000 { compatible = "rockchip,gpio-bank"; reg = <0x20034000 0x100>; interrupts = ; @@ -310,7 +310,7 @@ #interrupt-cells = <2>; }; - gpio1: gpio1@2003c000 { + gpio1: gpio@2003c000 { compatible = "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; @@ -323,7 +323,7 @@ #interrupt-cells = <2>; }; - gpio2: gpio2@2003e000 { + gpio2: gpio@2003e000 { compatible = "rockchip,gpio-bank"; reg = <0x2003e000 0x100>; interrupts = ; @@ -336,7 +336,7 @@ #interrupt-cells = <2>; }; - gpio3: gpio3@20080000 { + gpio3: gpio@20080000 { compatible = "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; @@ -349,7 +349,7 @@ #interrupt-cells = <2>; }; - gpio4: gpio4@20084000 { + gpio4: gpio@20084000 { compatible = "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; @@ -362,7 +362,7 @@ #interrupt-cells = <2>; }; - gpio6: gpio6@2000a000 { + gpio6: gpio@2000a000 { compatible = "rockchip,gpio-bank"; reg = <0x2000a000 0x100>; interrupts = ; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 2298a8d84..08aac5452 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -247,7 +247,7 @@ #size-cells = <1>; ranges; - gpio0: gpio0@2000a000 { + gpio0: gpio@2000a000 { compatible = "rockchip,rk3188-gpio-bank0"; reg = <0x2000a000 0x100>; interrupts = ; @@ -260,7 +260,7 @@ #interrupt-cells = <2>; }; - gpio1: gpio1@2003c000 { + gpio1: gpio@2003c000 { compatible = "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; @@ -273,7 +273,7 @@ #interrupt-cells = <2>; }; - gpio2: gpio2@2003e000 { + gpio2: gpio@2003e000 { compatible = "rockchip,gpio-bank"; reg = <0x2003e000 0x100>; interrupts = ; @@ -286,7 +286,7 @@ #interrupt-cells = <2>; }; - gpio3: gpio3@20080000 { + gpio3: gpio@20080000 { compatible = "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 118d96424..d9ac1d08c 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -823,7 +823,7 @@ #size-cells = <1>; ranges; - gpio0: gpio0@11110000 { + gpio0: gpio@11110000 { compatible = "rockchip,gpio-bank"; reg = <0x11110000 0x100>; interrupts = ; @@ -836,7 +836,7 @@ #interrupt-cells = <2>; }; - gpio1: gpio1@11120000 { + gpio1: gpio@11120000 { compatible = "rockchip,gpio-bank"; reg = <0x11120000 0x100>; interrupts = ; @@ -849,7 +849,7 @@ #interrupt-cells = <2>; }; - gpio2: gpio2@11130000 { + gpio2: gpio@11130000 { compatible = "rockchip,gpio-bank"; reg = <0x11130000 0x100>; interrupts = ; @@ -862,7 +862,7 @@ #interrupt-cells = <2>; }; - gpio3: gpio3@11140000 { + gpio3: gpio@11140000 { compatible = "rockchip,gpio-bank"; reg = <0x11140000 0x100>; interrupts = ; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 05557ad02..e96a70ebe 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1424,7 +1424,7 @@ #size-cells = <2>; ranges; - gpio0: gpio0@ff750000 { + gpio0: gpio@ff750000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff750000 0x0 0x100>; interrupts = ; @@ -1437,7 +1437,7 @@ #interrupt-cells = <2>; }; - gpio1: gpio1@ff780000 { + gpio1: gpio@ff780000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; interrupts = ; @@ -1450,7 +1450,7 @@ #interrupt-cells = <2>; }; - gpio2: gpio2@ff790000 { + gpio2: gpio@ff790000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; interrupts = ; @@ -1463,7 +1463,7 @@ #interrupt-cells = <2>; }; - gpio3: gpio3@ff7a0000 { + gpio3: gpio@ff7a0000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff7a0000 0x0 0x100>; interrupts = ; @@ -1476,7 +1476,7 @@ #interrupt-cells = <2>; }; - gpio4: gpio4@ff7b0000 { + gpio4: gpio@ff7b0000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff7b0000 0x0 0x100>; interrupts = ; @@ -1489,7 +1489,7 @@ #interrupt-cells = <2>; }; - gpio5: gpio5@ff7c0000 { + gpio5: gpio@ff7c0000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff7c0000 0x0 0x100>; interrupts = ; @@ -1502,7 +1502,7 @@ #interrupt-cells = <2>; }; - gpio6: gpio6@ff7d0000 { + gpio6: gpio@ff7d0000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff7d0000 0x0 0x100>; interrupts = ; @@ -1515,7 +1515,7 @@ #interrupt-cells = <2>; }; - gpio7: gpio7@ff7e0000 { + gpio7: gpio@ff7e0000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff7e0000 0x0 0x100>; interrupts = ; @@ -1528,7 +1528,7 @@ #interrupt-cells = <2>; }; - gpio8: gpio8@ff7f0000 { + gpio8: gpio@ff7f0000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff7f0000 0x0 0x100>; interrupts = ; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 68e2282f7..3ace88e8c 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -582,7 +582,7 @@ #size-cells = <1>; ranges; - gpio0: gpio0@20030000 { + gpio0: gpio@20030000 { compatible = "rockchip,gpio-bank"; reg = <0x20030000 0x100>; interrupts = ; @@ -595,7 +595,7 @@ #interrupt-cells = <2>; }; - gpio1: gpio1@10310000 { + gpio1: gpio@10310000 { compatible = "rockchip,gpio-bank"; reg = <0x10310000 0x100>; interrupts = ; @@ -608,7 +608,7 @@ #interrupt-cells = <2>; }; - gpio2: gpio2@10320000 { + gpio2: gpio@10320000 { compatible = "rockchip,gpio-bank"; reg = <0x10320000 0x100>; interrupts = ; @@ -621,7 +621,7 @@ #interrupt-cells = <2>; }; - gpio3: gpio3@10330000 { + gpio3: gpio@10330000 { compatible = "rockchip,gpio-bank"; reg = <0x10330000 0x100>; interrupts = ; From patchwork Mon Apr 12 22:36:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 420417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8D0DC433ED for ; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id d10sm7817209edp.77.2021.04.12.15.36.26 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Apr 2021 15:36:27 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, linus.walleij@linaro.org, bgolaszewski@baylibre.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] arm64: dts: rockchip: change gpio nodenames Date: Tue, 13 Apr 2021 00:36:17 +0200 Message-Id: <20210412223617.8634-3-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210412223617.8634-1-jbx6244@gmail.com> References: <20210412223617.8634-1-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Currently all gpio nodenames are sort of identical to there label. Nodenames should be of a generic type, so change them all. Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 10 +++++----- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++----- 5 files changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 939440015..96924e05a 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -1247,7 +1247,7 @@ #size-cells = <2>; ranges; - gpio0: gpio0@ff040000 { + gpio0: gpio@ff040000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff040000 0x0 0x100>; interrupts = ; @@ -1259,7 +1259,7 @@ #interrupt-cells = <2>; }; - gpio1: gpio1@ff250000 { + gpio1: gpio@ff250000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff250000 0x0 0x100>; interrupts = ; @@ -1271,7 +1271,7 @@ #interrupt-cells = <2>; }; - gpio2: gpio2@ff260000 { + gpio2: gpio@ff260000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff260000 0x0 0x100>; interrupts = ; @@ -1283,7 +1283,7 @@ #interrupt-cells = <2>; }; - gpio3: gpio3@ff270000 { + gpio3: gpio@ff270000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff270000 0x0 0x100>; interrupts = ; diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 00844a0e0..ba7dee2e8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -688,7 +688,7 @@ #size-cells = <2>; ranges; - gpio0: gpio0@ff220000 { + gpio0: gpio@ff220000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff220000 0x0 0x100>; interrupts = ; @@ -699,7 +699,7 @@ #interrupt-cells = <2>; }; - gpio1: gpio1@ff230000 { + gpio1: gpio@ff230000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff230000 0x0 0x100>; interrupts = ; @@ -710,7 +710,7 @@ #interrupt-cells = <2>; }; - gpio2: gpio2@ff240000 { + gpio2: gpio@ff240000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff240000 0x0 0x100>; interrupts = ; @@ -721,7 +721,7 @@ #interrupt-cells = <2>; }; - gpio3: gpio3@ff250000 { + gpio3: gpio@ff250000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff250000 0x0 0x100>; interrupts = ; @@ -732,7 +732,7 @@ #interrupt-cells = <2>; }; - gpio4: gpio4@ff260000 { + gpio4: gpio@ff260000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff260000 0x0 0x100>; interrupts = ; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index c2ca358c7..858d52e2d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -1019,7 +1019,7 @@ #size-cells = <2>; ranges; - gpio0: gpio0@ff210000 { + gpio0: gpio@ff210000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff210000 0x0 0x100>; interrupts = ; @@ -1032,7 +1032,7 @@ #interrupt-cells = <2>; }; - gpio1: gpio1@ff220000 { + gpio1: gpio@ff220000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff220000 0x0 0x100>; interrupts = ; @@ -1045,7 +1045,7 @@ #interrupt-cells = <2>; }; - gpio2: gpio2@ff230000 { + gpio2: gpio@ff230000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff230000 0x0 0x100>; interrupts = ; @@ -1058,7 +1058,7 @@ #interrupt-cells = <2>; }; - gpio3: gpio3@ff240000 { + gpio3: gpio@ff240000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff240000 0x0 0x100>; interrupts = ; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 7832e26a3..8ae10c434 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -803,7 +803,7 @@ #size-cells = <0x2>; ranges; - gpio0: gpio0@ff750000 { + gpio0: gpio@ff750000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff750000 0x0 0x100>; clocks = <&cru PCLK_GPIO0>; @@ -816,7 +816,7 @@ #interrupt-cells = <0x2>; }; - gpio1: gpio1@ff780000 { + gpio1: gpio@ff780000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; clocks = <&cru PCLK_GPIO1>; @@ -829,7 +829,7 @@ #interrupt-cells = <0x2>; }; - gpio2: gpio2@ff790000 { + gpio2: gpio@ff790000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; clocks = <&cru PCLK_GPIO2>; @@ -842,7 +842,7 @@ #interrupt-cells = <0x2>; }; - gpio3: gpio3@ff7a0000 { + gpio3: gpio@ff7a0000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff7a0000 0x0 0x100>; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 6221b027e..c97a25c70 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1941,7 +1941,7 @@ #size-cells = <2>; ranges; - gpio0: gpio0@ff720000 { + gpio0: gpio@ff720000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff720000 0x0 0x100>; clocks = <&pmucru PCLK_GPIO0_PMU>; @@ -1954,7 +1954,7 @@ #interrupt-cells = <0x2>; }; - gpio1: gpio1@ff730000 { + gpio1: gpio@ff730000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff730000 0x0 0x100>; clocks = <&pmucru PCLK_GPIO1_PMU>; @@ -1967,7 +1967,7 @@ #interrupt-cells = <0x2>; }; - gpio2: gpio2@ff780000 { + gpio2: gpio@ff780000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; clocks = <&cru PCLK_GPIO2>; @@ -1980,7 +1980,7 @@ #interrupt-cells = <0x2>; }; - gpio3: gpio3@ff788000 { + gpio3: gpio@ff788000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff788000 0x0 0x100>; clocks = <&cru PCLK_GPIO3>; @@ -1993,7 +1993,7 @@ #interrupt-cells = <0x2>; }; - gpio4: gpio4@ff790000 { + gpio4: gpio@ff790000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; clocks = <&cru PCLK_GPIO4>;