From patchwork Tue Apr 20 08:27:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424554 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp206486jao; Tue, 20 Apr 2021 02:28:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyTUm5gvCptS2+ZuUZynDb+nnRif5/6OAGZf9hy+JEHfykK9rKxVi5unM1eEkJtWkFezGjd X-Received: by 2002:a50:cdd1:: with SMTP id h17mr30638086edj.178.1618910900084; Tue, 20 Apr 2021 02:28:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618910900; cv=none; d=google.com; s=arc-20160816; b=pDdhyS4/FyiD6YFFmTJYo6yRcMqYGQBgvwOfBifZMMIDuJomUJXrvG85i2IOGxEzFE ueW0Z9fC1+V5BR0rLIYNLf+2kBcrXHbPDUWuzA5Eh9Z6QrzcFq58MNmY3xEsKlao1sbt GBH5inATjnp1tLKlVZ+qYEzwBSjQ+IfefGoGDFkLXuLg1DbAzJFhauWL07ZvGorcCfj6 aB1GinlxCwRNBNmHD0DYncp/hEEz/VgIuehBNToY4mXRXBqp02/xKji66eYAOMgWMRNV GcqJccvhf3yEv64K4Pvk8vvT+VwisJyxCfEYI2Hey52zct85FCknl8WXA1nsVMr4yr5n 3HFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=MdOC/7Ouj3K1ExRwdjx1eLF69hV5lBD2NY8X4ae5E1E=; b=p9Nj2PRDYrOWOY+pKG7CG42uMrvxoZod6JLld5npUxHGLd68CeA3U1THSpgHxgxCqa r91A3e+AbkEtqbYZEsHeURiyReDtIfwzre4SjGRdViVmiNhxzhP/YgF2kzESLWgo4DdD ZSRi5NjW1wVBSKMAlTkMhzJHFIr4e+EKfmulfxCLkwnymjWHdPjLPM8fF99PYFrIBlzJ eFbansLrcaUVHwoGnzQLxp54yML8yrjKHjpsy2k5e1/rusGu5MVgYWsqSTfgzqNS1beo AUy9AzyAcnwa8rVxW3IJ4r25esA1ZIh1daEFXia0F2VHHcws6Wyh08dhdRdXc/jCLsbt LmFQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i2si5177143edq.3.2021.04.20.02.28.19; Tue, 20 Apr 2021 02:28:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230090AbhDTJ2u (ORCPT + 4 others); Tue, 20 Apr 2021 05:28:50 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:17379 "EHLO szxga06-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229761AbhDTJ2t (ORCPT ); Tue, 20 Apr 2021 05:28:49 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4FPdbc3yxwzjZtp; Tue, 20 Apr 2021 17:26:20 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:28:08 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 01/10] ACPI/IORT: Add support for RMR node parsing Date: Tue, 20 Apr 2021 10:27:42 +0200 Message-ID: <20210420082751.1829-2-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Add support for parsing RMR node information from ACPI. Find associated stream id and smmu node info from the RMR node and populate a linked list with RMR memory descriptors. Signed-off-by: Shameer Kolothum --- drivers/acpi/arm64/iort.c | 104 +++++++++++++++++++++++++++++++++++++- 1 file changed, 103 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index 2494138a6905..bd96c5e3b36e 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -40,6 +40,19 @@ struct iort_fwnode { static LIST_HEAD(iort_fwnode_list); static DEFINE_SPINLOCK(iort_fwnode_lock); +/* + * One entry for IORT RMR. + */ +struct iort_rmr_entry { + struct list_head list; + u32 sid; + struct acpi_iort_node *smmu; + struct acpi_iort_rmr_desc *rmr_desc; + u32 flags; +}; + +static LIST_HEAD(iort_rmr_list); /* list of RMR regions from ACPI */ + /** * iort_set_fwnode() - Create iort_fwnode and use it to register * iommu data in the iort_fwnode_list @@ -393,7 +406,8 @@ static struct acpi_iort_node *iort_node_get_id(struct acpi_iort_node *node, if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT || node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX || node->type == ACPI_IORT_NODE_SMMU_V3 || - node->type == ACPI_IORT_NODE_PMCG) { + node->type == ACPI_IORT_NODE_PMCG || + node->type == ACPI_IORT_NODE_RMR) { *id_out = map->output_base; return parent; } @@ -1659,6 +1673,91 @@ static void __init iort_enable_acs(struct acpi_iort_node *iort_node) #else static inline void iort_enable_acs(struct acpi_iort_node *iort_node) { } #endif +static int iort_rmr_desc_valid(struct acpi_iort_rmr_desc *desc, u32 count) +{ + int i, j; + + for (i = 0; i < count; i++) { + u64 end, start = desc[i].base_address, length = desc[i].length; + + if (!IS_ALIGNED(start, SZ_64K) || !IS_ALIGNED(length, SZ_64K)) + return -EINVAL; + + end = start + length - 1; + + /* Check for address overlap */ + for (j = i + 1; j < count; j++) { + u64 e_start = desc[j].base_address; + u64 e_end = e_start + desc[j].length - 1; + + if (start <= e_end && end >= e_start) + return -EINVAL; + } + } + + return 0; +} + +static int __init iort_parse_rmr(struct acpi_iort_node *iort_node) +{ + struct acpi_iort_node *smmu; + struct iort_rmr_entry *e; + struct acpi_iort_rmr *rmr; + struct acpi_iort_rmr_desc *rmr_desc; + u32 map_count = iort_node->mapping_count; + u32 sid; + int i, ret = 0; + + if (iort_node->type != ACPI_IORT_NODE_RMR) + return 0; + + if (!iort_node->mapping_offset || map_count != 1) { + pr_err(FW_BUG "Invalid ID mapping, skipping RMR node %p\n", + iort_node); + return -EINVAL; + } + + /* Retrieve associated smmu and stream id */ + smmu = iort_node_get_id(iort_node, &sid, 0); + if (!smmu) { + pr_err(FW_BUG "Invalid SMMU reference, skipping RMR node %p\n", + iort_node); + return -EINVAL; + } + + /* Retrieve RMR data */ + rmr = (struct acpi_iort_rmr *)iort_node->node_data; + if (!rmr->rmr_offset || !rmr->rmr_count) { + pr_err(FW_BUG "Invalid RMR descriptor array, skipping RMR node %p\n", + iort_node); + return -EINVAL; + } + + rmr_desc = ACPI_ADD_PTR(struct acpi_iort_rmr_desc, iort_node, + rmr->rmr_offset); + + ret = iort_rmr_desc_valid(rmr_desc, rmr->rmr_count); + if (ret) { + pr_err(FW_BUG "Invalid RMR descriptor[%d] for node %p, skipping...\n", + i, iort_node); + return ret; + } + + for (i = 0; i < rmr->rmr_count; i++, rmr_desc++) { + e = kmalloc(sizeof(*e), GFP_KERNEL); + if (!e) + return -ENOMEM; + + e->sid = sid; + e->smmu = smmu; + e->rmr_desc = rmr_desc; + e->flags = rmr->flags; + + list_add_tail(&e->list, &iort_rmr_list); + } + + return 0; +} static void __init iort_init_platform_devices(void) { @@ -1688,6 +1787,9 @@ static void __init iort_init_platform_devices(void) iort_enable_acs(iort_node); + if (iort_table->revision == 3) + iort_parse_rmr(iort_node); + ops = iort_get_dev_cfg(iort_node); if (ops) { fwnode = acpi_alloc_fwnode_static(); From patchwork Tue Apr 20 08:27:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424555 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp206535jao; Tue, 20 Apr 2021 02:28:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyNq1Ld2yxhOnSdHOYntbG8JqCbwPvMojRAnsVe3rmXOoUj1sWUAmuM0jgM4T8JZRmd7BWv X-Received: by 2002:a17:906:fcc4:: with SMTP id qx4mr25972108ejb.42.1618910904202; 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[23.128.96.18]) by mx.google.com with ESMTP id i2si5177143edq.3.2021.04.20.02.28.24; Tue, 20 Apr 2021 02:28:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230234AbhDTJ2y (ORCPT + 4 others); Tue, 20 Apr 2021 05:28:54 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:17800 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229761AbhDTJ2y (ORCPT ); Tue, 20 Apr 2021 05:28:54 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4FPdbC1Qwdz7wMj; Tue, 20 Apr 2021 17:25:59 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:28:14 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 02/10] iommu/dma: Introduce generic helper to retrieve RMR info Date: Tue, 20 Apr 2021 10:27:43 +0200 Message-ID: <20210420082751.1829-3-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Reserved Memory Regions(RMR) associated with an IOMMU may be described either through ACPI tables or DT in systems with devices that require a unity mapping or bypass for those regions in IOMMU drivers. Introduce a generic interface so that IOMMU drivers can retrieve and set up necessary mappings. Signed-off-by: Shameer Kolothum --- drivers/iommu/dma-iommu.c | 33 +++++++++++++++++++++++++++++++++ include/linux/dma-iommu.h | 8 ++++++++ include/linux/iommu.h | 19 +++++++++++++++++++ 3 files changed, 60 insertions(+) -- 2.17.1 Reported-by: kernel test robot Reported-by: kernel test robot Reported-by: kernel test robot diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index af765c813cc8..86a1e48b1fe8 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -191,6 +191,39 @@ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) } EXPORT_SYMBOL(iommu_dma_get_resv_regions); +/** + * iommu_dma_get_rmrs - Retrieve Reserved Memory Regions(RMRs) associated + * with a given IOMMU + * @iommu_fwnode: fwnode associated with IOMMU + * @list: RMR list to be populated + * + */ +int iommu_dma_get_rmrs(struct fwnode_handle *iommu_fwnode, + struct list_head *list) +{ + return 0; +} +EXPORT_SYMBOL(iommu_dma_get_rmrs); + +struct iommu_rmr *iommu_dma_alloc_rmr(u64 base, u64 length, u32 sid, + u32 flags) +{ + struct iommu_rmr *rmr; + + rmr = kzalloc(sizeof(*rmr), GFP_KERNEL); + if (!rmr) + return NULL; + + INIT_LIST_HEAD(&rmr->list); + rmr->base_address = base; + rmr->length = length; + rmr->sid = sid; + rmr->flags = flags; + + return rmr; +} +EXPORT_SYMBOL(iommu_dma_alloc_rmr); + static int cookie_init_hw_msi_region(struct iommu_dma_cookie *cookie, phys_addr_t start, phys_addr_t end) { diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h index 706b68d1359b..beb84c4fe5b1 100644 --- a/include/linux/dma-iommu.h +++ b/include/linux/dma-iommu.h @@ -40,6 +40,9 @@ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list); void iommu_dma_free_cpu_cached_iovas(unsigned int cpu, struct iommu_domain *domain); +int iommu_dma_get_rmrs(struct fwnode_handle *iommu, struct list_head *list); +struct iommu_rmr *iommu_dma_alloc_rmr(u64 base, u64 length, u32 sid, u32 flags); + #else /* CONFIG_IOMMU_DMA */ struct iommu_domain; @@ -86,5 +89,10 @@ static inline void iommu_dma_free_cpu_cached_iovas(unsigned int cpu, { } +int iommu_dma_get_rmrs(struct fwnode_handle *iommu, struct list_head *list); +{ + return 0; +} + #endif /* CONFIG_IOMMU_DMA */ #endif /* __DMA_IOMMU_H */ diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 5e7fe519430a..fb8820c40144 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -595,6 +595,25 @@ struct iommu_sva { struct device *dev; }; +/** + * struct iommu_rmr - Reserved Memory Region details per IOMMU + * @list: Linked list pointers to hold RMR region info + * @base_address: base address of Reserved Memory Region + * @length: length of memory region + * @sid: associated stream id + * @flags: flags that apply to the RMR node + */ +struct iommu_rmr { + struct list_head list; + phys_addr_t base_address; + u64 length; + u32 sid; + u32 flags; +}; + +/* RMR Remap permitted */ +#define IOMMU_RMR_REMAP_PERMITTED (1 << 0) + int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, const struct iommu_ops *ops); void iommu_fwspec_free(struct device *dev); From patchwork Tue Apr 20 08:27:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424556 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp206623jao; Tue, 20 Apr 2021 02:28:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz9RIrdXK0Mo5cZ520bWcj8xy4lsUf/WP18W3sGM/5D8sQuvVbN0yTRge2MIfD6rlhBPJFz X-Received: by 2002:a17:906:2e59:: with SMTP id r25mr26308615eji.268.1618910914539; Tue, 20 Apr 2021 02:28:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618910914; cv=none; d=google.com; s=arc-20160816; b=y5iSh3Rw5gvSPvQ5rzQFPQWqj1zQh88IBYlre+ssw3X9sCaM/y1820DKntvHCxAitA 6ldP6msR6v02eBvdm43aFVEVHsIYvHukw1+5uUSGisAddYgKDoigHW41NxOTPyP4V2Fs UhIFrrYPRLaYD9VrVU/gpuNeBgZj6zek26oheAFBQsDWKYhL6PGj/NBPjAWPyPRihN3s IPdeJwQolmW6G5QDh1f+tmSR0kIn0DEbNnAXScF8VqCe7LfsdHJGnkPVRIIy8mve4BYY Dtxht05eCzv0z76zJYBzGEDw7pw05y4xtmyDMh+Vp2it1eLjsDIyzKj1bcPKXhiCjMwE LwiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; 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[23.128.96.18]) by mx.google.com with ESMTP id i2si5177143edq.3.2021.04.20.02.28.34; Tue, 20 Apr 2021 02:28:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230429AbhDTJ3E (ORCPT + 4 others); Tue, 20 Apr 2021 05:29:04 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:16606 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229761AbhDTJ3E (ORCPT ); Tue, 20 Apr 2021 05:29:04 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FPdbQ05w2z19M2h; Tue, 20 Apr 2021 17:26:10 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:28:20 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 03/10] ACPI/IORT: Add a helper to retrieve RMR memory regions Date: Tue, 20 Apr 2021 10:27:44 +0200 Message-ID: <20210420082751.1829-4-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Add a helper function that retrieves RMR memory descriptors associated with a given IOMMU. This will be used by IOMMU drivers to setup necessary mappings. Now that we have this, invoke this from the generic helper interface. Signed-off-by: Shameer Kolothum --- drivers/acpi/arm64/iort.c | 40 +++++++++++++++++++++++++++++++++++++++ drivers/iommu/dma-iommu.c | 3 +++ include/linux/acpi_iort.h | 7 +++++++ 3 files changed, 50 insertions(+) -- 2.17.1 diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index bd96c5e3b36e..66e314b15692 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -837,6 +838,43 @@ static inline int iort_add_device_replay(struct device *dev) return err; } +/** + * iort_iommu_get_rmrs - Helper to retrieve RMR info associated with IOMMU + * @iommu: fwnode for the IOMMU + * @head: RMR list head to be populated + * + * Returns: 0 on success, <0 failure + */ +int iort_iommu_get_rmrs(struct fwnode_handle *iommu_fwnode, + struct list_head *head) +{ + struct iort_rmr_entry *e; + struct acpi_iort_node *iommu; + + iommu = iort_get_iort_node(iommu_fwnode); + if (!iommu) + return 0; + + list_for_each_entry(e, &iort_rmr_list, list) { + struct acpi_iort_rmr_desc *rmr_desc; + struct iommu_rmr *rmr; + + if (e->smmu != iommu) + continue; + + rmr_desc = e->rmr_desc; + rmr = iommu_dma_alloc_rmr(rmr_desc->base_address, + rmr_desc->length, e->sid, + e->flags); + if (!rmr) + return -ENOMEM; + + list_add_tail(&rmr->list, head); + } + + return 0; +} + /** * iort_iommu_msi_get_resv_regions - Reserved region driver helper * @dev: Device from iommu_get_resv_regions() @@ -1107,6 +1145,8 @@ int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) const struct iommu_ops *iort_iommu_configure_id(struct device *dev, const u32 *input_id) { return NULL; } +int iort_iommu_get_rmrs(struct fwnode_handle *fwnode, struct list_head *head) +{ return 0; } #endif static int nc_dma_get_range(struct device *dev, u64 *size) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 86a1e48b1fe8..a942cc04eee1 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -201,6 +201,9 @@ EXPORT_SYMBOL(iommu_dma_get_resv_regions); int iommu_dma_get_rmrs(struct fwnode_handle *iommu_fwnode, struct list_head *list) { + if (!is_of_node(iommu_fwnode)) + return iort_iommu_get_rmrs(iommu_fwnode, list); + return 0; } EXPORT_SYMBOL(iommu_dma_get_rmrs); diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h index 1a12baa58e40..e9f3bc2f4842 100644 --- a/include/linux/acpi_iort.h +++ b/include/linux/acpi_iort.h @@ -39,6 +39,8 @@ const struct iommu_ops *iort_iommu_configure_id(struct device *dev, const u32 *id_in); int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head); phys_addr_t acpi_iort_dma_get_max_cpu_address(void); +int iort_iommu_get_rmrs(struct fwnode_handle *iommu_fwnode, + struct list_head *list); #else static inline void acpi_iort_init(void) { } static inline u32 iort_msi_map_id(struct device *dev, u32 id) @@ -59,6 +61,11 @@ int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) static inline phys_addr_t acpi_iort_dma_get_max_cpu_address(void) { return PHYS_ADDR_MAX; } + +static inline +int iort_iommu_get_rmrs(struct fwnode_handle *iommu_fwnode, + struct list_head *list) +{ return 0; } #endif #endif /* __ACPI_IORT_H__ */ From patchwork Tue Apr 20 08:27:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424557 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp206684jao; Tue, 20 Apr 2021 02:28:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz3aBRKxnRdu8xHLSu2YS1AzbtuNah0ovTU0bNQSQpXmP6dU6IMDtsh2EYfLXepUs+x9jRe X-Received: by 2002:a17:906:e4b:: with SMTP id q11mr26620598eji.540.1618910921231; Tue, 20 Apr 2021 02:28:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618910921; cv=none; d=google.com; s=arc-20160816; b=0EPludnuVZ0B7Lap6bFAbBfTZqGvZkNAIpljPwmkYaNzV4isATaEshEKnnOxn037no wEquzGhLizexlH3G0glXzHgFqI96Q6PgBYrZx0xsw+zYcxdhASJP/XSAsUcsGvuT4fYQ 2bUzZP7MKz8EpShpuFpmaBjXIf+9V4G1rbZyko5KD1x1RCCsFrPc7TbRVgSGczh89PSu qqx1/rpkRZFzXivG9FocDCX4voktLHzugnkQhAhJKMsS+S998C3IHQTk87CV8PyMFnGo CmQNuFHnhQrrbB/AQDHggpGoNyi+gmAsECNIW+LhS+j9pYdSYiwlHgm+lhHvDXzLFJnl QF7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; 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[23.128.96.18]) by mx.google.com with ESMTP id i2si5177143edq.3.2021.04.20.02.28.41; Tue, 20 Apr 2021 02:28:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231183AbhDTJ3J (ORCPT + 4 others); Tue, 20 Apr 2021 05:29:09 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:17801 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229761AbhDTJ3I (ORCPT ); Tue, 20 Apr 2021 05:29:08 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4FPdbV3Xh4z7vrv; Tue, 20 Apr 2021 17:26:14 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:28:26 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 04/10] iommu/dma: Add a helper function to reserve RMRs for IOMMU drivers Date: Tue, 20 Apr 2021 10:27:45 +0200 Message-ID: <20210420082751.1829-5-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org IOMMU drivers can use this to implement their .get_resv_regions callback for any RMR address regions specific to a device. As per ACPI IORT E.b spec, a check is added to make sure OS has preserved the PCIe configuration done by boot firmware. Signed-off-by: Shameer Kolothum --- drivers/iommu/dma-iommu.c | 35 +++++++++++++++++++++++++++++++++++ include/linux/dma-iommu.h | 7 +++++++ 2 files changed, 42 insertions(+) -- 2.17.1 Reported-by: kernel test robot Reported-by: kernel test robot diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index a942cc04eee1..c624000bf230 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -191,6 +191,41 @@ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) } EXPORT_SYMBOL(iommu_dma_get_resv_regions); +void iommu_dma_get_rmr_resv_regions(struct device *dev, struct iommu_rmr *rmr, + struct list_head *list) +{ + int prot = IOMMU_READ | IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO; + struct iommu_resv_region *region; + enum iommu_resv_type type; + + /* + * For ACPI, please make sure the OS has preserved the PCIe configuration + * performed by the boot firmware(See IORT revision E.b). + */ + if (!is_of_node(dev_iommu_fwspec_get(dev)->iommu_fwnode) && + dev_is_pci(dev)) { + struct pci_dev *pdev = to_pci_dev(dev); + struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus); + + if (!host->preserve_config) + return; + } + + if (rmr->flags & IOMMU_RMR_REMAP_PERMITTED) + type = IOMMU_RESV_DIRECT_RELAXABLE; + else + type = IOMMU_RESV_DIRECT; + + region = iommu_alloc_resv_region(rmr->base_address, + rmr->length, prot, + type); + if (!region) + return; + + list_add_tail(®ion->list, list); +} +EXPORT_SYMBOL(iommu_dma_get_rmr_resv_regions); + /** * iommu_dma_get_rmrs - Retrieve Reserved Memory Regions(RMRs) associated * with a given IOMMU diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h index beb84c4fe5b1..dbad5073c9e0 100644 --- a/include/linux/dma-iommu.h +++ b/include/linux/dma-iommu.h @@ -40,6 +40,8 @@ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list); void iommu_dma_free_cpu_cached_iovas(unsigned int cpu, struct iommu_domain *domain); +void iommu_dma_get_rmr_resv_regions(struct device *dev, struct iommu_rmr *rmr, + struct list_head *list); int iommu_dma_get_rmrs(struct fwnode_handle *iommu, struct list_head *list); struct iommu_rmr *iommu_dma_alloc_rmr(u64 base, u64 length, u32 sid, u32 flags); @@ -89,6 +91,11 @@ static inline void iommu_dma_free_cpu_cached_iovas(unsigned int cpu, { } +static void iommu_dma_get_rmr_resv_regions(struct device *dev, struct iommu_rmr *rmr, + struct list_head *list) +{ +} + int iommu_dma_get_rmrs(struct fwnode_handle *iommu, struct list_head *list); { return 0; From patchwork Tue Apr 20 08:27:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424558 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp206733jao; Tue, 20 Apr 2021 02:28:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzxPph6mv0q0akq2TDnMCcDDiXdouNltX0Ql1+b5tIGEjmVl8hALsnxr/NXCy8V3VprllVB X-Received: by 2002:a50:9e4f:: with SMTP id z73mr9130049ede.338.1618910924795; Tue, 20 Apr 2021 02:28:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618910924; cv=none; d=google.com; s=arc-20160816; b=Wv0wJPyd295jS8yRrFD5gym/RJkNqS8dA92xUEG83DXG+YNl4UlMDQRCVUoWABu7Qt pj1CVd96FLdP+FkKRYO9ffucwVcL90mW0Vvzem0yLw24aNnOuWXeLe4iChsGIk5EE/Rv vtydT7T0otjuuhg6fA2F1CPtyg83+lWHjh1Lg29H1sw8vHFC+qKagvCdJ6hCUNdL9xba eDmyaD1ZiIxbLPWtRIOMeo+PaV/6D6zHn9KUURiNy/Y3V86BBsemATdrICJ14tlKDRsd 3mAZF9Cv12att0nZ77kgNuyA8s2A5iYmwNjv7lAM3Wu7igfufgDqnrJHEmzbto8d1+OM avNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=TmkP27Pk+f8J0TllDrId8yr/vncTk4G5gISzN9VDrtM=; b=kP/f0M+wxRWnUuiL8vOeqkYKSjRNuZirRZjQ7aBkWDQs3InPXQMu9n8UWJMLgjyza7 PELH3Cw3UyE95FTr4/OA55qRTF3yQ16mL4iE2M1WGUtc7UoBlGeBnIsq2phz7QsuovOz HQQGVafy2WdoRNefym0+gv0FVnpTkkVFSbfn12+EhPaG7hjNZl3/JDQvhhmFCblbAmbq 2M3NSJnWQ2VjPUV0dfrziEQW9N9atBRy4xgpnb99BwpCiySj3BZOccBM+ig6TyP5j716 YOFh9j4XC+ry9JuXoCYvihc5n6RBf3Lfu5bRn90/ZSB4p1dz4z1NCtVKSW3q/8cVceAA NEDg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i2si5177143edq.3.2021.04.20.02.28.44; Tue, 20 Apr 2021 02:28:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229937AbhDTJ3O (ORCPT + 4 others); Tue, 20 Apr 2021 05:29:14 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:16484 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229494AbhDTJ3N (ORCPT ); Tue, 20 Apr 2021 05:29:13 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FPdbc1ky7zrfYB; Tue, 20 Apr 2021 17:26:20 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:28:32 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 05/10] iommu/arm-smmu-v3: Introduce strtab init helper Date: Tue, 20 Apr 2021 10:27:46 +0200 Message-ID: <20210420082751.1829-6-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Introduce a helper to check the sid range and to init the l2 strtab entries(bypass). This will be useful when we have to initialize the l2 strtab with bypass for RMR SIDs. Signed-off-by: Shameer Kolothum --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 26 ++++++++++++--------- 1 file changed, 15 insertions(+), 11 deletions(-) -- 2.17.1 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 8594b4a83043..29da3b681621 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2347,6 +2347,19 @@ static bool arm_smmu_sid_in_range(struct arm_smmu_device *smmu, u32 sid) static struct iommu_ops arm_smmu_ops; +static int arm_smmu_init_sid_strtab(struct arm_smmu_device *smmu, u32 sid) +{ + /* Check the SIDs are in range of the SMMU and our stream table */ + if (!arm_smmu_sid_in_range(smmu, sid)) + return -ERANGE; + + /* Ensure l2 strtab is initialised */ + if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) + return arm_smmu_init_l2_strtab(smmu, sid); + + return 0; +} + static struct iommu_device *arm_smmu_probe_device(struct device *dev) { int i, ret; @@ -2375,21 +2388,12 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) INIT_LIST_HEAD(&master->bonds); dev_iommu_priv_set(dev, master); - /* Check the SIDs are in range of the SMMU and our stream table */ for (i = 0; i < master->num_sids; i++) { u32 sid = master->sids[i]; - if (!arm_smmu_sid_in_range(smmu, sid)) { - ret = -ERANGE; + ret = arm_smmu_init_sid_strtab(smmu, sid); + if (ret) goto err_free_master; - } - - /* Ensure l2 strtab is initialised */ - if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) { - ret = arm_smmu_init_l2_strtab(smmu, sid); - if (ret) - goto err_free_master; - } } master->ssid_bits = min(smmu->ssid_bits, fwspec->num_pasid_bits); From patchwork Tue Apr 20 08:27:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424559 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp206778jao; Tue, 20 Apr 2021 02:28:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwCNRoOghx2HotQJJHiMg46MyxIpM6+wPqqexxwnI37z/+Aw70/gNMwFPB772a8UcLx6hGK X-Received: by 2002:a05:6402:354b:: with SMTP id f11mr30739509edd.361.1618910929135; Tue, 20 Apr 2021 02:28:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618910929; cv=none; d=google.com; s=arc-20160816; b=XYXsKxid+EzvMoC49ctrZnZNJaptYjE0ItGidaNkspziidcLqA3p845CA/59BDuBAg +XKij6jcC34+Ww6UYScz9r/BGhBOwL2ToTYdl8us0DGS2zt2NV5OiqrtN9O8iswMKKWk 2uGU5pjbuPsJMh4EuAPf0wic1LCoVUYr5la5tfKs1EhgBTR4y5C73QqWJlsnJAYHSNz3 9AecbBnpWle6C79JiqHQE1d+D02qRu0uoovoscSAV+387ZIiP9DuU20YUvQFiiizO2VM suoJ7neNpCRuzviCXM5LBL6y2Wr/OjDuov5iJtHYfPqg9gecZky5qEJqMm0sPdwHfQHR KyAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=6pMNzma1IHzrNA80hXIWwlnMBZ5bik8aJVXmPO2xxeE=; b=NkdkeDxmm5imn7yRcRKq2Wb/Im8AnxKaf5dxpGkLE2dlBtYaPTgiwGOYJIretdKTIp o56DsKQI7tGPGl1lriefATG96Vr2wf7G49jpgT5Rj8hZQOb0KFFT3sM2/tqtArPU70A4 BvU1gFS92wvMWxoNEP9gjhW1ZXUL738AeALgcZbP2Rdh0hz0CGavmjoi8yr9nivCKhDv /sBf1V4kRFgXWfiyLfjU/NwCl1cDuD8vDW+N0tMyPoCL5aQ6+YXq2+01mpYkkT5kQH0N e4JIZFRCN1ozrE/LxRnuDlrbyXMo5h/rLTmF1wM8syx6Jpn8oQVGRKdvR9YdCnj213vM EZXQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i2si5177143edq.3.2021.04.20.02.28.48; Tue, 20 Apr 2021 02:28:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229761AbhDTJ3T (ORCPT + 4 others); Tue, 20 Apr 2021 05:29:19 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:16485 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229494AbhDTJ3S (ORCPT ); Tue, 20 Apr 2021 05:29:18 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FPdbj2CmDzrf4J; Tue, 20 Apr 2021 17:26:25 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:28:38 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 06/10] =?utf-8?q?iommu/arm-smmu-v3=3A_Add_bypass_flag_t?= =?utf-8?b?b8KgYXJtX3NtbXVfd3JpdGVfc3RydGFiX2VudCgp?= Date: Tue, 20 Apr 2021 10:27:47 +0200 Message-ID: <20210420082751.1829-7-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org By default, disable_bypass is set and any dev without an iommu domain installs STE with CFG_ABORT during arm_smmu_init_bypass_stes(). Introduce a "bypass" flag to arm_smmu_write_strtab_ent() so that we can force it to install CFG_BYPASS STE for specific SIDs. This will be useful for RMR related SIDs. Signed-off-by: Shameer Kolothum --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 29da3b681621..190285812182 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1176,7 +1176,7 @@ static void arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, u32 sid) } static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, - __le64 *dst) + __le64 *dst, bool bypass) { /* * This is hideously complicated, but we only really care about @@ -1247,7 +1247,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, /* Bypass/fault */ if (!smmu_domain || !(s1_cfg || s2_cfg)) { - if (!smmu_domain && disable_bypass) + if (!smmu_domain && disable_bypass && !bypass) val |= FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_ABORT); else val |= FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_BYPASS); @@ -1322,7 +1322,7 @@ static void arm_smmu_init_bypass_stes(__le64 *strtab, unsigned int nent) unsigned int i; for (i = 0; i < nent; ++i) { - arm_smmu_write_strtab_ent(NULL, -1, strtab); + arm_smmu_write_strtab_ent(NULL, -1, strtab, false); strtab += STRTAB_STE_DWORDS; } } @@ -2076,7 +2076,7 @@ static void arm_smmu_install_ste_for_dev(struct arm_smmu_master *master) if (j < i) continue; - arm_smmu_write_strtab_ent(master, sid, step); + arm_smmu_write_strtab_ent(master, sid, step, false); } } From patchwork Tue Apr 20 08:27:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424560 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp206895jao; Tue, 20 Apr 2021 02:29:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy82v4MCDSCWlC7xM8lLPjOTHoD+jX2jVCmZkvmzQCI7oQ/TOP7fv79N7rP8QdtAZ5dG6WR X-Received: by 2002:a17:906:29ca:: with SMTP id y10mr27301622eje.250.1618910939899; Tue, 20 Apr 2021 02:28:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618910939; cv=none; d=google.com; s=arc-20160816; b=a9Aa2tGRbgVccVbHCjw1QlLJFpZtLRLuqPmJR569YzCKq056nIRrlU+rYNtGSQa+bg buY5OBIogeoOVzGvcKhhWRVYjLqsZOOdALUllR2LESMweJaK5VrAldv9W84kGR3UA7p2 tNzMSX4Kl2VjJm02iVf8787bEtN20BFfq8vJeQ5PsVaa39dwPuowBeRqyG89EaO7FzkJ YFHnWARzlyWwCjEEkI7xATVv35abhLOMwFChgfdkPiNtT1KSLsOO9GCukMZMD9HWBmJ1 if2192BUb5eXh2Idg9ZmQYFhNm5R8OLWgvUHAL8dt5HobH0ZoRM0FgY38FEHxbu5dmDU 286Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=oeWF7hH7n+Tw7lHBL5J+ZOk4gNTM5rWwWdN9L8sozQY=; b=whvSO8Rvysm6gG16wAv5ng74UQATUxG/It5giwka1Gzc4RZPqP2yNyx5E4yNqNLKKy GIhr7SVqKRu+bqMCP8hinXlbNd8MDhpDAmJAitryiNFb2Cz10gnb7Dw912UOFAb6UZw+ UXp4Y3rINMKZoCiw2Spkrqx6KgXdBZsI3pNTP8PLUHXfe/XgEhKFK1ziZ9hSj6CrxQdQ 3hhNNjq5+q2oIwvw0Rrx8qM4e0cZFviuivIB1W+aJVTRUGnnPMN+ROeizsg/wr6Htm5+ u80ZMUQ5pn3RFHv2qc8nxoU1ZjJCvc50TzqtphPDEM+sYMy5bCneUbdp7eZMJvn8ipEU NEBw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ds2si13913381ejc.749.2021.04.20.02.28.59; Tue, 20 Apr 2021 02:28:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231300AbhDTJ33 (ORCPT + 4 others); Tue, 20 Apr 2021 05:29:29 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:16607 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229494AbhDTJ33 (ORCPT ); Tue, 20 Apr 2021 05:29:29 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FPdbv2TP3z19M25; Tue, 20 Apr 2021 17:26:35 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:28:45 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 07/10] iommu/arm-smmu-v3: Get associated RMR info and install bypass STE Date: Tue, 20 Apr 2021 10:27:48 +0200 Message-ID: <20210420082751.1829-8-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Check if there is any RMR info associated with the devices behind the SMMUv3 and if any, install bypass STEs for them. This is to keep any ongoing traffic associated with these devices alive when we enable/reset SMMUv3 during probe(). Signed-off-by: Shameer Kolothum --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 35 +++++++++++++++++++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 ++ 2 files changed, 37 insertions(+) -- 2.17.1 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 190285812182..14e9c7034c04 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3530,6 +3530,37 @@ static void __iomem *arm_smmu_ioremap(struct device *dev, resource_size_t start, return devm_ioremap_resource(dev, &res); } +static void arm_smmu_rmr_install_bypass_ste(struct arm_smmu_device *smmu) +{ + struct iommu_rmr *e; + int ret; + + /* + * Since, we don't have a mechanism to differentiate the RMR + * SIDs that has an ongoing live stream, install bypass STEs + * for all the reported ones.  + */ + list_for_each_entry(e, &smmu->rmr_list, list) { + __le64 *step; + + ret = arm_smmu_init_sid_strtab(smmu, e->sid); + if (ret) { + dev_err(smmu->dev, "RMR bypass(0x%x) failed\n", + e->sid); + continue; + } + + step = arm_smmu_get_step_for_sid(smmu, e->sid); + arm_smmu_write_strtab_ent(NULL, e->sid, step, true); + } +} + +static int arm_smmu_get_rmr(struct arm_smmu_device *smmu) +{ + INIT_LIST_HEAD(&smmu->rmr_list); + return iommu_dma_get_rmrs(dev_fwnode(smmu->dev), &smmu->rmr_list); +} + static int arm_smmu_device_probe(struct platform_device *pdev) { int irq, ret; @@ -3613,6 +3644,10 @@ static int arm_smmu_device_probe(struct platform_device *pdev) /* Record our private device structure */ platform_set_drvdata(pdev, smmu); + /* Check for RMRs and install bypass STEs if any */ + if (!arm_smmu_get_rmr(smmu)) + arm_smmu_rmr_install_bypass_ste(smmu); + /* Reset the device */ ret = arm_smmu_device_reset(smmu, bypass); if (ret) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index f985817c967a..e210fa81538a 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -639,6 +639,8 @@ struct arm_smmu_device { /* IOMMU core code handle */ struct iommu_device iommu; + + struct list_head rmr_list; }; /* SMMU private data for each master */ From patchwork Tue Apr 20 08:27:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424561 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp206930jao; Tue, 20 Apr 2021 02:29:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx3jVxMxd2dtgP6SRw5cNuVIjvyjvgY4VaEQiOzgPo25VzQ2lXmCne9059F6KwN+3qTgWjt X-Received: by 2002:a17:906:154f:: with SMTP id c15mr26798108ejd.142.1618910944536; Tue, 20 Apr 2021 02:29:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618910944; cv=none; d=google.com; s=arc-20160816; b=sTF4yoyIV/UFW9hwkQtgrRD7rweygC8Izj9Pz40eGatZdsWQykSevYCEyfgffpUJKm C2uz7A8wa6PvTGw2wSJ/J87VOCBBaDb3nXTMpUmEtkS3X7WdAMiusAN5Z76Q+PppfqWs Xl/8pWvRg/FClrak0+7Omzbf3CWNB5NKIb+pynZcGmF/IqE3BMSr/wQRJk4bdb/fGv0W n6fX2MIDF/XWpfQjfduGInTEbkJH2TfkExi3X8m86KKJg4nrRLXYuPBIVrYArn8drnRl KgoGKJ9nbO39qn9o7We1PShzlOQEcfQV1hIZN/hIHWJS26VwwNbtJrhOtGHiH6OH1XDm +/Tg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ZyQLMlenBhIjA4/aCCmelbKRPRRuSzs82jNo/8rVPlM=; b=YtkUnwMeiw85qV/5na/+QTmh7/XQqO2d0/rZvxxsa7vc4pO/Asrr/gcOsrVg6RxztO khZZOAquWaHoO66qgz2GDUdcrj9GYTRcMReSodDkW6p+cs/WbbPH7l//70GoJd5TSAq3 D/ByvyL5JbLXr/COeoRaeeZkyNvH7FhxPSvVzbesFx6mrNnwAuT4NbGxRQn+6SBZquaj b8XveZ9UZBWj7iSlA0QlTf7YATlS+jh8ZcvHr5mw2hhxGszEPYWEiYJayKspd2KaSKCe fbK/a2/Y3DU+JH/ZMCe4RIQ0Az6wAsaXX+YNs2FrsjDOIZRoSGPFPMx3104jAXKqnF5W VnsA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ds2si13913381ejc.749.2021.04.20.02.29.04; Tue, 20 Apr 2021 02:29:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231364AbhDTJ3e (ORCPT + 4 others); Tue, 20 Apr 2021 05:29:34 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:16608 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231325AbhDTJ3e (ORCPT ); Tue, 20 Apr 2021 05:29:34 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FPdc02yFRz19Ln5; Tue, 20 Apr 2021 17:26:40 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:28:51 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 08/10] iommu/arm-smmu-v3: Reserve any RMR regions associated with a dev Date: Tue, 20 Apr 2021 10:27:49 +0200 Message-ID: <20210420082751.1829-9-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Get RMR regions associated with a dev reserved so that there is a unity mapping for them in SMMU. Signed-off-by: Shameer Kolothum --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 29 +++++++++++++++++++++ 1 file changed, 29 insertions(+) -- 2.17.1 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 14e9c7034c04..8bacedf7bb34 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2531,6 +2531,34 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) return iommu_fwspec_add_ids(dev, args->args, 1); } +static bool arm_smmu_dev_has_rmr(struct arm_smmu_master *master, + struct iommu_rmr *e) +{ + int i; + + for (i = 0; i < master->num_sids; i++) { + if (e->sid == master->sids[i]) + return true; + } + + return false; +} + +static void arm_smmu_rmr_get_resv_regions(struct device *dev, + struct list_head *head) +{ + struct arm_smmu_master *master = dev_iommu_priv_get(dev); + struct arm_smmu_device *smmu = master->smmu; + struct iommu_rmr *rmr; + + list_for_each_entry(rmr, &smmu->rmr_list, list) { + if (!arm_smmu_dev_has_rmr(master, rmr)) + continue; + + iommu_dma_get_rmr_resv_regions(dev, rmr, head); + } +} + static void arm_smmu_get_resv_regions(struct device *dev, struct list_head *head) { @@ -2545,6 +2573,7 @@ static void arm_smmu_get_resv_regions(struct device *dev, list_add_tail(®ion->list, head); iommu_dma_get_resv_regions(dev, head); + arm_smmu_rmr_get_resv_regions(dev, head); } static bool arm_smmu_dev_has_feature(struct device *dev, From patchwork Tue Apr 20 08:27:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424562 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp206990jao; Tue, 20 Apr 2021 02:29:10 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyNBgQhFcd+17KJ0NW+eCtigMAx8cDkHc9YTeTTpKRH9XjZo2qgo97JlQ9khhjlqrhzZqTb X-Received: by 2002:a17:907:7051:: with SMTP id ws17mr26694460ejb.498.1618910950709; Tue, 20 Apr 2021 02:29:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618910950; cv=none; d=google.com; s=arc-20160816; b=ZHxL7jmpjiUem3wRPTExn9LI7B91KY9jN4WJ7gi125+WsyAf3qf3zPnWGB05EYBg9f I1YoVvMwZkzLYqcx3ELP12YI9RshR2wsuUCqRQl7G+jGHt1pVBkmBfqdLgsKRrbGYgTv hTVyZlmkd288wiK1faVqKN4Na9lkqMUyMno6AfD+QAkS2G/zULqBHRlrAp0NHkbIhxsh kmKJBj4BOt810rQlVtAlfPnCl45PPWL8iFSQXhDXUEHk1WCV6QRtuwehinVxh2fA5itq YK16B5iGmOXkMFZa/WuJAxEBYmkjThACaunclA/N7p1ABpsICQG8aIile4Im3Tnte9rH Oydg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lZkgU0fxhYv2WpMn0yIyept9dGbJaF8kLuRZsxtlvng=; b=TUCA+IjFdRpGHvGRf+LAnT0lsGHzB2+8xb9hkqrg2V5F8Ea1MWqgciYN6AKAy861Vp M9JauamZfC3khuiGV8oo3TUgMKbdoN6lDJoQJi6XN66a1mo4rPN1Ro5YheyE/r0yhohu coAaV2MtSQENYH7rUW57onE/Z1Zi9E/rwfcdb8cbxXcEflN3wRxTQ3BmfokUnmAWkCu5 p+/aXZBgC87rdku3udIS7CQe4S37jEDbbQ34+SSeIgwYUiZJDsd7K84Wn5JA7ZXN4AI7 +B7wJshi/Jc5Gxd2M3V8V99YTbEumFKQqXbD/h9LsWeEDjoNCs/hmUECWZEtvoKT/wLO QW2A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ds2si13913381ejc.749.2021.04.20.02.29.10; Tue, 20 Apr 2021 02:29:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230234AbhDTJ3k (ORCPT + 4 others); Tue, 20 Apr 2021 05:29:40 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:16486 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229494AbhDTJ3j (ORCPT ); Tue, 20 Apr 2021 05:29:39 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FPdc54Q90zrffL; Tue, 20 Apr 2021 17:26:45 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:28:57 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 09/10] iommu/arm-smmu: Get associated RMR info and install bypass SMR Date: Tue, 20 Apr 2021 10:27:50 +0200 Message-ID: <20210420082751.1829-10-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org From: Jon Nettleton Check if there is any RMR info associated with the devices behind the SMMU and if any, install bypass SMRs for them. This is to keep any ongoing traffic associated with these devices alive when we enable/reset SMMU during probe(). Signed-off-by: Jon Nettleton Signed-off-by: Shameer Kolothum --- drivers/iommu/arm/arm-smmu/arm-smmu.c | 42 +++++++++++++++++++++++++++ drivers/iommu/arm/arm-smmu/arm-smmu.h | 2 ++ 2 files changed, 44 insertions(+) -- 2.17.1 diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index d8c6bfde6a61..4d2f91626d87 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -2102,6 +2102,43 @@ err_reset_platform_ops: __maybe_unused; return err; } +static void arm_smmu_rmr_install_bypass_smr(struct arm_smmu_device *smmu) +{ + struct iommu_rmr *e; + int i, cnt = 0; + u32 smr; + + for (i = 0; i < smmu->num_mapping_groups; i++) { + smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i)); + if (!FIELD_GET(ARM_SMMU_SMR_VALID, smr)) + continue; + + list_for_each_entry(e, &smmu->rmr_list, list) { + if (FIELD_GET(ARM_SMMU_SMR_ID, smr) != e->sid) + continue; + + smmu->smrs[i].id = FIELD_GET(ARM_SMMU_SMR_ID, smr); + smmu->smrs[i].mask = FIELD_GET(ARM_SMMU_SMR_MASK, smr); + smmu->smrs[i].valid = true; + + smmu->s2crs[i].type = S2CR_TYPE_BYPASS; + smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; + smmu->s2crs[i].cbndx = 0xff; + + cnt++; + } + } + + dev_notice(smmu->dev, "\tpreserved %d boot mapping%s\n", cnt, + cnt == 1 ? "" : "s"); +} + +static int arm_smmu_get_rmr(struct arm_smmu_device *smmu) +{ + INIT_LIST_HEAD(&smmu->rmr_list); + return iommu_dma_get_rmrs(dev_fwnode(smmu->dev), &smmu->rmr_list); +} + static int arm_smmu_device_probe(struct platform_device *pdev) { struct resource *res; @@ -2231,6 +2268,11 @@ static int arm_smmu_device_probe(struct platform_device *pdev) } platform_set_drvdata(pdev, smmu); + + /* Check for RMRs and install bypass SMRs if any */ + if (!arm_smmu_get_rmr(smmu)) + arm_smmu_rmr_install_bypass_smr(smmu); + arm_smmu_device_reset(smmu); arm_smmu_test_smr_masks(smmu); diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index d2a2d1bc58ba..ca9559eb8733 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -326,6 +326,8 @@ struct arm_smmu_device { /* IOMMU core code handle */ struct iommu_device iommu; + + struct list_head rmr_list; }; enum arm_smmu_context_fmt { From patchwork Tue Apr 20 08:27:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 424563 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp207054jao; Tue, 20 Apr 2021 02:29:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxfT2gZHbFWkvadWqmrjzmAJy8EpL7QwF8ZEdU1xn+5CsUROKaaSCX/kFwRuIkrlbq9iaed X-Received: by 2002:a50:aad9:: with SMTP id r25mr31219860edc.125.1618910957138; Tue, 20 Apr 2021 02:29:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618910957; cv=none; d=google.com; s=arc-20160816; b=F/5dBQ2ojW11OkXBMtkOBjpz8o9jbVIXsYspE2UAFzH2FNlmJ5djmN/dfLArKjO4YK S10jDjFLbrw7zwU5otuPiY9ve6kb7j4G4K+uRgGJ6EiF/NpO/f13LHOJ8SV6/UkUM5/N oeaRM5U1q31S8x3tAayKBB4tDOOwa50ViRimGsB3VEPs5JwquGsCW5AkheBYd0H1D609 Phwlfx/9tgKT7/6yXCW9UCjQ013+2s3gtNZg4NhRCfBm5+6DwfGI6CHpPtios311gLbb 9CLTjpDkWlQEK4d1j4+SlluLJJ371fuR87EaBcqS2gjmn0QerRX/Ot1gfyov6vFFJTev +cAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=TdWOjJ1hFBmVmFu2UmzRupM0NvuBxsxXUIShSnQyDqQ=; b=FrxzJSEDUtAA0mI/FOXXVp7Cxosh9MfyCa7zoJoQAnPC4rRq16hhlgS/pNMDWhWStm gUgxLMjbL4wAAvRfSL/noNLbs++oJX+7kA4n9gvPlm2YNRnmE9SxwZi5ecuq5/5CxypZ yE3WLp1rX4oIHaa63y7U9Sn49yjWkP9Fe4ZW9AyW8kHx4c89hq7u+ct4KOKv6St6shRK eRbH9vrCZuUGw0Fl8FeUD+fVpnfbzWSGkCryfUekaQuRkqCuiBOLQe5vkxtqJeU2h8MP KKXfz7+vvCM3zuydII+2c4GvdLFUM2XaCyKLqaBfa9FrUau7moVH5GXUL9Lmn9s7WubI zAXg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ds2si13913381ejc.749.2021.04.20.02.29.16; Tue, 20 Apr 2021 02:29:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231325AbhDTJ3r (ORCPT + 4 others); Tue, 20 Apr 2021 05:29:47 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:16143 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231370AbhDTJ3q (ORCPT ); Tue, 20 Apr 2021 05:29:46 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FPdbS6mRpzpZTX; Tue, 20 Apr 2021 17:26:12 +0800 (CST) Received: from A2006125610.china.huawei.com (10.47.83.26) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Tue, 20 Apr 2021 17:29:03 +0800 From: Shameer Kolothum To: , , CC: , , , , , , , , , Subject: [PATCH v3 10/10] iommu/arm-smmu: Reserve any RMR regions associated with a dev Date: Tue, 20 Apr 2021 10:27:51 +0200 Message-ID: <20210420082751.1829-11-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> References: <20210420082751.1829-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.83.26] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org From: Jon Nettleton Get RMR regions associated with a dev reserved so that there is a unity mapping for them in SMMU. Signed-off-by: Jon Nettleton Signed-off-by: Shameer Kolothum --- drivers/iommu/arm/arm-smmu/arm-smmu.c | 33 +++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) -- 2.17.1 Reported-by: kernel test robot diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index 4d2f91626d87..8cbe8b98e8f0 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1591,6 +1591,38 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) return iommu_fwspec_add_ids(dev, &fwid, 1); } +static bool arm_smmu_dev_has_rmr(struct arm_smmu_master_cfg *cfg, + struct iommu_fwspec *fwspec, + struct iommu_rmr *e) +{ + struct arm_smmu_device *smmu = cfg->smmu; + struct arm_smmu_smr *smrs = smmu->smrs; + int i, idx; + + for_each_cfg_sme(cfg, fwspec, i, idx) { + if (e->sid == smrs[idx].id) + return true; + } + + return false; +} + +static void arm_smmu_rmr_get_resv_regions(struct device *dev, + struct list_head *head) +{ + struct arm_smmu_master_cfg *cfg = dev_iommu_priv_get(dev); + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + struct arm_smmu_device *smmu = cfg->smmu; + struct iommu_rmr *rmr; + + list_for_each_entry(rmr, &smmu->rmr_list, list) { + if (!arm_smmu_dev_has_rmr(cfg, fwspec, rmr)) + continue; + + iommu_dma_get_rmr_resv_regions(dev, rmr, head); + } +} + static void arm_smmu_get_resv_regions(struct device *dev, struct list_head *head) { @@ -1605,6 +1637,7 @@ static void arm_smmu_get_resv_regions(struct device *dev, list_add_tail(®ion->list, head); iommu_dma_get_resv_regions(dev, head); + arm_smmu_rmr_get_resv_regions(dev, head); } static int arm_smmu_def_domain_type(struct device *dev)