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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id 145sm5933229pfv.196.2021.05.03.22.28.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 May 2021 22:28:56 -0700 (PDT) From: Shawn Guo To: Stephen Boyd Cc: Bjorn Andersson , Rob Herring , Sivaprakash Murugesan , Benjamin Li , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Shawn Guo Subject: [PATCH 1/5] clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical Date: Tue, 4 May 2021 13:28:40 +0800 Message-Id: <20210504052844.21096-2-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210504052844.21096-1-shawn.guo@linaro.org> References: <20210504052844.21096-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The clock source for MSM8916 cpu cores is like below. |\ a53pll --------| \ a53mux +------+ | |------------| cpus | gpll0_vote --------| / +------+ |/ So clock a53mux rather than a53pll is actually the clock source of cpu cores. It makes more sense to flag a53mux rather than a53pll as critical, since a53pll could be irrelevant if a53mux switches its parent clock to be gpll0_vote. Signed-off-by: Shawn Guo --- drivers/clk/qcom/a53-pll.c | 1 - drivers/clk/qcom/apcs-msm8916.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c index 45cfc57bff92..8614b0b0e82c 100644 --- a/drivers/clk/qcom/a53-pll.c +++ b/drivers/clk/qcom/a53-pll.c @@ -70,7 +70,6 @@ static int qcom_a53pll_probe(struct platform_device *pdev) init.parent_names = (const char *[]){ "xo" }; init.num_parents = 1; init.ops = &clk_pll_sr2_ops; - init.flags = CLK_IS_CRITICAL; pll->clkr.hw.init = &init; ret = devm_clk_register_regmap(dev, &pll->clkr); diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c index cf69a97d0439..d7ac6d6b15b6 100644 --- a/drivers/clk/qcom/apcs-msm8916.c +++ b/drivers/clk/qcom/apcs-msm8916.c @@ -65,7 +65,7 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev) init.parent_data = pdata; init.num_parents = ARRAY_SIZE(pdata); init.ops = &clk_regmap_mux_div_ops; - init.flags = CLK_SET_RATE_PARENT; + init.flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT; a53cc->clkr.hw.init = &init; a53cc->clkr.regmap = regmap; From patchwork Tue May 4 05:28:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 431283 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29E33C433B4 for ; Tue, 4 May 2021 05:29:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0FE2B61186 for ; Tue, 4 May 2021 05:29:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229795AbhEDF3z (ORCPT ); Tue, 4 May 2021 01:29:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229746AbhEDF3y (ORCPT ); Tue, 4 May 2021 01:29:54 -0400 Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B521C061761 for ; Mon, 3 May 2021 22:29:00 -0700 (PDT) Received: by mail-pf1-x42c.google.com with SMTP id i13so6313653pfu.2 for ; Mon, 03 May 2021 22:29:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=X/MGql9b3iDHbEGk1fEF6JKWQobHRfGqiTtP2HlirKU=; b=iS9nCRP7N9X6bE0kTfKXOusCAuIrnl8h6+WTgpHG4cgzI3sKDwyO86ZcNy0PBqRRlm WHuYmTz71Bh4ORHanWMW7xywzeUOSI5dYYR7e+eNev09g47nJN3/P6/dF1ONqNLXLmaT w1p1G4afuDqhq46T45V6isPZyTJBz/Wg6b0PHuH5KOmIPAwZ2kYRMbcFUpODesq4kyLi a/RTcLtmwjEjp92s6ij9UqXVFMHNKgkSuw88u65bssRRLx7Q87Z/tcYbyCeET25aF1T5 b0FZnS72x/TumwhihxZX8uDeaFYfI5P+UaE8WD952Pj+wIyeeeFZsJMX4RSoAhu8GLBy Qb/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=X/MGql9b3iDHbEGk1fEF6JKWQobHRfGqiTtP2HlirKU=; b=BGe093XKhHK7UssWvmD1RBxKFjW5jC+Gbt1dVmJ3BAPZGz7JV/bt53PQT6rhUaHkLx TU6SzXkEgnSAF0Df6sNgqMHBEL00oEQwaIJ2zxUqP9I/nMzGiDJ1KmhiWKUPZkUZcjdK 60knf1DAQ71bTr8hfp2N+8YlJk4U0SF3AdS+9nyzjivblwHJs9//jIOyY2Iv5ts94Oq8 dOGmvvF0f/hgIU+yh0WXdx0Uu4ew88n1QRr1KVi3xmQxmp9wtASNY88B7N01ZPgB8jJr FwOJteBKlsobPGe9WLy8cz9Cby18yv49zeUFjIu2ipxB9v4R3NVf786X/s74p3+4wThg mSrg== X-Gm-Message-State: AOAM533D65Vs8faVID/HX2kWkpm22d5kuGKVVhRmA2+bSpWY+C4Cpsq0 Pf07Md8I1WcqGD5GdbjFRkt1dQ== X-Google-Smtp-Source: ABdhPJywiTibTwj7xJxYmWX80ZWetjXfmFhE3ID2gOO9/TOdnUtWWo5TilrYykHq1s/yrBXP6Sm5LQ== X-Received: by 2002:a63:1a5e:: with SMTP id a30mr21988129pgm.156.1620106139731; Mon, 03 May 2021 22:28:59 -0700 (PDT) Received: from localhost.localdomain (80.251.214.228.16clouds.com. [80.251.214.228]) by smtp.gmail.com with ESMTPSA id 145sm5933229pfv.196.2021.05.03.22.28.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 May 2021 22:28:59 -0700 (PDT) From: Shawn Guo To: Stephen Boyd Cc: Bjorn Andersson , Rob Herring , Sivaprakash Murugesan , Benjamin Li , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Shawn Guo Subject: [PATCH 2/5] dt-bindings: clock: update qcom, a53pll bindings for MSM8939 support Date: Tue, 4 May 2021 13:28:41 +0800 Message-Id: <20210504052844.21096-3-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210504052844.21096-1-shawn.guo@linaro.org> References: <20210504052844.21096-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Update qcom,a53pll bindings for MSM8939 support: - Add optional clock-output-names property. - Add MSM8939 specific compatibles. - Add MSM8939 examples. Signed-off-by: Shawn Guo --- .../bindings/clock/qcom,a53pll.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml index db3d0ea6bc7a..7a410a76be2f 100644 --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml @@ -18,6 +18,9 @@ properties: enum: - qcom,ipq6018-a53pll - qcom,msm8916-a53pll + - qcom,msm8939-a53pll-c0 + - qcom,msm8939-a53pll-c1 + - qcom,msm8939-a53pll-cci reg: maxItems: 1 @@ -33,6 +36,9 @@ properties: items: - const: xo + clock-output-names: + maxItems: 1 + required: - compatible - reg @@ -57,3 +63,31 @@ examples: clocks = <&xo>; clock-names = "xo"; }; + #Example 3 - A53 PLLs found on MSM8939 devices + - | + a53pll_c1: clock-controller@b016000 { + compatible = "qcom,msm8939-a53pll-c1"; + reg = <0xb016000 0x40>; + #clock-cells = <0>; + clocks = <&xo_board>; + clock-names = "xo"; + clock-output-names = "a53pll_c1"; + }; + + a53pll_c0: clock-controller@b116000 { + compatible = "qcom,msm8939-a53pll-c0"; + reg = <0xb116000 0x40>; + #clock-cells = <0>; + clocks = <&xo_board>; + clock-names = "xo"; + clock-output-names = "a53pll_c0"; + }; + + a53pll_cci: clock-controller@b1d0000 { + compatible = "qcom,msm8939-a53pll-cci"; + reg = <0xb1d0000 0x40>; + #clock-cells = <0>; + clocks = <&xo_board>; + clock-names = "xo"; + clock-output-names = "a53pll_cci"; + }; From patchwork Tue May 4 05:28:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 430911 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83A42C433B4 for ; Tue, 4 May 2021 05:29:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4F30D613AA for ; Tue, 4 May 2021 05:29:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229796AbhEDF35 (ORCPT ); Tue, 4 May 2021 01:29:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229804AbhEDF35 (ORCPT ); Tue, 4 May 2021 01:29:57 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1824BC06174A for ; Mon, 3 May 2021 22:29:03 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id e15so6276739pfv.10 for ; Mon, 03 May 2021 22:29:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gIUTD/xcjRZwD9lqPa/K9njfq+3aHSwHrSeb5ACE0xU=; b=QIVCAcQd/JmeV2I5FJybb+PlBKZFa6WoZXs9qKR9SoOX0cOuvd70hAfpHS6zJnaQw+ mpW9xcgkSFs4bvFVpT7ahwP+JULNBJNcPnsQIzYEjv+wz5Pd5I3lXunFyCrdxECtJ7Qh 4IzsL/AIUfpW5xwzPyymI8DaRI9m2Fq1j3V+FhsB+WSjt7//BH+EdX5pRvgJVuDd5FEP tuGjtf0D62t1jmE6wtzJZiq6FnlZbEqBQGUXwBH2MUWAD1aJe52hFs4q9+ccEo003AV3 mz5Gc/NfqSeb1ywBlFtHLpAOP//ILN3O0imX/qUtGIrve/RXMjrHpyEyuwbeK9qHB4pY tR+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gIUTD/xcjRZwD9lqPa/K9njfq+3aHSwHrSeb5ACE0xU=; b=jpecp2inWNq7PlQeq6ZVxNgwLAGGlFKt6P/lFLeGMvUJ8CeJA5dLjJ4IZI0R1TLQQe rLisfyS0BfjBjnouj6xBWBzFTR6pHe0aJAxI6Bz/ou54uw5f3PFhk1XPjfnOwazmUG0u XRUpPuxanjugqw6HzxpVL2M+uIkNCsrcE1ZXS66VAh46wWvbNyIKv/FDpQE36OOLetOF bWJcpSWcocy/mLlJgzdS85usWsshX2d/8NNdR31qrIA6V+9PvnMt0Beol/jUXgAxb9xy HADc3kjPVux2dNBrfGUKvAszVSIXJLIIsrtnYkohmNcztMdaJShh2M8FNNZzeDOEa15K HVHg== X-Gm-Message-State: AOAM533LHYrqXhwftX14eEvhdp2vegQ+qjH4DezK7y5/eICjmb4e2G0J cs/1OMT9WT/kxw67aQ/airuTWHjrQJFDzA== X-Google-Smtp-Source: ABdhPJzZvHBUBCfAVvV9pWsMlraYAleSxgnTSS6GWTWe14yvWwccpwZ9dW0mGzGVRRFCKg/euHdO3g== X-Received: by 2002:a65:5083:: with SMTP id r3mr21706072pgp.231.1620106142718; Mon, 03 May 2021 22:29:02 -0700 (PDT) Received: from localhost.localdomain (80.251.214.228.16clouds.com. [80.251.214.228]) by smtp.gmail.com with ESMTPSA id 145sm5933229pfv.196.2021.05.03.22.29.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 May 2021 22:29:02 -0700 (PDT) From: Shawn Guo To: Stephen Boyd Cc: Bjorn Andersson , Rob Herring , Sivaprakash Murugesan , Benjamin Li , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Shawn Guo Subject: [PATCH 3/5] clk: qcom: apcs-msm8916: Retrieve clock name from DT Date: Tue, 4 May 2021 13:28:42 +0800 Message-Id: <20210504052844.21096-4-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210504052844.21096-1-shawn.guo@linaro.org> References: <20210504052844.21096-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Unlike MSM8916 which has only one APCS clock, MSM8939 gets three for Cluster0 (little cores), Cluster1 (big cores) and CCI (Cache Coherent Interconnect). Instead of hard coding APCS (and A53PLL) clock name, retrieve the name from DT, so that multiple APCS clocks can be registered. Signed-off-by: Shawn Guo --- drivers/clk/qcom/a53-pll.c | 5 ++++- drivers/clk/qcom/apcs-msm8916.c | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c index 8614b0b0e82c..964f5ab7d02f 100644 --- a/drivers/clk/qcom/a53-pll.c +++ b/drivers/clk/qcom/a53-pll.c @@ -42,6 +42,7 @@ static int qcom_a53pll_probe(struct platform_device *pdev) struct clk_pll *pll; void __iomem *base; struct clk_init_data init = { }; + const char *clk_name = NULL; int ret; pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL); @@ -66,7 +67,9 @@ static int qcom_a53pll_probe(struct platform_device *pdev) pll->status_bit = 16; pll->freq_tbl = a53pll_freq; - init.name = "a53pll"; + of_property_read_string(pdev->dev.of_node, "clock-output-names", + &clk_name); + init.name = clk_name ? clk_name : "a53pll"; init.parent_names = (const char *[]){ "xo" }; init.num_parents = 1; init.ops = &clk_pll_sr2_ops; diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c index d7ac6d6b15b6..b8bbfe9622e1 100644 --- a/drivers/clk/qcom/apcs-msm8916.c +++ b/drivers/clk/qcom/apcs-msm8916.c @@ -49,6 +49,7 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev) struct clk_regmap_mux_div *a53cc; struct regmap *regmap; struct clk_init_data init = { }; + const char *clk_name = NULL; int ret = -ENODEV; regmap = dev_get_regmap(parent, NULL); @@ -61,7 +62,9 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev) if (!a53cc) return -ENOMEM; - init.name = "a53mux"; + of_property_read_string(parent->of_node, "clock-output-names", + &clk_name); + init.name = clk_name ? clk_name : "a53mux"; init.parent_data = pdata; init.num_parents = ARRAY_SIZE(pdata); init.ops = &clk_regmap_mux_div_ops; From patchwork Tue May 4 05:28:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 431282 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DD3CC433B4 for ; Tue, 4 May 2021 05:29:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 64A5161186 for ; Tue, 4 May 2021 05:29:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229811AbhEDFaA (ORCPT ); Tue, 4 May 2021 01:30:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229802AbhEDFaA (ORCPT ); Tue, 4 May 2021 01:30:00 -0400 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34E0EC06174A for ; Mon, 3 May 2021 22:29:06 -0700 (PDT) Received: by mail-pf1-x42d.google.com with SMTP id b15so6305384pfl.4 for ; Mon, 03 May 2021 22:29:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RjDDEQHznq8kml6OFuSumxrNRPKtAVnBXfVZoTIOBJk=; b=edgEPWYjMfQl/NgTn+F1VvmFuUMWGV24gxVRojOLOPXRI+FlPOHqeNJk/nxxslIspB TJT0B4FJFt+m1zV05deFvgTn2PptV4eK+ipoUViTipPkBLXOVw7BU0iYqlOQ5vjQ0n/G O8L6u8vTTQIHh5GORy2FZtAGt6Y6JQT49QaOgCKiunlUSu13Y+id5bQJVs7YmGohvrBv uOdFcmOIlydzqv3O7kBgZ28ZqGdMPAsmuvURkRZRXTqN6mFbEwxp3aYiJHjS2wt/nnN7 brmHt2hnwcS4XkeFTGE8NJZ1GcpfY05IXCAIG2+3uKxHDbAqxT+I8TcLtpkQVfOp2+kn 3cwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RjDDEQHznq8kml6OFuSumxrNRPKtAVnBXfVZoTIOBJk=; b=R/vNtiC1QaKgTObGoqq00XIc+vJ0UhjYJuQUOLpHUSpzpCRj8RGfSPmITcGMBYGNAO l6SYKnIgYx0sWI1qwBrk7om8hfGvfjcIrRr1x5jtej1E+br9MrnBw10KKIv1BtJYLEcl nlJYkBdCL8OqW9+IX5k3X279nbzS/5l+/sQ5V0fgeM9gc/9zLMjmqSleZ9dYlk19PDN9 aUQtTXsq5EKtO9KZGyvvGdpKGWEBfL/PQ3F/a+566nsHSFl4pON00SJrWqLdSdVd128C Ey+DzdqjuwzgsJflx4eQ5fMF3LNBIKF1PY2f3h1nf17H51aBNKdpHo4h0U+Rsnt4YPCF Q9fg== X-Gm-Message-State: AOAM531W74mjqLWDdVHjouxz2fTybbw/wBY0RmhJQnh+ed2UhcgZjeSg pRgZaDhjHRu0tgLgYNL76+6CqA== X-Google-Smtp-Source: ABdhPJyQHi+h5z1UsGXu0JcsoQBIaP/LrwblVbl8irJnlRnS5Cqr67mEdBNahxnnd8zVmQvGXU+iLQ== X-Received: by 2002:a17:90b:4b45:: with SMTP id mi5mr3000570pjb.197.1620106145767; Mon, 03 May 2021 22:29:05 -0700 (PDT) Received: from localhost.localdomain (80.251.214.228.16clouds.com. [80.251.214.228]) by smtp.gmail.com with ESMTPSA id 145sm5933229pfv.196.2021.05.03.22.29.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 May 2021 22:29:05 -0700 (PDT) From: Shawn Guo To: Stephen Boyd Cc: Bjorn Andersson , Rob Herring , Sivaprakash Murugesan , Benjamin Li , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Shawn Guo Subject: [PATCH 4/5] clk: qcom: a53-pll: Pass freq_tbl via match data Date: Tue, 4 May 2021 13:28:43 +0800 Message-Id: <20210504052844.21096-5-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210504052844.21096-1-shawn.guo@linaro.org> References: <20210504052844.21096-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The frequency table is SoC specific. Instead of hard coding, pass it via match data, so that the driver can work for more than just MSM8916. This is a preparation change for adding MSM8939 A53PLL support. Signed-off-by: Shawn Guo --- drivers/clk/qcom/a53-pll.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c index 964f5ab7d02f..bfa048dc01ec 100644 --- a/drivers/clk/qcom/a53-pll.c +++ b/drivers/clk/qcom/a53-pll.c @@ -15,7 +15,7 @@ #include "clk-pll.h" #include "clk-regmap.h" -static const struct pll_freq_tbl a53pll_freq[] = { +static const struct pll_freq_tbl msm8916_freq[] = { { 998400000, 52, 0x0, 0x1, 0 }, { 1094400000, 57, 0x0, 0x1, 0 }, { 1152000000, 62, 0x0, 0x1, 0 }, @@ -43,8 +43,13 @@ static int qcom_a53pll_probe(struct platform_device *pdev) void __iomem *base; struct clk_init_data init = { }; const char *clk_name = NULL; + const struct pll_freq_tbl *freq_tbl; int ret; + freq_tbl = device_get_match_data(&pdev->dev); + if (!freq_tbl) + return -ENODEV; + pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL); if (!pll) return -ENOMEM; @@ -65,7 +70,7 @@ static int qcom_a53pll_probe(struct platform_device *pdev) pll->mode_reg = 0x00; pll->status_reg = 0x1c; pll->status_bit = 16; - pll->freq_tbl = a53pll_freq; + pll->freq_tbl = freq_tbl; of_property_read_string(pdev->dev.of_node, "clock-output-names", &clk_name); @@ -92,7 +97,7 @@ static int qcom_a53pll_probe(struct platform_device *pdev) } static const struct of_device_id qcom_a53pll_match_table[] = { - { .compatible = "qcom,msm8916-a53pll" }, + { .compatible = "qcom,msm8916-a53pll", .data = msm8916_freq }, { } }; From patchwork Tue May 4 05:28:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 430910 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D68EC43461 for ; Tue, 4 May 2021 05:29:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 50AD3613C0 for ; Tue, 4 May 2021 05:29:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229802AbhEDFaD (ORCPT ); Tue, 4 May 2021 01:30:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229816AbhEDFaD (ORCPT ); Tue, 4 May 2021 01:30:03 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A1CBC061574 for ; Mon, 3 May 2021 22:29:09 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id k19so3325916pfu.5 for ; Mon, 03 May 2021 22:29:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aNWYHyF10Ocv0rGRJlTBLbyA6sxWZ+weiafnUhBtEKk=; b=H16lLhHBiZ9W/Un4AkE6jMkWBw2frgqbf7Eg/+/OqK0hiBEKl4VgMUPRdXXJH1KIT/ p7N2P75kCYNBGS4+kG259a+H/Q207cyygXepskuVu/jHb7QXptY8Irnr3720q2qI8SE7 4SRPDC1HdmfAMkgO1QjxSrYDiqNXJGGHlgqFfepy3q8kdgNZgL8Tl38Fq7D0fdadyg4Z KVgGWxmNY1A6537b+G1tUHWUXGAziNpeDDwtq3InYmY4lCCKHFixy4Yp7ntqVoHw2WwB jU+5UkeFfwIwNKYVwyTH6T3UWJ3zIzizk8WW2LqRdHXpZg/8FJn1/NQlNsosF4KzDZzn LYYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aNWYHyF10Ocv0rGRJlTBLbyA6sxWZ+weiafnUhBtEKk=; b=GRdgXKkBkFtZiYdBgHOSzdMiCf2lIICrqZxmAspbOoBvg9J354wApDhLniNVB8hDy0 nnQ3Uc+ih/N84Z7ZgGl1gL5KmIywLFmdg90EpL2j9onetLsp2P72e4MR7UC7WrMgtGUB iNRyiBUJKjwJtMTDo0eaQI/BoENTWmKguDeulwdZn3clNtdVWWHBV+pn1jQ0Bz7QgFl0 r7qz5nOJa98aZdXxLdbUUCSpbyKFesMsdZdpfV84bPDtDMe9hWwx0hYu7Id6izVQ7qXv uYZFDJgio0Nw7pFKz+9LY7SGdrfQIstpg/rjR48Um+d1OmvzNnqjy39uujwIrFocpCkv oEZw== X-Gm-Message-State: AOAM533knETbAGVP604pXnNd0giTMyQsPe1U0vVjcmoVIOSm2mHXLGu3 E6FdEBkOIOvN090c0JOjDctV6w== X-Google-Smtp-Source: ABdhPJw6gk+A/ek8Ww3yAM10K+9EaBpiqvwqGmfhQYxlE90ziBHkIsISurjqFpCvB0me3kWn6Hj5vw== X-Received: by 2002:a05:6a00:138b:b029:27f:179f:2c20 with SMTP id t11-20020a056a00138bb029027f179f2c20mr21803788pfg.37.1620106148803; Mon, 03 May 2021 22:29:08 -0700 (PDT) Received: from localhost.localdomain (80.251.214.228.16clouds.com. [80.251.214.228]) by smtp.gmail.com with ESMTPSA id 145sm5933229pfv.196.2021.05.03.22.29.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 May 2021 22:29:08 -0700 (PDT) From: Shawn Guo To: Stephen Boyd Cc: Bjorn Andersson , Rob Herring , Sivaprakash Murugesan , Benjamin Li , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Shawn Guo Subject: [PATCH 5/5] clk: qcom: a53-pll: Add MSM8939 a53pll clocks Date: Tue, 4 May 2021 13:28:44 +0800 Message-Id: <20210504052844.21096-6-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210504052844.21096-1-shawn.guo@linaro.org> References: <20210504052844.21096-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It adds support for MSM8939 a53pll clock of Cluster0, Cluster1 and CCI (Cache Coherent Interconnect). The frequency data comes from vendor kernel. Signed-off-by: Shawn Guo --- drivers/clk/qcom/a53-pll.c | 42 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c index bfa048dc01ec..8c6f8bcc6128 100644 --- a/drivers/clk/qcom/a53-pll.c +++ b/drivers/clk/qcom/a53-pll.c @@ -26,6 +26,45 @@ static const struct pll_freq_tbl msm8916_freq[] = { { } }; +static const struct pll_freq_tbl msm8939_c0_freq[] = { + { 998400000, 52, 0x0, 0x1, 0 }, + { 1113600000, 58, 0x0, 0x1, 0 }, + { 1209600000, 63, 0x0, 0x1, 0 }, +}; + +static const struct pll_freq_tbl msm8939_c1_freq[] = { + { 652800000, 34, 0x0, 0x1, 0 }, + { 691200000, 36, 0x0, 0x1, 0 }, + { 729600000, 38, 0x0, 0x1, 0 }, + { 806400000, 42, 0x0, 0x1, 0 }, + { 844800000, 44, 0x0, 0x1, 0 }, + { 883200000, 46, 0x0, 0x1, 0 }, + { 960000000, 50, 0x0, 0x1, 0 }, + { 998400000, 52, 0x0, 0x1, 0 }, + { 1036800000, 54, 0x0, 0x1, 0 }, + { 1113600000, 58, 0x0, 0x1, 0 }, + { 1209600000, 63, 0x0, 0x1, 0 }, + { 1190400000, 62, 0x0, 0x1, 0 }, + { 1267200000, 66, 0x0, 0x1, 0 }, + { 1344000000, 70, 0x0, 0x1, 0 }, + { 1363200000, 71, 0x0, 0x1, 0 }, + { 1420800000, 74, 0x0, 0x1, 0 }, + { 1459200000, 76, 0x0, 0x1, 0 }, + { 1497600000, 78, 0x0, 0x1, 0 }, + { 1536000000, 80, 0x0, 0x1, 0 }, + { 1574400000, 82, 0x0, 0x1, 0 }, + { 1612800000, 84, 0x0, 0x1, 0 }, + { 1632000000, 85, 0x0, 0x1, 0 }, + { 1651200000, 86, 0x0, 0x1, 0 }, + { 1689600000, 88, 0x0, 0x1, 0 }, + { 1708800000, 89, 0x0, 0x1, 0 }, +}; + +static const struct pll_freq_tbl msm8939_cci_freq[] = { + { 403200000, 21, 0x0, 0x1, 0 }, + { 595200000, 31, 0x0, 0x1, 0 }, +}; + static const struct regmap_config a53pll_regmap_config = { .reg_bits = 32, .reg_stride = 4, @@ -98,6 +137,9 @@ static int qcom_a53pll_probe(struct platform_device *pdev) static const struct of_device_id qcom_a53pll_match_table[] = { { .compatible = "qcom,msm8916-a53pll", .data = msm8916_freq }, + { .compatible = "qcom,msm8939-a53pll-c0", .data = &msm8939_c0_freq }, + { .compatible = "qcom,msm8939-a53pll-c1", .data = &msm8939_c1_freq }, + { .compatible = "qcom,msm8939-a53pll-cci", .data = &msm8939_cci_freq }, { } };