From patchwork Tue May 11 18:07:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 434296 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35147C433ED for ; Tue, 11 May 2021 18:08:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1A31D617ED for ; Tue, 11 May 2021 18:08:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232034AbhEKSJT (ORCPT ); Tue, 11 May 2021 14:09:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232047AbhEKSJQ (ORCPT ); Tue, 11 May 2021 14:09:16 -0400 Received: from mail-qk1-x72f.google.com (mail-qk1-x72f.google.com [IPv6:2607:f8b0:4864:20::72f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1E4EC061574 for ; Tue, 11 May 2021 11:08:09 -0700 (PDT) Received: by mail-qk1-x72f.google.com with SMTP id 76so19667654qkn.13 for ; Tue, 11 May 2021 11:08:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MC52AvU8yTi/lCNA6BimEkKB2wKFkd/KekP+O2t6FxE=; b=Vdz8fvLuCohalVsPL1b+SjeaCADacEduuQntDk85lHx7xeA0WiEWGmwz+nVpIf4Ifs aYcNzBmg1200+8EYAvvPiPi2RIUfW5kwW+aSgfIEZIj4kdagjRQx4/sOpFU7W7voOdfN e987fvLTeKiIg4QumKnwFQQGPs/iBaMSgZx7v3z1EzMHgwu1jwzblEBuz0Fft+fJSdFg BivYC4HejhHRMtfMvPc3YTYYGNNgPoLXl/ONUSN0RjiMZPgBrPZKa7mRjFzLBgKOI/M9 YGsoy9xIOzxAsUROlX9kFq6RkkNfHYSfnmz6IorxjJfckwAV/5ndTD1hwMmTsvHSsSsK Ka5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MC52AvU8yTi/lCNA6BimEkKB2wKFkd/KekP+O2t6FxE=; b=Y06rVoVDLH1ep5dx/l1YiOTCTupAXUiD+mWYrDtdluD37jwgosmFAj1GPZLAcspO6E IuugZpnvR8f9kYIkNhdDwB3QZbptaB4dJb/0JOt1byC4sTCRQwJUbmal6PXNbKEweNHE RgmSoM0eLpcld84Y8rDQg+pTezuOc0L6al0wYepkIqYIFyqMFjWVD2e5YkQHtA+9Za+M cHyfS4G4Iv8So7O5qAzDBB1hrWsXtpY7nJvz6j0AJkL5ObbtdRiX7dKDzpt/3SfJGwtL YgkmfSC/Ee0KG3bl9KnvaV1n+QvQXGvP+mhy5n9MDW25Mo9wYRqeyNb+jZIyWUGDaex+ 4pTQ== X-Gm-Message-State: AOAM532PZBTI2qfOKI6vbWpsx/hC1JV83KGdXqTuAV9IKbni+13yX9Be gLfGb4i2sKJO0yNTMRoZNd3Le/98+RQQb6Nm X-Google-Smtp-Source: ABdhPJx+SOyMflZBYI28atocWsr1QztLmz98kXzxJdZ4S1QJROf1E3vSxNyUNTTcTcKop+KANu3nMA== X-Received: by 2002:a37:6714:: with SMTP id b20mr29012977qkc.289.1620756488973; Tue, 11 May 2021 11:08:08 -0700 (PDT) Received: from localhost.localdomain (modemcable068.184-131-66.mc.videotron.ca. [66.131.184.68]) by smtp.gmail.com with ESMTPSA id g5sm17104476qtm.2.2021.05.11.11.08.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 May 2021 11:08:08 -0700 (PDT) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: robert.foss@linaro.org, andrey.konovalov@linaro.org, Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , linux-media@vger.kernel.org (open list:QUALCOMM CAMERA SUBSYSTEM DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 02/17] media: camss: csiphy-3ph: disable interrupts Date: Tue, 11 May 2021 14:07:09 -0400 Message-Id: <20210511180728.23781-3-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210511180728.23781-1-jonathan@marek.ca> References: <20210511180728.23781-1-jonathan@marek.ca> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The driver does nothing with the interrupts, so set the irq mask registers to zero to avoid wasting CPU time for thing. Signed-off-by: Jonathan Marek Reviewed-by: Robert Foss --- .../qcom/camss/camss-csiphy-3ph-1-0.c | 35 ++----------------- 1 file changed, 3 insertions(+), 32 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index 5948abdcd220..783b65295d20 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -352,38 +352,9 @@ static void csiphy_lanes_enable(struct csiphy_device *csiphy, else if (csiphy->camss->version == CAMSS_845) csiphy_gen2_config_lanes(csiphy, settle_cnt); - val = 0xff; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(11)); - - val = 0xff; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(12)); - - val = 0xfb; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(13)); - - val = 0xff; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(14)); - - val = 0x7f; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(15)); - - val = 0xff; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(16)); - - val = 0xff; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(17)); - - val = 0xef; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(18)); - - val = 0xff; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(19)); - - val = 0xff; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(20)); - - val = 0xff; - writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(21)); + /* IRQ_MASK registers - disable all interrupts */ + for (i = 11; i < 22; i++) + writel_relaxed(0, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(i)); } static void csiphy_lanes_disable(struct csiphy_device *csiphy, From patchwork Tue May 11 18:07:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 434295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54367C43462 for ; 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[66.131.184.68]) by smtp.gmail.com with ESMTPSA id g5sm17104476qtm.2.2021.05.11.11.08.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 May 2021 11:08:12 -0700 (PDT) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: robert.foss@linaro.org, andrey.konovalov@linaro.org, Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , Hans Verkuil , linux-media@vger.kernel.org (open list:QUALCOMM CAMERA SUBSYSTEM DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 05/17] media: camss: csid-170: don't enable unused irqs Date: Tue, 11 May 2021 14:07:12 -0400 Message-Id: <20210511180728.23781-6-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210511180728.23781-1-jonathan@marek.ca> References: <20210511180728.23781-1-jonathan@marek.ca> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org csid_isr() only checks for the reset irq, so enabling any other irqs doesn't make sense. The "RDI irq" comment is also wrong, the register should be CSID_CSI2_RDIN_IRQ_MASK. Without this fix there may be an excessive amount of irqs. Fixes: eebe6d00e9bf ("media: camss: Add support for CSID hardware version Titan 170") Signed-off-by: Jonathan Marek Reviewed-by: Robert Foss --- drivers/media/platform/qcom/camss/camss-csid-170.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid-170.c b/drivers/media/platform/qcom/camss/camss-csid-170.c index a81cc94c075f..2bc695819919 100644 --- a/drivers/media/platform/qcom/camss/camss-csid-170.c +++ b/drivers/media/platform/qcom/camss/camss-csid-170.c @@ -443,12 +443,6 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable) val |= 1 << CSI2_RX_CFG1_MISR_EN; writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG1); // csi2_vc_mode_shift_val ? - /* error irqs start at BIT(11) */ - writel_relaxed(~0u, csid->base + CSID_CSI2_RX_IRQ_MASK); - - /* RDI irq */ - writel_relaxed(~0u, csid->base + CSID_TOP_IRQ_MASK); - val = 1 << RDI_CTRL_HALT_CMD; writel_relaxed(val, csid->base + CSID_RDI_CTRL(0)); } From patchwork Tue May 11 18:07:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 434294 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1646BC43611 for ; Tue, 11 May 2021 18:08:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E059B616ED for ; Tue, 11 May 2021 18:08:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232045AbhEKSJc (ORCPT ); Tue, 11 May 2021 14:09:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232091AbhEKSJW (ORCPT ); Tue, 11 May 2021 14:09:22 -0400 Received: from mail-qt1-x82b.google.com (mail-qt1-x82b.google.com [IPv6:2607:f8b0:4864:20::82b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1910BC061344 for ; Tue, 11 May 2021 11:08:15 -0700 (PDT) Received: by mail-qt1-x82b.google.com with SMTP id c11so15190435qth.2 for ; Tue, 11 May 2021 11:08:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6EnogKluwcsh/pR3Ugtb3jxsHv9fsBdtTnJcs6QGPPM=; b=pVyV8UMP2Zs3bVEPeaK/7xHyx5omdnupOpIzbyIBS6Lsg+Qed9iMuBEKWfVIhkog0l TKQIqo1dmbwKuXWyquUX53i3fNoGvKZk/ARVO8Kl5PZJyO3eDl6AUw01j/cFKWvUO5P/ cKbo1tnyubNp6VXR4r2i6aXyjIpg5tefG5rIQP7KGhlXvtQGI5y2Sy6qEwDJxiEFJTwO 7YZ9bKAPSXWvjy3rgjqQSQAzroHtf10jyJqWKX1IcyVvaDGcfLGgaMtTphCE5KH0zPI9 Enz7ShPwPsY0ki/+EdXn5xd/VbcQWYdN80t7nGtMrkjzd6GUSI+AGOV3z/HOgMsaqJqc PwFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6EnogKluwcsh/pR3Ugtb3jxsHv9fsBdtTnJcs6QGPPM=; b=NIW2o7V7qjMLCqRR99enRzKGX+9L0UXS+32tOe3MfVHjZIF96yoWuHFs/WkQjp3ssM /2EWP1JNIBNQZMrzEIpd3k1gZocSGwkfqTRvY3GsSF2H/LFejDl/HRH/sTHZHCHbhXrr k0lQ0XIVtpiUX7gEFTMS/O536SLEWootd6NAHpAZaXYiygNLSdJgO0WdwmvVqWms0f8p IoED/nMmdQlc9OnYw14WM+Fu4bghxpqri8jNDVYb8WIBBUpti1jFDIDPMOtbodNIqE5+ dR1cqcAoiGrLNw5l7j90/4fiHTj8k/Wu9e1GU89ZAOllyxfo9zAZmr5iPljdLgGZmOXj GLvg== X-Gm-Message-State: AOAM530HXSlFqkbHNvDkZqcXcVpP+OrfHCENXF0PW+Kxz8SA6mjNFGkU WZx15hPXmbRaUl720/kqCgbir66Mzx4j8N3l X-Google-Smtp-Source: ABdhPJzRLUC7xHdun6LiYTns4U8cKfjV4l3WBR2LIcG6eZSKDlCN3GYWA2ELbZ9EyaHWNeAISgZ/TA== X-Received: by 2002:ac8:7f53:: with SMTP id g19mr29280882qtk.249.1620756494059; Tue, 11 May 2021 11:08:14 -0700 (PDT) Received: from localhost.localdomain (modemcable068.184-131-66.mc.videotron.ca. [66.131.184.68]) by smtp.gmail.com with ESMTPSA id g5sm17104476qtm.2.2021.05.11.11.08.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 May 2021 11:08:13 -0700 (PDT) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: robert.foss@linaro.org, andrey.konovalov@linaro.org, Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , Hans Verkuil , linux-media@vger.kernel.org (open list:QUALCOMM CAMERA SUBSYSTEM DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 06/17] media: camss: csid-170: remove stray comment Date: Tue, 11 May 2021 14:07:13 -0400 Message-Id: <20210511180728.23781-7-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210511180728.23781-1-jonathan@marek.ca> References: <20210511180728.23781-1-jonathan@marek.ca> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This is a leftover from my original patches, it doesn't serve any purpose. (it was a reminder to figure out how downstream sets a particular field in the register). Fixes: eebe6d00e9bf ("media: camss: Add support for CSID hardware version Titan 170") Signed-off-by: Jonathan Marek Reviewed-by: Robert Foss --- drivers/media/platform/qcom/camss/camss-csid-170.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid-170.c b/drivers/media/platform/qcom/camss/camss-csid-170.c index 2bc695819919..3958bacd7b97 100644 --- a/drivers/media/platform/qcom/camss/camss-csid-170.c +++ b/drivers/media/platform/qcom/camss/camss-csid-170.c @@ -441,7 +441,7 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable) val = 1 << CSI2_RX_CFG1_PACKET_ECC_CORRECTION_EN; val |= 1 << CSI2_RX_CFG1_MISR_EN; - writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG1); // csi2_vc_mode_shift_val ? + writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG1); val = 1 << RDI_CTRL_HALT_CMD; writel_relaxed(val, csid->base + CSID_RDI_CTRL(0)); From patchwork Tue May 11 18:07:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 434293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7912C433ED for ; Tue, 11 May 2021 18:08:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B9C5F61919 for ; Tue, 11 May 2021 18:08:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232167AbhEKSJe (ORCPT ); Tue, 11 May 2021 14:09:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232119AbhEKSJ1 (ORCPT ); Tue, 11 May 2021 14:09:27 -0400 Received: from mail-qv1-xf2d.google.com (mail-qv1-xf2d.google.com [IPv6:2607:f8b0:4864:20::f2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B5BDC0613ED for ; Tue, 11 May 2021 11:08:16 -0700 (PDT) Received: by mail-qv1-xf2d.google.com with SMTP id u1so10640634qvg.11 for ; Tue, 11 May 2021 11:08:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UJPCudzb/Ou4GJ6RU5NgC6ZAZYELLNF2PjvvnraTbLs=; b=jOnMJrqZdmWyP0o57NUCpDxilR4xUtkwq7WWOW6jkBIyJpKJXpzcdDSHVUram4Fw2l R1tS10lyDQmNrTXBf0Ef+so2J9GOUYMuLI7TtWn+gCC/YPr8pjlWw+vaZu230sWpy5sM okitfqjHivB2xFoRsRZKQ4C4eXRXsuPzskeu1+VIVfPfnLZ8xqv9Yl5tWbdYa8eYOwlA cYOYFubxxgTbc6oIGZb3j6344nwr0L+lLXRp0oS401XIKDCKk3c+/mY0gONhzVc+JZm7 4vS7hNDGqDy2iXnR7RSUdSBsAkC3GyYIw5uGsgbMAh+4+zGTsJnqBXybMn/1eye0kzfs ZnHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UJPCudzb/Ou4GJ6RU5NgC6ZAZYELLNF2PjvvnraTbLs=; b=cGGm1RG9ZXAlHOi0y2auGDgGlxaUCgTsTiZWWY9G4p/JEQlkeCwpL0D+fNxwqorD4q Hey/blvPeP36kC/UyhSediph915h88oSdCahLIpDTf7PHoWtJ3QuHIAk8cOfLAlhMAp0 yQbYPcSvmeJPQyQWuyBlOIYZs+wK93ncaMKPXZaHoOCZzZAeJtnajpbZC7IJHGC7E7Or Ouikvhat8De8r+fl8VxGoOpBxgUAE7COe10ZJc8f1EyTaXoKiiypXUiZMzL/FK0OK1O9 7+LT7BsAUaWRCCgO9TV7xg8pQnQaKWg4qyMASNH7cUXuwLz+mvcdha1FpE5hmpIkwVC8 PO6w== X-Gm-Message-State: AOAM530F0GT7vDFE5hc42JbzlyME25WYVM+dQWX/WR0+le9KlrEsj60U eCESBd8lH9YXR7xCdK/GpZZWgF+CBJQonpoh X-Google-Smtp-Source: ABdhPJyt6UKeePHWiG6MVDsBLdK4vH8HRXo1wZJkRcNm+uOQADMV2j5NAOIHOn15+yCV/riECKHTYw== X-Received: by 2002:a0c:8521:: with SMTP id n30mr30551676qva.53.1620756495291; Tue, 11 May 2021 11:08:15 -0700 (PDT) Received: from localhost.localdomain (modemcable068.184-131-66.mc.videotron.ca. [66.131.184.68]) by smtp.gmail.com with ESMTPSA id g5sm17104476qtm.2.2021.05.11.11.08.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 May 2021 11:08:14 -0700 (PDT) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: robert.foss@linaro.org, andrey.konovalov@linaro.org, Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , linux-media@vger.kernel.org (open list:QUALCOMM CAMERA SUBSYSTEM DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 07/17] media: camss: csid-170: support more than one lite vfe Date: Tue, 11 May 2021 14:07:14 -0400 Message-Id: <20210511180728.23781-8-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210511180728.23781-1-jonathan@marek.ca> References: <20210511180728.23781-1-jonathan@marek.ca> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Change the IS_LITE condition so that it returns true for the second lite vfe found on titan 480 hardware (8250), which will have id == 3. Signed-off-by: Jonathan Marek Reviewed-by: Robert Foss --- drivers/media/platform/qcom/camss/camss-csid-170.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid-170.c b/drivers/media/platform/qcom/camss/camss-csid-170.c index 3958bacd7b97..af134ded241d 100644 --- a/drivers/media/platform/qcom/camss/camss-csid-170.c +++ b/drivers/media/platform/qcom/camss/camss-csid-170.c @@ -21,7 +21,7 @@ * interface support. As a result of that it has an * alternate register layout. */ -#define IS_LITE (csid->id == 2 ? 1 : 0) +#define IS_LITE (csid->id >= 2 ? 1 : 0) #define CSID_HW_VERSION 0x0 #define HW_VERSION_STEPPING 0 From patchwork Tue May 11 18:07:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 434291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E378C43462 for ; Tue, 11 May 2021 18:08:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D2BFF6190A for ; Tue, 11 May 2021 18:08:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232178AbhEKSJg (ORCPT ); Tue, 11 May 2021 14:09:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232117AbhEKSJ1 (ORCPT ); Tue, 11 May 2021 14:09:27 -0400 Received: from mail-qk1-x731.google.com (mail-qk1-x731.google.com [IPv6:2607:f8b0:4864:20::731]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1D2CC06138F for ; Tue, 11 May 2021 11:08:18 -0700 (PDT) Received: by mail-qk1-x731.google.com with SMTP id l129so19667850qke.8 for ; Tue, 11 May 2021 11:08:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1nauncHVfZ4iPve0AJPZMC4lIF+t0IxJHgwWKTrYrMM=; b=siDMUfadrZaiaKu+hssFdQTApaZbrseL2plfnZpnozqTzddVQ0OL7lyd+qcMGgnROq B+MFGmoqsmqlcApUk2QtnGTB0+I1vFzsW8jgQ0Jod9rpi5LlcL2NklGI31W0FGyCdHxx Touew0CWnkk6xO26J897akHpzh52YFfZnhJQytJ/G81mXTrRHgQmg4LRPsk95pxrJsx9 1u3FFU8NyvYp8Ylkclmu5H+GHAEXlaLWDka5tdzt7hT1oR6MxSHpOyOQ0ZjC4BIXWJk1 VGQMsjUiLUkfaM3q8Gl8TknK9tA6kdYzvU+sLaJtQLniOpKZeEUe62RQ+fXx9uS00iSQ ywlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1nauncHVfZ4iPve0AJPZMC4lIF+t0IxJHgwWKTrYrMM=; b=h88eb+j8MuFackUyULvU3xOlOXNV9QlmaU7F8VmPy2nKPgJHBM2dk4roDRd673GCM5 Bur1+h3N4FFg5o0SsMo07zhEnYyfYNObmeZiuXKWz9MioOx9yVbiSt37vUpS2OgnnhY1 EpxEA21dzS15OfWLjh1+thSMWnBDybWv38j3MNrbLsHtSXYLJPpxNa5TJQJ8BBG7bKcg NPmsJ+GzDIisZmFleeVeXgKmYITyMQC2hUWW/vPOn/g87vo3CAFwbzW4Hm5N2SMGmhGy on7fKNHNC83LOrSErTMcswPLizDZVwAr/YSKN+5S4aedAS/8MWBhtJspfRqsIDsJIO9Z Ak1A== X-Gm-Message-State: AOAM5312++rKsOIAfyu3whl4JvssGBIKtOqvb+sWoPiZUSKVLz53VXQX NrT8zmkM43x3kZvd9eY22McS9uo6yBpI1UMb X-Google-Smtp-Source: ABdhPJwOoMAE6+xdicickpMIH7oEhGovTMHZd8fZPkoF4HVwmnu0FvsWl4dtr5iaHjl8tM6cDWvCiw== X-Received: by 2002:a37:9206:: with SMTP id u6mr29852994qkd.7.1620756497888; Tue, 11 May 2021 11:08:17 -0700 (PDT) Received: from localhost.localdomain (modemcable068.184-131-66.mc.videotron.ca. [66.131.184.68]) by smtp.gmail.com with ESMTPSA id g5sm17104476qtm.2.2021.05.11.11.08.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 May 2021 11:08:17 -0700 (PDT) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: robert.foss@linaro.org, andrey.konovalov@linaro.org, Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , linux-media@vger.kernel.org (open list:QUALCOMM CAMERA SUBSYSTEM DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 09/17] media: camss: csid: allow csid to work without a regulator Date: Tue, 11 May 2021 14:07:16 -0400 Message-Id: <20210511180728.23781-10-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210511180728.23781-1-jonathan@marek.ca> References: <20210511180728.23781-1-jonathan@marek.ca> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org At least for titan HW, CSID don't have an associated regulator. This change is necessary to be able to model this in the CSID resources. Signed-off-by: Jonathan Marek Reviewed-by: Robert Foss --- drivers/media/platform/qcom/camss/camss-csid.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c index cc11fbfdae13..528674dea06c 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -162,7 +162,7 @@ static int csid_set_power(struct v4l2_subdev *sd, int on) return ret; } - ret = regulator_enable(csid->vdda); + ret = csid->vdda ? regulator_enable(csid->vdda) : 0; if (ret < 0) { pm_runtime_put_sync(dev); return ret; @@ -170,14 +170,16 @@ static int csid_set_power(struct v4l2_subdev *sd, int on) ret = csid_set_clock_rates(csid); if (ret < 0) { - regulator_disable(csid->vdda); + if (csid->vdda) + regulator_disable(csid->vdda); pm_runtime_put_sync(dev); return ret; } ret = camss_enable_clocks(csid->nclocks, csid->clock, dev); if (ret < 0) { - regulator_disable(csid->vdda); + if (csid->vdda) + regulator_disable(csid->vdda); pm_runtime_put_sync(dev); return ret; } @@ -188,7 +190,8 @@ static int csid_set_power(struct v4l2_subdev *sd, int on) if (ret < 0) { disable_irq(csid->irq); camss_disable_clocks(csid->nclocks, csid->clock); - regulator_disable(csid->vdda); + if (csid->vdda) + regulator_disable(csid->vdda); pm_runtime_put_sync(dev); return ret; } @@ -197,7 +200,7 @@ static int csid_set_power(struct v4l2_subdev *sd, int on) } else { disable_irq(csid->irq); camss_disable_clocks(csid->nclocks, csid->clock); - ret = regulator_disable(csid->vdda); + ret = csid->vdda ? regulator_disable(csid->vdda) : 0; pm_runtime_put_sync(dev); } @@ -634,7 +637,9 @@ int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid, /* Regulator */ - csid->vdda = devm_regulator_get(dev, res->regulator[0]); + csid->vdda = NULL; + if (res->regulator[0]) + csid->vdda = devm_regulator_get(dev, res->regulator[0]); if (IS_ERR(csid->vdda)) { dev_err(dev, "could not get regulator\n"); return PTR_ERR(csid->vdda); From patchwork Tue May 11 18:07:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 434292 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECB36C43600 for ; Tue, 11 May 2021 18:08:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D334F616ED for ; Tue, 11 May 2021 18:08:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232176AbhEKSJg (ORCPT ); Tue, 11 May 2021 14:09:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42328 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232137AbhEKSJ3 (ORCPT ); Tue, 11 May 2021 14:09:29 -0400 Received: from mail-qv1-xf2b.google.com (mail-qv1-xf2b.google.com [IPv6:2607:f8b0:4864:20::f2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 77585C06134A for ; Tue, 11 May 2021 11:08:21 -0700 (PDT) Received: by mail-qv1-xf2b.google.com with SMTP id q6so10668557qvb.2 for ; Tue, 11 May 2021 11:08:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FD0gWPQzpyGXYTVYXXLZlZGqHRAYEmqEcialH8BA1kM=; b=ipY1sUpXHg/6ychnBzi8TsrIamFP0VKSDUPcYNfaIPaq5irONguSaL9QafuAkrT5Yv hctC3e89mMfK9styMgml8FF09t/pyf19r4IKGudA2i6fgFH8+B+s8BktU1zXgEzc6dcF rMRzxq73M7oO/4212S92D2XLNHwcYrXPzG/4cJvd7v2AfzmcTopy5yEI3AExpUJDjEcA jOO4gIjYprBKmtH6BJQ1WFiZNsRrdzv6WJmFNyMBe+7VlrH+UN0R0pSYd8qQ3KDL8lEE 1syKJCm8XBlr6u64jNcyju5ZqFye1LqT18O90xRMQWpQxch8sdttLC0Rn/zfaGR3m9hv LceQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FD0gWPQzpyGXYTVYXXLZlZGqHRAYEmqEcialH8BA1kM=; b=oMLNPmucBXtOXCGmStaAPmTNYUMhyUnBiXH8h+qwD9UP37+PecbbHJw8dYRrAp5ip8 Bunezp6GBmJO3KhwnOlk2Lml9bBN37Ok5sOVvm0oxPoyGJtZg5Ux4/Dw7RsPgOY4PfPC V3pPYIQlp2gFYXkHtI5ukSHKq2nGdE5mGKQ1JUyPaZBmHw5GYcvSzlJUgMx4uB8bQj9c w6gnyq3oh6gj/k880ftPKYbSNU3lAs1I7edCg9NPqUrre7rBApb3Ho7Yr3A2UoaUEnrw a+8hob0SWg8RA8qTEv0lvVQFUqNgiBGKcA7GoJAGY1YY5W7QJ+c/nxFmABBajoCrpr7H vkcw== X-Gm-Message-State: AOAM533Zc/ClgDO8RCvvTxoHzZFnD5y8nYinAQq5sDvYiPHkWF8Qij4M qpsPVUq/YRk6WcOnAEfqR2zWJ3fAsGpsSwr8 X-Google-Smtp-Source: ABdhPJzdYwdRh+8ZBp7ScB6or2LzcgmtjVEbMcPqPokjkXgb2+SlddqnAv8ph878cKbTweRMTNHULg== X-Received: by 2002:ad4:4aa4:: with SMTP id i4mr30878220qvx.29.1620756500321; Tue, 11 May 2021 11:08:20 -0700 (PDT) Received: from localhost.localdomain (modemcable068.184-131-66.mc.videotron.ca. [66.131.184.68]) by smtp.gmail.com with ESMTPSA id g5sm17104476qtm.2.2021.05.11.11.08.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 May 2021 11:08:20 -0700 (PDT) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: robert.foss@linaro.org, andrey.konovalov@linaro.org, Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , linux-media@vger.kernel.org (open list:QUALCOMM CAMERA SUBSYSTEM DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 11/17] media: camss: fix VFE irq name Date: Tue, 11 May 2021 14:07:18 -0400 Message-Id: <20210511180728.23781-12-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210511180728.23781-1-jonathan@marek.ca> References: <20210511180728.23781-1-jonathan@marek.ca> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org vfe->id isn't set yet, so use "id" instead here. Signed-off-by: Jonathan Marek Reviewed-by: Robert Foss --- drivers/media/platform/qcom/camss/camss-vfe.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index 15695fd466c4..dec89079c6ae 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -1290,7 +1290,6 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe, case CAMSS_660: vfe->ops = &vfe_ops_4_8; break; - case CAMSS_845: vfe->ops = &vfe_ops_170; break; @@ -1319,7 +1318,7 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe, vfe->irq = r->start; snprintf(vfe->irq_name, sizeof(vfe->irq_name), "%s_%s%d", - dev_name(dev), MSM_VFE_NAME, vfe->id); + dev_name(dev), MSM_VFE_NAME, id); ret = devm_request_irq(dev, vfe->irq, vfe->ops->isr, IRQF_TRIGGER_RISING, vfe->irq_name, vfe); if (ret < 0) { From patchwork Tue May 11 18:07:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 434290 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7281C433ED for ; Tue, 11 May 2021 18:08:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9222861628 for ; Tue, 11 May 2021 18:08:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232248AbhEKSJs (ORCPT ); Tue, 11 May 2021 14:09:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232156AbhEKSJd (ORCPT ); Tue, 11 May 2021 14:09:33 -0400 Received: from mail-qt1-x82d.google.com (mail-qt1-x82d.google.com [IPv6:2607:f8b0:4864:20::82d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E8E5C061761 for ; Tue, 11 May 2021 11:08:26 -0700 (PDT) Received: by mail-qt1-x82d.google.com with SMTP id c10so5462497qtx.10 for ; Tue, 11 May 2021 11:08:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a/ULh0uPpqMqWecZI3iTGlMZ20kOAH3aPs4Ru/GZgc0=; b=xv+XhcWtaWkDETP0kuVHZ1Kfv55/RntLa6YOo0VC6nHOGPtJHkE9Qik5NH7hAgNeVr y3FR05p9I9UIx03YQa6NtFPK+D3kLHGBYcoID/3+yy5W8RXDi2Kc4z16GTl2SbBSji5n Wi8aTq47h5BNP7MRugysyXenofjB/DvrkB07aOFJ3IcgM/P+mU+m++PXeC/CnwyV5Szd CGAcB4hNCQpo8Cj7fiAaaYyXU7ZPmQqAEcF/edL9DKKxDfuo/6y9hjZEbCl4qiIn1nSC mBMA7nvf6RUFnOxbXSvcn6e9EE1VzeTMLHKMZ3NovrnNGiDameS+7TmCYCAf+3YflJEm gfjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a/ULh0uPpqMqWecZI3iTGlMZ20kOAH3aPs4Ru/GZgc0=; b=fFnErpAuPKONGP7rtXZML4ZYyRUlKztNQ/6rnTBtWp0XRzftdRtSK7k6EVOAStBjmR /pHS53HJnLx4xrIAtRHs2MVtGB4igYzSgeUGGYd+SFGQcvksUo7MDn9hA/hcrpsmfoGV l7YBbB24xSOjMRluCFtZBQuNV779P5REfC/DudjzzQXozWP0E4B1RzdWa/tJ0VFwthIZ G5oxWSbTfk+k1exYqNAQNnIwS6SMnNGjfRs7aIRk66hQcCQqVYc4nuEiChH8zGGU6/v/ 2fwGKuNal+6RCaeyCNu7fYD0bEis72a0+GbEmHOGnwDVbLX49R+8M5y61qaK6LCqZKsq sQvw== X-Gm-Message-State: AOAM53152kSC0GLyQsWRD4GLxsKG5FnM6UhJMGy/Qg45mq7GebvZvWD1 RGWdDGhhVra+fBiXpm3MViU840xfhpeWbUAd X-Google-Smtp-Source: ABdhPJzXiufGxPFfK6aJgwGgLpGuqw1+1/2zN4AZH825VTgGVRrIxCEDQrDTvgBAwU/CD+Eihpi8iQ== X-Received: by 2002:a05:622a:170b:: with SMTP id h11mr14020410qtk.330.1620756504919; Tue, 11 May 2021 11:08:24 -0700 (PDT) Received: from localhost.localdomain (modemcable068.184-131-66.mc.videotron.ca. [66.131.184.68]) by smtp.gmail.com with ESMTPSA id g5sm17104476qtm.2.2021.05.11.11.08.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 May 2021 11:08:24 -0700 (PDT) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: robert.foss@linaro.org, andrey.konovalov@linaro.org, Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , linux-kernel@vger.kernel.org (open list), linux-media@vger.kernel.org (open list:QUALCOMM CAMERA SUBSYSTEM DRIVER) Subject: [PATCH 14/17] media: camss: Add initial support for VFE hardware version Titan 480 Date: Tue, 11 May 2021 14:07:21 -0400 Message-Id: <20210511180728.23781-15-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210511180728.23781-1-jonathan@marek.ca> References: <20210511180728.23781-1-jonathan@marek.ca> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for VFE found on SM8250 (Titan 480). This implementation is based on the titan 170 implementation. It supports the normal and lite VFE, and only supports the RDI0 capture path. Signed-off-by: Jonathan Marek --- drivers/media/platform/qcom/camss/Makefile | 1 + .../media/platform/qcom/camss/camss-vfe-480.c | 554 ++++++++++++++++++ drivers/media/platform/qcom/camss/camss-vfe.h | 1 + 3 files changed, 556 insertions(+) create mode 100644 drivers/media/platform/qcom/camss/camss-vfe-480.c diff --git a/drivers/media/platform/qcom/camss/Makefile b/drivers/media/platform/qcom/camss/Makefile index 0752c46ea37b..81dd56aff0f2 100644 --- a/drivers/media/platform/qcom/camss/Makefile +++ b/drivers/media/platform/qcom/camss/Makefile @@ -15,6 +15,7 @@ qcom-camss-objs += \ camss-vfe-4-7.o \ camss-vfe-4-8.o \ camss-vfe-170.o \ + camss-vfe-480.o \ camss-vfe-gen1.o \ camss-vfe.o \ camss-video.o \ diff --git a/drivers/media/platform/qcom/camss/camss-vfe-480.c b/drivers/media/platform/qcom/camss/camss-vfe-480.c new file mode 100644 index 000000000000..79210fabbc2a --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-480.c @@ -0,0 +1,554 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * camss-vfe-480.c + * + * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module v480 (SM8250) + * + * Copyright (C) 2020-2021 Linaro Ltd. + * Copyright (C) 2021 Jonathan Marek + */ + +#include +#include +#include +#include + +#include "camss.h" +#include "camss-vfe.h" + +/* VFE 2/3 are lite and have a different register layout */ +#define IS_LITE (vfe->id >= 2 ? 1 : 0) + +#define VFE_HW_VERSION (0x00) + +#define VFE_GLOBAL_RESET_CMD (IS_LITE ? 0x0c : 0x1c) +#define GLOBAL_RESET_HW_AND_REG (IS_LITE ? BIT(1) : BIT(0)) + +#define VFE_REG_UPDATE_CMD (IS_LITE ? 0x20 : 0x34) +#define REG_UPDATE_RDI(n) (IS_LITE ? BIT(n) : BIT(1 + (n))) +#define VFE_IRQ_CMD (IS_LITE ? 0x24 : 0x38) +#define IRQ_CMD_GLOBAL_CLEAR BIT(0) + +#define VFE_IRQ_MASK(n) ((IS_LITE ? 0x28 : 0x3c) + (n) * 4) +#define IRQ_MASK_0_RESET_ACK (IS_LITE ? BIT(17) : BIT(0)) +#define IRQ_MASK_0_BUS_TOP_IRQ (IS_LITE ? BIT(4) : BIT(7)) +#define VFE_IRQ_CLEAR(n) ((IS_LITE ? 0x34 : 0x48) + (n) * 4) +#define VFE_IRQ_STATUS(n) ((IS_LITE ? 0x40 : 0x54) + (n) * 4) + +#define BUS_REG_BASE (IS_LITE ? 0x1a00 : 0xaa00) + +#define VFE_BUS_WM_CGC_OVERRIDE (BUS_REG_BASE + 0x08) +#define WM_CGC_OVERRIDE_ALL (0x3FFFFFF) + +#define VFE_BUS_WM_TEST_BUS_CTRL (BUS_REG_BASE + 0xdc) + +#define VFE_BUS_IRQ_MASK(n) (BUS_REG_BASE + 0x18 + (n) * 4) +#define BUS_IRQ_MASK_0_RDI_RUP(n) (IS_LITE ? BIT(n) : BIT(3 + (n))) +#define BUS_IRQ_MASK_0_COMP_DONE(n) (IS_LITE ? BIT(4 + (n)) : BIT(6 + (n))) +#define VFE_BUS_IRQ_CLEAR(n) (BUS_REG_BASE + 0x20 + (n) * 4) +#define VFE_BUS_IRQ_STATUS(n) (BUS_REG_BASE + 0x28 + (n) * 4) +#define VFE_BUS_IRQ_CLEAR_GLOBAL (BUS_REG_BASE + 0x30) + +#define VFE_BUS_WM_CFG(n) (BUS_REG_BASE + 0x200 + (n) * 0x100) +#define WM_CFG_EN (0) +#define WM_CFG_MODE (16) +#define MODE_QCOM_PLAIN (0) +#define MODE_MIPI_RAW (1) +#define VFE_BUS_WM_IMAGE_ADDR(n) (BUS_REG_BASE + 0x204 + (n) * 0x100) +#define VFE_BUS_WM_FRAME_INCR(n) (BUS_REG_BASE + 0x208 + (n) * 0x100) +#define VFE_BUS_WM_IMAGE_CFG_0(n) (BUS_REG_BASE + 0x20c + (n) * 0x100) +#define WM_IMAGE_CFG_0_DEFAULT_WIDTH (0xFFFF) +#define VFE_BUS_WM_IMAGE_CFG_1(n) (BUS_REG_BASE + 0x210 + (n) * 0x100) +#define VFE_BUS_WM_IMAGE_CFG_2(n) (BUS_REG_BASE + 0x214 + (n) * 0x100) +#define VFE_BUS_WM_PACKER_CFG(n) (BUS_REG_BASE + 0x218 + (n) * 0x100) +#define VFE_BUS_WM_HEADER_ADDR(n) (BUS_REG_BASE + 0x220 + (n) * 0x100) +#define VFE_BUS_WM_HEADER_INCR(n) (BUS_REG_BASE + 0x224 + (n) * 0x100) +#define VFE_BUS_WM_HEADER_CFG(n) (BUS_REG_BASE + 0x228 + (n) * 0x100) + +#define VFE_BUS_WM_IRQ_SUBSAMPLE_PERIOD(n) (BUS_REG_BASE + 0x230 + (n) * 0x100) +#define VFE_BUS_WM_IRQ_SUBSAMPLE_PATTERN(n) (BUS_REG_BASE + 0x234 + (n) * 0x100) +#define VFE_BUS_WM_FRAMEDROP_PERIOD(n) (BUS_REG_BASE + 0x238 + (n) * 0x100) +#define VFE_BUS_WM_FRAMEDROP_PATTERN(n) (BUS_REG_BASE + 0x23c + (n) * 0x100) + +#define VFE_BUS_WM_SYSTEM_CACHE_CFG(n) (BUS_REG_BASE + 0x260 + (n) * 0x100) +#define VFE_BUS_WM_BURST_LIMIT(n) (BUS_REG_BASE + 0x264 + (n) * 0x100) + +/* for titan 480, each bus client is hardcoded to a specific path + * and each bus client is part of a hardcoded "comp group" + */ +#define RDI_WM(n) ((IS_LITE ? 0 : 23) + n) +#define RDI_COMP_GROUP(n) ((IS_LITE ? 0 : 11) + n) + +static void vfe_hw_version_read(struct vfe_device *vfe, struct device *dev) +{ + u32 hw_version = readl_relaxed(vfe->base + VFE_HW_VERSION); + + u32 gen = (hw_version >> 28) & 0xF; + u32 rev = (hw_version >> 16) & 0xFFF; + u32 step = hw_version & 0xFFFF; + + dev_dbg(dev, "VFE HW Version = %u.%u.%u\n", gen, rev, step); +} + +static void vfe_global_reset(struct vfe_device *vfe) +{ + writel_relaxed(IRQ_MASK_0_RESET_ACK, vfe->base + VFE_IRQ_MASK(0)); + writel_relaxed(GLOBAL_RESET_HW_AND_REG, vfe->base + VFE_GLOBAL_RESET_CMD); +} + +static void vfe_wm_start(struct vfe_device *vfe, u8 wm, struct vfe_line *line) +{ + struct v4l2_pix_format_mplane *pix = + &line->video_out.active_fmt.fmt.pix_mp; + + wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */ + + /* no clock gating at bus input */ + writel_relaxed(WM_CGC_OVERRIDE_ALL, vfe->base + VFE_BUS_WM_CGC_OVERRIDE); + + writel_relaxed(0x0, vfe->base + VFE_BUS_WM_TEST_BUS_CTRL); + + writel_relaxed(pix->plane_fmt[0].bytesperline * pix->height, + vfe->base + VFE_BUS_WM_FRAME_INCR(wm)); + writel_relaxed(0xf, vfe->base + VFE_BUS_WM_BURST_LIMIT(wm)); + writel_relaxed(WM_IMAGE_CFG_0_DEFAULT_WIDTH, + vfe->base + VFE_BUS_WM_IMAGE_CFG_0(wm)); + writel_relaxed(pix->plane_fmt[0].bytesperline, + vfe->base + VFE_BUS_WM_IMAGE_CFG_2(wm)); + writel_relaxed(0, vfe->base + VFE_BUS_WM_PACKER_CFG(wm)); + + /* no dropped frames, one irq per frame */ + writel_relaxed(0, vfe->base + VFE_BUS_WM_FRAMEDROP_PERIOD(wm)); + writel_relaxed(1, vfe->base + VFE_BUS_WM_FRAMEDROP_PATTERN(wm)); + writel_relaxed(0, vfe->base + VFE_BUS_WM_IRQ_SUBSAMPLE_PERIOD(wm)); + writel_relaxed(1, vfe->base + VFE_BUS_WM_IRQ_SUBSAMPLE_PATTERN(wm)); + + writel_relaxed(1 << WM_CFG_EN | MODE_MIPI_RAW << WM_CFG_MODE, + vfe->base + VFE_BUS_WM_CFG(wm)); +} + +static void vfe_wm_stop(struct vfe_device *vfe, u8 wm) +{ + wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */ + writel_relaxed(0, vfe->base + VFE_BUS_WM_CFG(wm)); +} + +static void vfe_wm_update(struct vfe_device *vfe, u8 wm, u32 addr, + struct vfe_line *line) +{ + wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */ + writel_relaxed(addr, vfe->base + VFE_BUS_WM_IMAGE_ADDR(wm)); +} + +static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) +{ + vfe->reg_update |= REG_UPDATE_RDI(line_id); + writel_relaxed(vfe->reg_update, vfe->base + VFE_REG_UPDATE_CMD); +} + +static inline void vfe_reg_update_clear(struct vfe_device *vfe, + enum vfe_line_id line_id) +{ + vfe->reg_update &= ~REG_UPDATE_RDI(line_id); +} + +static void vfe_enable_irq_common(struct vfe_device *vfe) +{ + /* enable only the IRQs used: rup and comp_done irqs for RDI0 */ + writel_relaxed(IRQ_MASK_0_RESET_ACK | IRQ_MASK_0_BUS_TOP_IRQ, + vfe->base + VFE_IRQ_MASK(0)); + writel_relaxed(BUS_IRQ_MASK_0_RDI_RUP(0) | + BUS_IRQ_MASK_0_COMP_DONE(RDI_COMP_GROUP(0)), + vfe->base + VFE_BUS_IRQ_MASK(0)); +} + +/* + * vfe_isr - VFE module interrupt handler + * @irq: Interrupt line + * @dev: VFE device + * + * Return IRQ_HANDLED on success + */ +static irqreturn_t vfe_isr(int irq, void *dev) +{ + struct vfe_device *vfe = dev; + u32 status; + + status = readl_relaxed(vfe->base + VFE_IRQ_STATUS(0)); + writel_relaxed(status, vfe->base + VFE_IRQ_CLEAR(0)); + writel_relaxed(IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_IRQ_CMD); + + if (status & IRQ_MASK_0_RESET_ACK) + vfe->isr_ops.reset_ack(vfe); + + if (status & IRQ_MASK_0_BUS_TOP_IRQ) { + u32 status = readl_relaxed(vfe->base + VFE_BUS_IRQ_STATUS(0)); + writel_relaxed(status, vfe->base + VFE_BUS_IRQ_CLEAR(0)); + writel_relaxed(1, vfe->base + VFE_BUS_IRQ_CLEAR_GLOBAL); + + if (status & BUS_IRQ_MASK_0_RDI_RUP(0)) + vfe->isr_ops.reg_update(vfe, 0); + + if (status & BUS_IRQ_MASK_0_COMP_DONE(RDI_COMP_GROUP(0))) + vfe->isr_ops.wm_done(vfe, 0); + } + + return IRQ_HANDLED; +} + +/* + * vfe_halt - Trigger halt on VFE module and wait to complete + * @vfe: VFE device + * + * Return 0 on success or a negative error code otherwise + */ +static int vfe_halt(struct vfe_device *vfe) +{ + /* rely on vfe_disable_output() to stop the VFE */ + return 0; +} + +static int vfe_get_output(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output; + unsigned long flags; + int wm_idx; + + spin_lock_irqsave(&vfe->output_lock, flags); + + output = &line->output; + if (output->state != VFE_OUTPUT_OFF) { + dev_err(vfe->camss->dev, "Output is running\n"); + goto error; + } + + output->wm_num = 1; + + wm_idx = vfe_reserve_wm(vfe, line->id); + if (wm_idx < 0) { + dev_err(vfe->camss->dev, "Can not reserve wm\n"); + goto error_get_wm; + } + output->wm_idx[0] = wm_idx; + + output->drop_update_idx = 0; + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; + +error_get_wm: + vfe_release_wm(vfe, output->wm_idx[0]); + output->state = VFE_OUTPUT_OFF; +error: + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return -EINVAL; +} + +static int vfe_enable_output(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output = &line->output; + const struct vfe_hw_ops *ops = vfe->ops; + unsigned long flags; + unsigned int i; + + spin_lock_irqsave(&vfe->output_lock, flags); + + ops->reg_update_clear(vfe, line->id); + + if (output->state != VFE_OUTPUT_OFF) { + dev_err(vfe->camss->dev, "Output is not in reserved state %d\n", + output->state); + spin_unlock_irqrestore(&vfe->output_lock, flags); + return -EINVAL; + } + + WARN_ON(output->gen2.active_num); + + output->state = VFE_OUTPUT_ON; + + output->sequence = 0; + output->wait_reg_update = 0; + reinit_completion(&output->reg_update); + + vfe_wm_start(vfe, output->wm_idx[0], line); + + for (i = 0; i < 2; i++) { + output->buf[i] = vfe_buf_get_pending(output); + if (!output->buf[i]) + break; + output->gen2.active_num++; + vfe_wm_update(vfe, output->wm_idx[0], output->buf[i]->addr[0], line); + } + + ops->reg_update(vfe, line->id); + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; +} + +static int vfe_disable_output(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output = &line->output; + unsigned long flags; + unsigned int i; + bool done; + int timeout = 0; + + do { + spin_lock_irqsave(&vfe->output_lock, flags); + done = !output->gen2.active_num; + spin_unlock_irqrestore(&vfe->output_lock, flags); + usleep_range(10000, 20000); + + if (timeout++ == 100) { + dev_err(vfe->camss->dev, "VFE idle timeout - resetting\n"); + vfe_reset(vfe); + output->gen2.active_num = 0; + return 0; + } + } while (!done); + + spin_lock_irqsave(&vfe->output_lock, flags); + for (i = 0; i < output->wm_num; i++) + vfe_wm_stop(vfe, output->wm_idx[i]); + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; +} + +/* + * vfe_enable - Enable streaming on VFE line + * @line: VFE line + * + * Return 0 on success or a negative error code otherwise + */ +static int vfe_enable(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + int ret; + + mutex_lock(&vfe->stream_lock); + + if (!vfe->stream_count) + vfe_enable_irq_common(vfe); + + vfe->stream_count++; + + mutex_unlock(&vfe->stream_lock); + + ret = vfe_get_output(line); + if (ret < 0) + goto error_get_output; + + ret = vfe_enable_output(line); + if (ret < 0) + goto error_enable_output; + + vfe->was_streaming = 1; + + return 0; + +error_enable_output: + vfe_put_output(line); + +error_get_output: + mutex_lock(&vfe->stream_lock); + + vfe->stream_count--; + + mutex_unlock(&vfe->stream_lock); + + return ret; +} + +/* + * vfe_disable - Disable streaming on VFE line + * @line: VFE line + * + * Return 0 on success or a negative error code otherwise + */ +static int vfe_disable(struct vfe_line *line) +{ + struct vfe_device *vfe = to_vfe(line); + + vfe_disable_output(line); + + vfe_put_output(line); + + mutex_lock(&vfe->stream_lock); + + vfe->stream_count--; + + mutex_unlock(&vfe->stream_lock); + + return 0; +} + +/* + * vfe_isr_reg_update - Process reg update interrupt + * @vfe: VFE Device + * @line_id: VFE line + */ +static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) +{ + struct vfe_output *output; + unsigned long flags; + + spin_lock_irqsave(&vfe->output_lock, flags); + vfe->ops->reg_update_clear(vfe, line_id); + + output = &vfe->line[line_id].output; + + if (output->wait_reg_update) { + output->wait_reg_update = 0; + complete(&output->reg_update); + } + + spin_unlock_irqrestore(&vfe->output_lock, flags); +} + +/* + * vfe_isr_wm_done - Process write master done interrupt + * @vfe: VFE Device + * @wm: Write master id + */ +static void vfe_isr_wm_done(struct vfe_device *vfe, u8 wm) +{ + struct vfe_line *line = &vfe->line[vfe->wm_output_map[wm]]; + struct camss_buffer *ready_buf; + struct vfe_output *output; + unsigned long flags; + u32 index; + u64 ts = ktime_get_ns(); + + spin_lock_irqsave(&vfe->output_lock, flags); + + if (vfe->wm_output_map[wm] == VFE_LINE_NONE) { + dev_err_ratelimited(vfe->camss->dev, + "Received wm done for unmapped index\n"); + goto out_unlock; + } + output = &vfe->line[vfe->wm_output_map[wm]].output; + + ready_buf = output->buf[0]; + if (!ready_buf) { + dev_err_ratelimited(vfe->camss->dev, + "Missing ready buf %d!\n", output->state); + goto out_unlock; + } + + ready_buf->vb.vb2_buf.timestamp = ts; + ready_buf->vb.sequence = output->sequence++; + + index = 0; + output->buf[0] = output->buf[1]; + if (output->buf[0]) + index = 1; + + output->buf[index] = vfe_buf_get_pending(output); + + if (output->buf[index]) + vfe_wm_update(vfe, output->wm_idx[0], output->buf[index]->addr[0], line); + else + output->gen2.active_num--; + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + vb2_buffer_done(&ready_buf->vb.vb2_buf, VB2_BUF_STATE_DONE); + + return; + +out_unlock: + spin_unlock_irqrestore(&vfe->output_lock, flags); +} + +/* + * vfe_pm_domain_off - Disable power domains specific to this VFE. + * @vfe: VFE Device + */ +static void vfe_pm_domain_off(struct vfe_device *vfe) +{ + /* nop */ +} + +/* + * vfe_pm_domain_on - Enable power domains specific to this VFE. + * @vfe: VFE Device + */ +static int vfe_pm_domain_on(struct vfe_device *vfe) +{ + return 0; +} + +/* + * vfe_queue_buffer - Add empty buffer + * @vid: Video device structure + * @buf: Buffer to be enqueued + * + * Add an empty buffer - depending on the current number of buffers it will be + * put in pending buffer queue or directly given to the hardware to be filled. + * + * Return 0 on success or a negative error code otherwise + */ +static int vfe_queue_buffer(struct camss_video *vid, + struct camss_buffer *buf) +{ + struct vfe_line *line = container_of(vid, struct vfe_line, video_out); + struct vfe_device *vfe = to_vfe(line); + struct vfe_output *output; + unsigned long flags; + + output = &line->output; + + spin_lock_irqsave(&vfe->output_lock, flags); + + if (output->state == VFE_OUTPUT_ON && output->gen2.active_num < 2) { + output->buf[output->gen2.active_num++] = buf; + vfe_wm_update(vfe, output->wm_idx[0], buf->addr[0], line); + } else { + vfe_buf_add_pending(output, buf); + } + + spin_unlock_irqrestore(&vfe->output_lock, flags); + + return 0; +} + +static const struct vfe_isr_ops vfe_isr_ops_480 = { + .reset_ack = vfe_isr_reset_ack, + .reg_update = vfe_isr_reg_update, + .comp_done = vfe_isr_comp_done, + .wm_done = vfe_isr_wm_done, +}; + +static const struct camss_video_ops vfe_video_ops_480 = { + .queue_buffer = vfe_queue_buffer, + .flush_buffers = vfe_flush_buffers, +}; + +static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) +{ + vfe->isr_ops = vfe_isr_ops_480; + vfe->video_ops = vfe_video_ops_480; + vfe->line_num = 1; +} + +const struct vfe_hw_ops vfe_ops_480 = { + .global_reset = vfe_global_reset, + .hw_version_read = vfe_hw_version_read, + .isr = vfe_isr, + .pm_domain_off = vfe_pm_domain_off, + .pm_domain_on = vfe_pm_domain_on, + .reg_update_clear = vfe_reg_update_clear, + .reg_update = vfe_reg_update, + .subdev_init = vfe_subdev_init, + .vfe_disable = vfe_disable, + .vfe_enable = vfe_enable, + .vfe_halt = vfe_halt, +}; diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/platform/qcom/camss/camss-vfe.h index 844b9275031d..83b11ae1572d 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.h +++ b/drivers/media/platform/qcom/camss/camss-vfe.h @@ -201,5 +201,6 @@ extern const struct vfe_hw_ops vfe_ops_4_1; extern const struct vfe_hw_ops vfe_ops_4_7; extern const struct vfe_hw_ops vfe_ops_4_8; extern const struct vfe_hw_ops vfe_ops_170; +extern const struct vfe_hw_ops vfe_ops_480; #endif /* QC_MSM_CAMSS_VFE_H */ From patchwork Tue May 11 18:07:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 434289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E145C43461 for ; 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[66.131.184.68]) by smtp.gmail.com with ESMTPSA id g5sm17104476qtm.2.2021.05.11.11.08.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 May 2021 11:08:32 -0700 (PDT) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: robert.foss@linaro.org, andrey.konovalov@linaro.org, Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , linux-media@vger.kernel.org (open list:QUALCOMM CAMERA SUBSYSTEM DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 16/17] media: camss: add support for SM8250 camss Date: Tue, 11 May 2021 14:07:23 -0400 Message-Id: <20210511180728.23781-17-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210511180728.23781-1-jonathan@marek.ca> References: <20210511180728.23781-1-jonathan@marek.ca> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Titan 480 camss found on SM8250 has 6 CSIPHY and 4 VFE/CSID. CSID is compatible with the Titan 170 CSID, but the Titan 480 CSID are inside the VFE region (between the "top" and "bus" registers), so a workaround is added to avoid ioremap failure. Signed-off-by: Jonathan Marek Reviewed-by: Robert Foss --- .../media/platform/qcom/camss/camss-csid.c | 22 +- .../media/platform/qcom/camss/camss-csiphy.c | 8 +- drivers/media/platform/qcom/camss/camss-vfe.c | 9 +- .../media/platform/qcom/camss/camss-video.c | 3 +- drivers/media/platform/qcom/camss/camss.c | 196 ++++++++++++++++-- drivers/media/platform/qcom/camss/camss.h | 1 + 6 files changed, 217 insertions(+), 22 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c index 528674dea06c..5ba603549a4f 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -560,7 +560,8 @@ int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid, } else if (camss->version == CAMSS_8x96 || camss->version == CAMSS_660) { csid->ops = &csid_ops_4_7; - } else if (camss->version == CAMSS_845) { + } else if (camss->version == CAMSS_845 || + camss->version == CAMSS_8250) { csid->ops = &csid_ops_170; } else { return -EINVAL; @@ -569,10 +570,21 @@ int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid, /* Memory */ - r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res->reg[0]); - csid->base = devm_ioremap_resource(dev, r); - if (IS_ERR(csid->base)) - return PTR_ERR(csid->base); + if (camss->version == CAMSS_8250) { + /* for titan 480, CSID registers are inside the VFE region, + * between the VFE "top" and "bus" registers. this requires + * VFE to be initialized before CSID + */ + if (id >= 2) /* VFE/CSID lite */ + csid->base = camss->vfe[id].base + 0x200; + else + csid->base = camss->vfe[id].base + 0x1200; + } else { + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res->reg[0]); + csid->base = devm_ioremap_resource(dev, r); + if (IS_ERR(csid->base)) + return PTR_ERR(csid->base); + } /* Interrupt */ diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c index f82f1e2aa688..1d10c816acf5 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -582,7 +582,8 @@ int msm_csiphy_subdev_init(struct camss *camss, csiphy->ops = &csiphy_ops_3ph_1_0; csiphy->formats = csiphy_formats_8x96; csiphy->nformats = ARRAY_SIZE(csiphy_formats_8x96); - } else if (camss->version == CAMSS_845) { + } else if (camss->version == CAMSS_845 || + camss->version == CAMSS_8250) { csiphy->ops = &csiphy_ops_3ph_1_0; csiphy->formats = csiphy_formats_sdm845; csiphy->nformats = ARRAY_SIZE(csiphy_formats_sdm845); @@ -679,7 +680,10 @@ int msm_csiphy_subdev_init(struct camss *camss, if (!strcmp(clock->name, "csiphy0_timer") || !strcmp(clock->name, "csiphy1_timer") || - !strcmp(clock->name, "csiphy2_timer")) + !strcmp(clock->name, "csiphy2_timer") || + !strcmp(clock->name, "csiphy3_timer") || + !strcmp(clock->name, "csiphy4_timer") || + !strcmp(clock->name, "csiphy5_timer")) csiphy->rate_set[i] = true; if (camss->version == CAMSS_660 && diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index e7ab2c175ac9..d543048c10a8 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -220,7 +220,8 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, } else if (vfe->camss->version == CAMSS_8x96 || vfe->camss->version == CAMSS_660 || - vfe->camss->version == CAMSS_845) + vfe->camss->version == CAMSS_845 || + vfe->camss->version == CAMSS_8250) switch (sink_code) { case MEDIA_BUS_FMT_YUYV8_2X8: { @@ -1294,6 +1295,9 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe, case CAMSS_845: vfe->ops = &vfe_ops_170; break; + case CAMSS_8250: + vfe->ops = &vfe_ops_480; + break; default: return -EINVAL; } @@ -1405,7 +1409,8 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe, l->formats = formats_rdi_8x96; l->nformats = ARRAY_SIZE(formats_rdi_8x96); } - } else if (camss->version == CAMSS_845) { + } else if (camss->version == CAMSS_845 || + camss->version == CAMSS_8250) { l->formats = formats_rdi_845; l->nformats = ARRAY_SIZE(formats_rdi_845); } else { diff --git a/drivers/media/platform/qcom/camss/camss-video.c b/drivers/media/platform/qcom/camss/camss-video.c index 54e77d30d452..5dc1ddbe6d65 100644 --- a/drivers/media/platform/qcom/camss/camss-video.c +++ b/drivers/media/platform/qcom/camss/camss-video.c @@ -1011,7 +1011,8 @@ int msm_video_register(struct camss_video *video, struct v4l2_device *v4l2_dev, video->formats = formats_rdi_8x96; video->nformats = ARRAY_SIZE(formats_rdi_8x96); } - } else if (video->camss->version == CAMSS_845) { + } else if (video->camss->version == CAMSS_845 || + video->camss->version == CAMSS_8250) { video->formats = formats_rdi_845; video->nformats = ARRAY_SIZE(formats_rdi_845); } else { diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index c08d6d6f6f90..463850725f37 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -662,6 +662,162 @@ static const struct resources vfe_res_845[] = { } }; +static const struct resources csiphy_res_8250[] = { + /* CSIPHY0 */ + { + .regulator = { NULL }, + .clock = { "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 400000000 }, + { 300000000 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" } + }, + /* CSIPHY1 */ + { + .regulator = { NULL }, + .clock = { "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 400000000 }, + { 300000000 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" } + }, + /* CSIPHY2 */ + { + .regulator = { NULL }, + .clock = { "csiphy2", "csiphy2_timer" }, + .clock_rate = { { 400000000 }, + { 300000000 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" } + }, + /* CSIPHY3 */ + { + .regulator = { NULL }, + .clock = { "csiphy3", "csiphy3_timer" }, + .clock_rate = { { 400000000 }, + { 300000000 } }, + .reg = { "csiphy3" }, + .interrupt = { "csiphy3" } + }, + /* CSIPHY4 */ + { + .regulator = { NULL }, + .clock = { "csiphy4", "csiphy4_timer" }, + .clock_rate = { { 400000000 }, + { 300000000 } }, + .reg = { "csiphy4" }, + .interrupt = { "csiphy4" } + }, + /* CSIPHY5 */ + { + .regulator = { NULL }, + .clock = { "csiphy5", "csiphy5_timer" }, + .clock_rate = { { 400000000 }, + { 300000000 } }, + .reg = { "csiphy5" }, + .interrupt = { "csiphy5" } + } +}; + +static const struct resources csid_res_8250[] = { + /* CSID0 */ + { + .regulator = { NULL }, + .clock = { "vfe0_csid", "vfe0_cphy_rx", "vfe0", "vfe0_areg", "vfe0_ahb" }, + .clock_rate = { { 400000000 }, + { 400000000 }, + { 350000000, 475000000, 576000000, 720000000 }, + { 100000000, 200000000, 300000000, 400000000 }, + { 0 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" } + }, + /* CSID1 */ + { + .regulator = { NULL }, + .clock = { "vfe1_csid", "vfe1_cphy_rx", "vfe1", "vfe1_areg", "vfe1_ahb" }, + .clock_rate = { { 400000000 }, + { 400000000 }, + { 350000000, 475000000, 576000000, 720000000 }, + { 100000000, 200000000, 300000000, 400000000 }, + { 0 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" } + }, + /* CSID2 */ + { + .regulator = { NULL }, + .clock = { "vfe_lite_csid", "vfe_lite_cphy_rx", "vfe_lite", "vfe_lite_ahb" }, + .clock_rate = { { 400000000 }, + { 400000000 }, + { 400000000, 480000000 }, + { 0 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" } + }, + /* CSID3 */ + { + .regulator = { NULL }, + .clock = { "vfe_lite_csid", "vfe_lite_cphy_rx", "vfe_lite", "vfe_lite_ahb" }, + .clock_rate = { { 400000000 }, + { 400000000 }, + { 400000000, 480000000 }, + { 0 } }, + .reg = { "csid3" }, + .interrupt = { "csid3" } + } +}; + +static const struct resources vfe_res_8250[] = { + /* VFE0 */ + { + .regulator = { NULL }, + .clock = { "vfe0_ahb", "vfe0_areg", "vfe0", "vfe0_axi", "cam_hf_axi" }, + .clock_rate = { { 0 }, + { 100000000, 200000000, 300000000, 400000000 }, + { 350000000, 475000000, 576000000, 720000000 }, + { 0 }, + { 0 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" } + }, + /* VFE1 */ + { + .regulator = { NULL }, + .clock = { "vfe1_ahb", "vfe1_areg", "vfe1", "vfe1_axi", "cam_hf_axi" }, + .clock_rate = { { 0 }, + { 100000000, 200000000, 300000000, 400000000 }, + { 350000000, 475000000, 576000000, 720000000 }, + { 0 }, + { 0 } }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" } + }, + /* VFE2 (lite) */ + { + .regulator = { NULL }, + .clock = { "vfe_lite_ahb", "vfe_lite_axi", "vfe_lite", "cam_hf_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 400000000, 480000000 }, + { 0 } }, + .reg = { "vfe_lite0" }, + .interrupt = { "vfe_lite0" } + }, + + /* VFE3 (lite) */ + { + .regulator = { NULL }, + .clock = { "vfe_lite_ahb", "vfe_lite_axi", "vfe_lite", "cam_hf_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 400000000, 480000000 }, + { 0 } }, + .reg = { "vfe_lite1" }, + .interrupt = { "vfe_lite1" } + }, +}; + /* * camss_add_clock_margin - Add margin to clock frequency rate * @rate: Clock frequency rate @@ -945,6 +1101,12 @@ static int camss_init_subdevices(struct camss *camss) /* Titan VFEs don't have an ISPIF */ ispif_res = NULL; vfe_res = vfe_res_845; + } else if (camss->version == CAMSS_8250) { + csiphy_res = csiphy_res_8250; + csid_res = csid_res_8250; + /* Titan VFEs don't have an ISPIF */ + ispif_res = NULL; + vfe_res = vfe_res_8250; } else { return -EINVAL; } @@ -960,6 +1122,17 @@ static int camss_init_subdevices(struct camss *camss) } } + /* note: SM8250 requires VFE to be initialized before CSID */ + for (i = 0; i < camss->vfe_num; i++) { + ret = msm_vfe_subdev_init(camss, &camss->vfe[i], + &vfe_res[i], i); + if (ret < 0) { + dev_err(camss->dev, + "Fail to init vfe%d sub-device: %d\n", i, ret); + return ret; + } + } + for (i = 0; i < camss->csid_num; i++) { ret = msm_csid_subdev_init(camss, &camss->csid[i], &csid_res[i], i); @@ -978,16 +1151,6 @@ static int camss_init_subdevices(struct camss *camss) return ret; } - for (i = 0; i < camss->vfe_num; i++) { - ret = msm_vfe_subdev_init(camss, &camss->vfe[i], - &vfe_res[i], i); - if (ret < 0) { - dev_err(camss->dev, - "Fail to init vfe%d sub-device: %d\n", i, ret); - return ret; - } - } - return 0; } @@ -1250,7 +1413,8 @@ static int camss_configure_pd(struct camss *camss) if (camss->version == CAMSS_8x96 || camss->version == CAMSS_660) nbr_pm_domains = PM_DOMAIN_GEN1_COUNT; - else if (camss->version == CAMSS_845) + else if (camss->version == CAMSS_845 || + camss->version == CAMSS_8250) nbr_pm_domains = PM_DOMAIN_GEN2_COUNT; for (i = 0; i < nbr_pm_domains; i++) { @@ -1326,6 +1490,12 @@ static int camss_probe(struct platform_device *pdev) camss->csiphy_num = 4; camss->csid_num = 3; camss->vfe_num = 3; + } else if (of_device_is_compatible(dev->of_node, + "qcom,sm8250-camss")) { + camss->version = CAMSS_8250; + camss->csiphy_num = 6; + camss->csid_num = 4; + camss->vfe_num = 4; } else { ret = -EINVAL; goto err_free; @@ -1457,7 +1627,8 @@ void camss_delete(struct camss *camss) if (camss->version == CAMSS_8x96 || camss->version == CAMSS_660) nbr_pm_domains = PM_DOMAIN_GEN1_COUNT; - else if (camss->version == CAMSS_845) + else if (camss->version == CAMSS_845 || + camss->version == CAMSS_8250) nbr_pm_domains = PM_DOMAIN_GEN2_COUNT; for (i = 0; i < nbr_pm_domains; i++) { @@ -1493,6 +1664,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8996-camss" }, { .compatible = "qcom,sdm660-camss" }, { .compatible = "qcom,sdm845-camss" }, + { .compatible = "qcom,sm8250-camss" }, { } }; diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index dc8b4154f92b..377e2474a485 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -69,6 +69,7 @@ enum camss_version { CAMSS_8x96, CAMSS_660, CAMSS_845, + CAMSS_8250, }; struct camss {