From patchwork Wed Jun 27 14:38:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 140327 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp961251ljj; Wed, 27 Jun 2018 07:39:08 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcG8YRtRtdrdA6pjj+Ma+rIoRkEwMfWIT6I3OfE4elW/jwE59TsyOEtR46tM0FsocQ0kFCE X-Received: by 2002:a0c:a083:: with SMTP id c3-v6mr5587664qva.107.1530110348318; Wed, 27 Jun 2018 07:39:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530110348; cv=none; d=google.com; s=arc-20160816; b=DtPovWIhNT5xFwbtB86nfjSPgzCfQB0aPEOeRgUTV8AzCXAKPu5TgvTZdNzOMqfudE w/uqUgJ+HsmgXXGFmdeiNzogngsugeVSlpkTQU7nsB+nSm/dmntOUADw4A+Jtdc/CJsp AfXg1V85K9oOOaTNmORmTu6omMDcUd8DW4LO5b8r0EI8y/jGdlsY70dz0fwXLuUPfIxl E9Dr5uOdqWC2KnWQOoNjsCD/Usu5KjqmMF5c7X/VHHHtllTzgvgP11SbE34qJJ/Gz3Aa U5eljm0JeZFJNLC+fkLCa8ITBMzOIKkHkr/UOke+dZSDSadqJ8Z6zP8SL6TOXfcIFaHQ GfZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=qQewv7LjHW/0bryObaLrIvLfOOWJhF9J872HU/5aCzI=; b=hljFxE4PfKwVozfAQ7kyIPKdKY8D0KASvxze4DKn2Oqq/ip5mjPC72Nf23PbTMCvAA xB9Ec5pMSA7/Q065mK9aTwZw9a9in1rT0yJly7dHI2gr0Ve1XxZB1tQQ/CF75vniKIaS vV/TNbmYjei2uBp901HFHW6/gRHe0MMRxCtcqedr3gYv8lg+GRbKbkzGv/7BSymzI7xf 4NaZ/0IXjE8hNCA3w4EIOTH/mYOnl5ZDxAAKNAYQwO/VYRQMGgS6z0q/mWPCa4yXVx4h 6D30Oc9bVckim5OBw2LPzIfIZIXm/+m5Ost8Lkwf/9QmdmGj+DDm+nqtqeOdvcrJF34I vLfw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=TQe9Fjhh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id z20-v6si222789qti.164.2018.06.27.07.39.08 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 27 Jun 2018 07:39:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=TQe9Fjhh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:59695 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYBb9-0004bX-NK for patch@linaro.org; Wed, 27 Jun 2018 10:39:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49436) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYBam-0004ZY-7v for qemu-devel@nongnu.org; Wed, 27 Jun 2018 10:38:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fYBai-0002qr-4L for qemu-devel@nongnu.org; Wed, 27 Jun 2018 10:38:44 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:45945) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fYBah-0002qB-RZ; Wed, 27 Jun 2018 10:38:40 -0400 Received: by mail-pf0-x242.google.com with SMTP id a22-v6so1059926pfo.12; Wed, 27 Jun 2018 07:38:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=qQewv7LjHW/0bryObaLrIvLfOOWJhF9J872HU/5aCzI=; b=TQe9FjhhheYFJ8xyINqHI6Dqu5R1zw65E6SORpVVnP6lrXy0AmmqbU4m9ulcq8z3jL VncaMLgLhBIUdrj5EPrXONiqB5rlyBf9fjg2NxewoVJGRIxKFjYi0FtRxva+fZaoXvvu gSFHBjMeKBGnZKC9PfnQoXrFYccg6g6xjnfVF79PKKLi7a+E9qe0OyquElVY13+cl+bB /3aVAQ4S8h8lLJY4YyX/QORl5dwvNPUFTqqDfsWLle1SnEu/2R1SAITBQZJ5hMdRHWId Sxctdsn/budvIRQLC0PHy9oRoigKvnIVrceJZYNSg7OsRj1wHFZO7naBfObkMr0KapMv 7vCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=qQewv7LjHW/0bryObaLrIvLfOOWJhF9J872HU/5aCzI=; b=ETSAyKYc1lvDnTclLL2ANv+jS7KDacTW4s3YJ5Pim/NEMpFbD8k5eBclZGyi2r7HMy f4/s5pFmp5HaJjZyFz+QvNEW5jbc8R8++AoWb4ZfrxhMpD1x6y21dttvppIGgl846v6Z YEL8kj8A71VUMfebbIcYTqQSXZ26ExuYL47GBA6uqLicyxJ4jOU95iETe+L9jxtFGQx9 FpkFyD77MjKdnLoQzWKPiIrDB2IirsWlQlnYwGaOoCrLCGdgtp5zHN89m366Xpg8NTAN Oe5AgUJblqh0UpnEzB0CRfCSGMuRJ9SIvPpJ2grC0tih7pnhm0O/oEzFw6wYEYCkNuze AeDw== X-Gm-Message-State: APt69E0nATWQOXq+y9pdFFSwxZjnc4D+3udbwS1ns6IOCy+tm9C5hMey dngg+qzjmwHe5DceX/J7ey0= X-Received: by 2002:a62:152:: with SMTP id 79-v6mr3191418pfb.74.1530110318542; Wed, 27 Jun 2018 07:38:38 -0700 (PDT) Received: from aurora.jms.id.au ([45.124.203.19]) by smtp.gmail.com with ESMTPSA id m11-v6sm11093779pgt.46.2018.06.27.07.38.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 27 Jun 2018 07:38:37 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Thu, 28 Jun 2018 00:08:30 +0930 From: Joel Stanley To: Peter Maydell Date: Thu, 28 Jun 2018 00:08:13 +0930 Message-Id: <20180627143815.1829-2-joel@jms.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180627143815.1829-1-joel@jms.id.au> References: <20180627143815.1829-1-joel@jms.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 1/3] arm: Add Nordic Semiconductor nRF51 SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan Hajnoczi , =?utf-8?q?Steffen_G=C3=B6rtz?= , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Jim Mussared , Julia Suvorova Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The nRF51 is a Cortex-M0 microcontroller with an on-board radio module, plus other common ARM SoC peripherals. http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf This defines a basic model of the CPU and memory, with no peripherals implemented at this stage. Signed-off-by: Joel Stanley --- v2: put memory as struct fileds in state structure pass OBJECT(s) as owner, not NULL Add missing addresses for ficr Fix flash and sram sizes for microbit Embed cpu object in state object an initalise it without use of armv7m_init Link to datasheet --- default-configs/arm-softmmu.mak | 1 + hw/arm/Makefile.objs | 1 + hw/arm/nrf51_soc.c | 116 ++++++++++++++++++++++++++++++++ include/hw/arm/nrf51_soc.h | 41 +++++++++++ 4 files changed, 159 insertions(+) create mode 100644 hw/arm/nrf51_soc.c create mode 100644 include/hw/arm/nrf51_soc.h -- 2.17.1 diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index 834d45cfaf95..ea63dd2885ed 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -101,6 +101,7 @@ CONFIG_STM32F2XX_SYSCFG=y CONFIG_STM32F2XX_ADC=y CONFIG_STM32F2XX_SPI=y CONFIG_STM32F205_SOC=y +CONFIG_NRF51_SOC=y CONFIG_CMSDK_APB_TIMER=y CONFIG_CMSDK_APB_UART=y diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index d51fcecaf242..68be73f1c3ff 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -36,3 +36,4 @@ obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o obj-$(CONFIG_IOTKIT) += iotkit.o obj-$(CONFIG_FSL_IMX7) += fsl-imx7.o mcimx7d-sabre.o obj-$(CONFIG_ARM_SMMUV3) += smmu-common.o smmuv3.o +obj-$(CONFIG_NRF51_SOC) += nrf51_soc.o diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c new file mode 100644 index 000000000000..f4b04642d656 --- /dev/null +++ b/hw/arm/nrf51_soc.c @@ -0,0 +1,116 @@ +/* + * Nordic Semiconductor nRF51 SoC + * http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.1.pdf + * + * Copyright 2018 Joel Stanley + * + * This code is licensed under the GPL version 2 or later. See + * the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu-common.h" +#include "hw/arm/arm.h" +#include "hw/sysbus.h" +#include "hw/boards.h" +#include "hw/devices.h" +#include "hw/misc/unimp.h" +#include "exec/address-spaces.h" +#include "sysemu/sysemu.h" +#include "qemu/log.h" +#include "cpu.h" + +#include "hw/arm/nrf51_soc.h" + +#define IOMEM_BASE 0x40000000 +#define IOMEM_SIZE 0x20000000 + +#define FICR_BASE 0x10000000 +#define FICR_SIZE 0x000000fc + +/* TODO: Flash size should be defined by the board. Microbit uses 256KB */ +#define FLASH_BASE 0x00000000 +#define FLASH_SIZE (256 * 1024) + +/* TODO: Flash size should be defined by the board. Microbit uses 16KB */ +#define SRAM_BASE 0x20000000 +#define SRAM_SIZE (16 * 1024) + +static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) +{ + NRF51State *s = NRF51_SOC(dev_soc); + Error *err = NULL; + + if (!s->board_memory) { + error_setg(errp, "memory property was not set"); + return; + } + + object_property_set_link(OBJECT(&s->cpu), OBJECT(&s->container), "memory", + &err); + object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + + memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1); + + memory_region_init_ram(&s->flash, OBJECT(s), "nrf51.flash", FLASH_SIZE, &err); + if (err) { + error_propagate(errp, err); + return; + } + memory_region_set_readonly(&s->flash, true); + memory_region_add_subregion(&s->container, FLASH_BASE, &s->flash); + + memory_region_init_ram(&s->sram, NULL, "nrf51.sram", SRAM_SIZE, &err); + if (err) { + error_propagate(errp, err); + return; + } + memory_region_add_subregion(&s->container, SRAM_BASE, &s->sram); + + create_unimplemented_device("nrf51_soc.io", IOMEM_BASE, IOMEM_SIZE); + create_unimplemented_device("nrf51_soc.ficr", FICR_BASE, FICR_SIZE); + create_unimplemented_device("nrf51_soc.private", 0xF0000000, 0x10000000); +} + +static void nrf51_soc_init(Object *obj) +{ + NRF51State *s = NRF51_SOC(obj); + + memory_region_init(&s->container, obj, "nrf51-container", UINT64_MAX); + + /* TODO: implement a cortex m0 and update this */ + object_initialize(&s->cpu, sizeof(s->cpu), TYPE_ARMV7M); + object_property_add_child(OBJECT(s), "armv7m", OBJECT(&s->cpu), &error_abort); + qdev_set_parent_bus(DEVICE(&s->cpu), sysbus_get_default()); + qdev_prop_set_string(DEVICE(&s->cpu), "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3")); + qdev_prop_set_uint32(DEVICE(&s->cpu), "num-irq", 96); +} + +static Property nrf51_soc_properties[] = { + DEFINE_PROP_LINK("memory", NRF51State, board_memory, TYPE_MEMORY_REGION, + MemoryRegion *), + DEFINE_PROP_END_OF_LIST(), +}; + +static void nrf51_soc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = nrf51_soc_realize; + dc->props = nrf51_soc_properties; +} + +static const TypeInfo nrf51_soc_info = { + .name = TYPE_NRF51_SOC, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(NRF51State), + .instance_init = nrf51_soc_init, + .class_init = nrf51_soc_class_init, +}; + +static void nrf51_soc_types(void) +{ + type_register_static(&nrf51_soc_info); +} +type_init(nrf51_soc_types) diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h new file mode 100644 index 000000000000..7166b8ea7fbe --- /dev/null +++ b/include/hw/arm/nrf51_soc.h @@ -0,0 +1,41 @@ +/* + * Nordic Semiconductor nRF51 SoC + * + * Copyright 2018 Joel Stanley + * + * This code is licensed under the GPL version 2 or later. See + * the COPYING file in the top-level directory. + */ + +#ifndef NRF51_SOC_H +#define NRF51_SOC_H + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "hw/arm/armv7m.h" + +#define TYPE_NRF51_SOC "nrf51-soc" +#define NRF51_SOC(obj) \ + OBJECT_CHECK(NRF51State, (obj), TYPE_NRF51_SOC) + +typedef struct NRF51State { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + char *kernel_filename; + + ARMv7MState cpu; + + MemoryRegion iomem; + MemoryRegion sram; + MemoryRegion flash; + + MemoryRegion *board_memory; + + MemoryRegion container; + +} NRF51State; + +#endif + From patchwork Wed Jun 27 14:38:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 140329 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp964057ljj; Wed, 27 Jun 2018 07:41:39 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdhJaXu95dTlAcn/W6qXdwVzJhZBQHhdUtImsuH5NQiy3gZ2/pHTej93nBPiuZWhE+XisyN X-Received: by 2002:ac8:2a55:: with SMTP id l21-v6mr5632906qtl.290.1530110499258; Wed, 27 Jun 2018 07:41:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530110499; cv=none; d=google.com; s=arc-20160816; b=XknQebZyyT0pInbNoo1Sup04uxpl+lSABldBh0TPjbZWdsnZ1tYjM5d1wGNBj0VjRo lS9LVb4jUo5KHOppX1qhIQDkhYgnZVhWNvVAxVjRcr5B1kT6Ho1ilb/qJu/ee97ghQij 1oIvf4GNvA/VCTDOU8Kd8gPb6FwGdo/LLVODBNzlmUyxdmF+OizYcWQfdNrxbFrTaeJ6 7gy7Ix8f3PtgS/ctf261rdjoKdpOk/y63yE68gmyxyeSKE/S3+jSFUpjj1HGZINOIDsN ksP5E8hNXkspkuxZ+GBeLscnXORPrFx6aOncJiLuT5kuc14p0+3xu3mGtiincrqWRzZJ 8cYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=nGxUklkLjq7dCfdwBnYMyDLlkJR5/TzIHyUQafAprEM=; b=xB+179My+HIiWCdsc59X2ojMLnnL5SFfWMiK7L4SYCh3UuIxzARo6tKbBOCRC7WwYa t8kwbMx6p8VmQjZO9pXmpxVaqsCKR91CIjwzJsYZ48MFCdyYuU10osnS1/S7embVNab9 a99Mc1ugrBAAD13soBYl28OJ6YH0gaFc2eTrzldMavcIrItL58yLytmpS+P2hBufMSas CmoApXjBbb80sK4G/9/K04gqD8i9SVjbguBKwu0giL+yAJf4crl1hKR3dWJqQyTm3WoK 2kdeLfNtiCJeGBk7zBWpheySyXc3vn4+u4XyhAt8OZFUpwOcMZX0cOtDrABjEvcynhVw FZgg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=MvIiy3oj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id v5-v6si836325qkg.8.2018.06.27.07.41.39 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 27 Jun 2018 07:41:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=MvIiy3oj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:59712 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYBda-0008MO-Gg for patch@linaro.org; Wed, 27 Jun 2018 10:41:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49526) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYBar-0004dW-S6 for qemu-devel@nongnu.org; Wed, 27 Jun 2018 10:38:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fYBaq-0002vZ-8q for qemu-devel@nongnu.org; Wed, 27 Jun 2018 10:38:49 -0400 Received: from mail-pg0-x243.google.com ([2607:f8b0:400e:c05::243]:34962) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fYBaq-0002vL-3M; Wed, 27 Jun 2018 10:38:48 -0400 Received: by mail-pg0-x243.google.com with SMTP id i7-v6so1016211pgp.2; Wed, 27 Jun 2018 07:38:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=nGxUklkLjq7dCfdwBnYMyDLlkJR5/TzIHyUQafAprEM=; b=MvIiy3ojGCvB/frUdZJDqzYMR+QaAFXEYiaLCM31ntBXmMbdD/x30sl0rw72V6Q+mn bFO7fWaC/H0XpRw7iVUAT4dEQLKx+yJ+39OPQRautFbIp4oU6JghGrHvpNhL1VBe3xNp ozy+0Rrv8hrP6cPBeadwBxzF2k91hA4glEOvHGmSW2cH8fAdM4P1Hyr7ZTnj9W9gyBxR OJlKzd6JmdttDbxhDiesMSEzF0vgu4QBMJuyVONBPOC8ODg1L+MmLDN5QHpdwznHlye7 l3rgRaZjWYLq0aptBwCRulA/RCEEF0wA3yt7DnH82bhzC6GVruQgQHEYz9zw0wlzouBu ZMWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=nGxUklkLjq7dCfdwBnYMyDLlkJR5/TzIHyUQafAprEM=; b=gHXHNJxOLjinzVM48X4pqcH4hNSmgDs8IjE+/1L5HQZHs7M4o4iDKELW0+OYTSPdr4 ELhywwEcpvqq7myrQREjPFX7Zec0ypRui9GFnvtUx3DTvW857QrfVlLqcPF2LcjAOhyr Uznp/Q8hzF9fRHz2ZpXiG/j4UUcW2ixBf2CTaoQLb/nrdkqQ3XIUpnrv44XB+KYz7ZiN WVUJyJIpWrr+oxWbdQ2cNqA2kaIx4MRd2aibn5R76y4hvS5b886FxhnrnPZwZLuc7ZaV K9JJFpF8IkN5gmUVpHKakedeq4AK5D+CycN0L3u3UUJsRCmjRmfdj0hKRf16NluSmy8l zavw== X-Gm-Message-State: APt69E3qn7hZwelJVCj2N0TreBYOgXELn5O06LSow6PAZ2dfxJO0EwdR kSMhP4mU9wr+YilARSILaQk= X-Received: by 2002:a62:4359:: with SMTP id q86-v6mr6217559pfa.140.1530110327020; Wed, 27 Jun 2018 07:38:47 -0700 (PDT) Received: from aurora.jms.id.au ([45.124.203.19]) by smtp.gmail.com with ESMTPSA id u5-v6sm5169933pfg.63.2018.06.27.07.38.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 27 Jun 2018 07:38:46 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Thu, 28 Jun 2018 00:08:39 +0930 From: Joel Stanley To: Peter Maydell Date: Thu, 28 Jun 2018 00:08:14 +0930 Message-Id: <20180627143815.1829-3-joel@jms.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180627143815.1829-1-joel@jms.id.au> References: <20180627143815.1829-1-joel@jms.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [PATCH v2 2/3] arm: Add BBC micro:bit machine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan Hajnoczi , =?utf-8?q?Steffen_G=C3=B6rtz?= , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Jim Mussared , Julia Suvorova Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This adds the base for a machine model of the BBC micro:bit: https://en.wikipedia.org/wiki/Micro_Bit This is a system with a nRF51 SoC containing the main processor, with various peripherals on board. Signed-off-by: Joel Stanley --- v2: - Instead of setting kernel filename property, load the image directly - Add link to hardware overview website --- hw/arm/Makefile.objs | 2 +- hw/arm/microbit.c | 56 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 57 insertions(+), 1 deletion(-) create mode 100644 hw/arm/microbit.c -- 2.17.1 Reviewed-by: Stefan Hajnoczi diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index 68be73f1c3ff..cecbe41086a8 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -36,4 +36,4 @@ obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o obj-$(CONFIG_IOTKIT) += iotkit.o obj-$(CONFIG_FSL_IMX7) += fsl-imx7.o mcimx7d-sabre.o obj-$(CONFIG_ARM_SMMUV3) += smmu-common.o smmuv3.o -obj-$(CONFIG_NRF51_SOC) += nrf51_soc.o +obj-$(CONFIG_NRF51_SOC) += nrf51_soc.o microbit.o diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c new file mode 100644 index 000000000000..e9e0d35ca79c --- /dev/null +++ b/hw/arm/microbit.c @@ -0,0 +1,56 @@ +/* + * BBC micro:bit machine + * http://tech.microbit.org/hardware/ + * + * Copyright 2018 Joel Stanley + * + * This code is licensed under the GPL version 2 or later. See + * the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/boards.h" +#include "hw/arm/arm.h" +#include "exec/address-spaces.h" + +#include "hw/arm/nrf51_soc.h" + +#define FLASH_BASE 0x00000000 +#define FLASH_SIZE (256 * 1024) + +typedef struct { + MachineState parent; + + NRF51State nrf51; +} MICROBITMachineState; + +#define TYPE_MICROBIT_MACHINE "microbit" + +#define MICROBIT_MACHINE(obj) \ + OBJECT_CHECK(MICROBITMachineState, obj, TYPE_MICROBIT_MACHINE) + +static void microbit_init(MachineState *machine) +{ + MICROBITMachineState *s = g_new(MICROBITMachineState, 1); + MemoryRegion *system_memory = get_system_memory(); + Object *soc; + + object_initialize(&s->nrf51, sizeof(s->nrf51), TYPE_NRF51_SOC); + soc = OBJECT(&s->nrf51); + object_property_add_child(OBJECT(machine), "nrf51", soc, &error_fatal); + object_property_set_link(soc, OBJECT(system_memory), + "memory", &error_abort); + + object_property_set_bool(soc, true, "realized", &error_abort); + + armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, FLASH_SIZE); +} + +static void microbit_machine_init(MachineClass *mc) +{ + mc->desc = "BBC micro:bit"; + mc->init = microbit_init; + mc->max_cpus = 1; +} +DEFINE_MACHINE("microbit", microbit_machine_init); From patchwork Wed Jun 27 14:38:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 140328 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp961642ljj; Wed, 27 Jun 2018 07:39:28 -0700 (PDT) X-Google-Smtp-Source: AAOMgpf4wvfvMrmnZ+4oldLFxBXOycIwMks/ur3ZOCwEMqfLACtgd4eufpUgS4DUu/xv3FlYUQTk X-Received: by 2002:a37:c3cf:: with SMTP id r76-v6mr5382117qkl.150.1530110368655; Wed, 27 Jun 2018 07:39:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530110368; cv=none; d=google.com; s=arc-20160816; b=0LryiIf1Qm4TUxhHue8afOYeozF+LGtUafNmvp3lW71Sz/4bXhXIzNJh0VGAsa04WG oj4X3ot5kf0e6mc8WW1CMPX6nBWfTEr8UQJTVM30xX0GGN/ZV2kuRXRHtdfiaE86ZGoB EacXIaxcUs+UiEpKIyJKfG0wduTatKGG8uhFb9p3sDqpWX7OYx6o3YXPta1NxFmgXTb/ /9rT6rd06hkOE+UJQlnr9b88yxV2hm8V6TPryKwNlCr/cXKP4PEligCKIuUmi1itdIHs ltQ5Oys1qlU+49WKWka+tl5CIsBGz5WwnSkKR7RQMrcONiDhFooXYvEWhvRrdKTO8qIQ VjCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=eHuIGU/0eRqJKrVyJV+m6JVRkowoxtsGru3YLticO2M=; b=rlzbyxAHLBzG/WPjm31o97eShQJq+uXGYY8zv24+yoRPPfTvpFBl/Jy4DMeCOJbY6p W6AASvf95eLRJyuSFf4+0GBkx4+aUfA+JWw2TumpBqfP62S9U5WgtD8J0ZLa6wTHOtIZ 3VHgKRarJHxxcHjCG4oy80M6muyjyoWlw14EyQaehHM0OqiqUCq3MD7ZkEqWFRXcU8xw xchpio5HpW5APkwHLkswaU+GCvFXL0UkGj2P+Ty37SceM0TR8j5wPk5YyuA6UbQVUVGh 2W+/hhcnmSY8XFRF4yv7dLb76NZL7rWsTXC9BnmaPze56aGrknr3DQBLX3Ae6avm6Qqx xO+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=qqumr0KC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 4-v6si524162qke.169.2018.06.27.07.39.28 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 27 Jun 2018 07:39:28 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=qqumr0KC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:59698 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYBbT-0004ty-Tx for patch@linaro.org; Wed, 27 Jun 2018 10:39:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49582) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYBaz-0004il-DI for qemu-devel@nongnu.org; Wed, 27 Jun 2018 10:38:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fYBay-0002zP-G6 for qemu-devel@nongnu.org; Wed, 27 Jun 2018 10:38:57 -0400 Received: from mail-pl0-x243.google.com ([2607:f8b0:400e:c01::243]:45041) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fYBay-0002z8-A0; Wed, 27 Jun 2018 10:38:56 -0400 Received: by mail-pl0-x243.google.com with SMTP id m16-v6so1134886pls.11; Wed, 27 Jun 2018 07:38:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=eHuIGU/0eRqJKrVyJV+m6JVRkowoxtsGru3YLticO2M=; b=qqumr0KCbZ5CqepGc8N46QNcDI0M0TJSCxd8QiI3M3voz7+3ZzTgUhB46eULGjCkIJ lKuQMKkDVP76oYWza3ZCpiFMFeI7acZojX5NxlmqKYBW/+RWIyYLDrJ9oPfk64KLhN+G 7PIaAoRb9ygQLLeswcTW37vBEKnftE0u3ct+CFILHrFXC+ckfAtMsr8vyeLdhtxC0iaC 7YxLWR/cWzjiNBw4wBEY4wd2qw3FTcl6HcHYy4f4v+OjXaqG5UunB88u8aFRavknQHVT SlF5LeDS1HB3N7LGrriRuAupnj9x4nb5aUL8n/ypA9bbBXDyJFEw7QMeSDiXmJBSwZg9 Uv+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=eHuIGU/0eRqJKrVyJV+m6JVRkowoxtsGru3YLticO2M=; b=Z+KRxjBgfThzgLuy1s57qrPXKpOQX/jenjzNAMv7ZTcLxT3uenxumSrFRjYBsICfqr 6ulCdlUlFCtg6aXikJsIsISstMkIA8nPwqDJyjttiVhnRTj1kd26hYSuTmSVLbIJbcgM vS8HtAf3UwGocrCXJCv8D6CfnX71reeD/2Z1V9bxlsQaZjSgVwEHBnr+AQ43xcczFK/O cZZoE7ZmNvz+UQIuT3JARLgTGIx97uxQn0DMnT4wmQ1N6WdqqA72a1lulU45v5042/sM yP0RsXZfo4jNBDpNd9/YbynhJ/hCG9UpRqXUTbXBfezRpzGzBEpNXyFJzyfof913fa/s M4qw== X-Gm-Message-State: APt69E3x/Fl1E04mVklENBDh2Z7Q8P+657vvqeu/d9CBNu404SUwQmKt vZ+xhtC19I0sDVY1Io77PDEgGITW X-Received: by 2002:a17:902:7e43:: with SMTP id a3-v6mr5752494pln.151.1530110335255; Wed, 27 Jun 2018 07:38:55 -0700 (PDT) Received: from aurora.jms.id.au ([45.124.203.19]) by smtp.gmail.com with ESMTPSA id r86-v6sm7619535pfd.154.2018.06.27.07.38.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 27 Jun 2018 07:38:54 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Thu, 28 Jun 2018 00:08:47 +0930 From: Joel Stanley To: Peter Maydell Date: Thu, 28 Jun 2018 00:08:15 +0930 Message-Id: <20180627143815.1829-4-joel@jms.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180627143815.1829-1-joel@jms.id.au> References: <20180627143815.1829-1-joel@jms.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::243 Subject: [Qemu-devel] [PATCH v2 3/3] MAINTAINERS: Add NRF51 entry X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan Hajnoczi , =?utf-8?q?Steffen_G=C3=B6rtz?= , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Jim Mussared , Julia Suvorova Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This contains the NRF51, and the machine that uses it, the BBC micro:bit. Signed-off-by: Joel Stanley --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.17.1 Reviewed-by: Stefan Hajnoczi diff --git a/MAINTAINERS b/MAINTAINERS index 8c626f6a079e..fef3d71dbef7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -656,6 +656,14 @@ F: include/hw/*/*aspeed* F: hw/net/ftgmac100.c F: include/hw/net/ftgmac100.h +NRF51 +M: Joel Stanley +L: qemu-arm@nognu.org +S: Maintained +F: hw/arm/nrf51_soc.c +F: hw/arm/microbit.c +F: include/hw/arm/nrf51_soc.h + CRIS Machines ------------- Axis Dev88