From patchwork Wed May 19 12:51:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442399 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1301095jac; Wed, 19 May 2021 06:04:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy9dzqPijOiagSD+ls4fNWiKYs4v8nwAWtmdLVpx0UWU2kQPrXAfSaAqJVc2JPwqywFc+z/ X-Received: by 2002:a5e:c742:: with SMTP id g2mr3920217iop.40.1621429489871; Wed, 19 May 2021 06:04:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621429489; cv=none; d=google.com; s=arc-20160816; b=0aNJR4sB5SEF/HyN1/m8MVQUIyrHkZiKMFjg9f27xoqBnOrLmmffmYSVXUVM4LlJf/ j0lrIL2fzKErMEqMNDH+ANdgbAgYnUmLK1wT4uqEbO0oFrDYbzoBWoh4MZ0H1aW0O4If 9SZe3I/P1FOuOk1+sozbua4vvKbizH49MkMFhAqEECDQGiVQxompKvRv/E4OAdk3Nnlt 0NWU79xoHsbj8hCrLg8gNnmGo/PTbf9UiEz2ephwjz4eB11sg7Y2Q+klPZSdQQARMjdU kh4Xcf9/ILzNIzxhyN+33eq4HH2v9WAQzO/xVJ0UqdJmlaPbpvDlHoErEmvL9vpkFQVG Dtug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=FuHyKvIEk1XyrXWBRqM9T0RkYzgcE7cWxB/YAkzRa7E=; b=nqzum06h2hMwxRlF6kUjH8/tC2aNI3F5IOm7CW0y/e3lguokV8GvNi7FyrJUgzlW9i F326OIHLo47jDgV883pMoVnX/Hp4h7ut1PMCw7+SpfnITfIE/Rv/HjZaJ9ScUexH5zsg fS9FjJM5zilgyjyCvTa9SqdzJwfOd4V+ulGhtnqZ2Xv8l/X4oLb4F5X0llekN/DpwEYu Dn/lEEz/lnmZReTSEVzLKp3JRoplHFBzx8+lBc1L4LA54NQ1gu2JW8JZnYayU4TWZs4c gcn5i5eZcpms7ny7sqQfJ2xM3G6hIHFm/GrEF1Sjnmk32chVp+F4cP793dE6XqE/IVus nhHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=MHtY5Jwc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t15si9133814ilu.79.2021.05.19.06.04.49 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:04:49 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=MHtY5Jwc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:59642 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLsX-0006sH-8O for patch@linaro.org; Wed, 19 May 2021 09:04:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33206) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgl-0000ng-O8; Wed, 19 May 2021 08:52:41 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:39421 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgh-0001ED-Qs; Wed, 19 May 2021 08:52:38 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnc6cqGz9sxS; Wed, 19 May 2021 22:52:04 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428724; bh=FzhpfnsG8zVulwkWbQDPAqH2EUbJv3lkHvgZSaQR6Ok=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MHtY5JwcEz2Cq5PYMOvL8AIpqg2Wg8c3+gVNleh8l+hbWK7bFbm4YI6oefrls19BI 3iRRwTuB+MIlwJKGAyWgqX8+2NadEb3X/+tdzMFgIAd0+eUwofgTwhdWPI8fSWjt6u NMp4cWqaQWMW3i9tjRWMU9T/HQfwL4kDYG2jPvXg= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 16/48] target/ppc: Add cia field to DisasContext Date: Wed, 19 May 2021 22:51:16 +1000 Message-Id: <20210519125148.27720-17-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org, Luis Pires , qemu-ppc@nongnu.org, Bruno Larsen , Matheus Ferst , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Bruno Larsen (billionai) Reviewed-by: Luis Pires Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-2-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 36 +++++++++++++++++++----------------- 1 file changed, 19 insertions(+), 17 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 6c68d7006a..abdef7e291 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -157,6 +157,7 @@ void ppc_translate_init(void) /* internal defines */ struct DisasContext { DisasContextBase base; + target_ulong cia; /* current instruction address */ uint32_t opcode; uint32_t exception; /* Routine used to access memory */ @@ -256,7 +257,7 @@ static void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t error) * faulting instruction */ if (ctx->exception == POWERPC_EXCP_NONE) { - gen_update_nip(ctx, ctx->base.pc_next - 4); + gen_update_nip(ctx, ctx->cia); } t0 = tcg_const_i32(excp); t1 = tcg_const_i32(error); @@ -275,7 +276,7 @@ static void gen_exception(DisasContext *ctx, uint32_t excp) * faulting instruction */ if (ctx->exception == POWERPC_EXCP_NONE) { - gen_update_nip(ctx, ctx->base.pc_next - 4); + gen_update_nip(ctx, ctx->cia); } t0 = tcg_const_i32(excp); gen_helper_raise_exception(cpu_env, t0); @@ -4137,7 +4138,7 @@ static void gen_eieio(DisasContext *ctx) */ if (!(ctx->insns_flags2 & PPC2_ISA300)) { qemu_log_mask(LOG_GUEST_ERROR, "invalid eieio using bit 6 at @" - TARGET_FMT_lx "\n", ctx->base.pc_next - 4); + TARGET_FMT_lx "\n", ctx->cia); } else { bar = TCG_MO_ST_LD; } @@ -4806,14 +4807,14 @@ static void gen_b(DisasContext *ctx) li = LI(ctx->opcode); li = (li ^ 0x02000000) - 0x02000000; if (likely(AA(ctx->opcode) == 0)) { - target = ctx->base.pc_next + li - 4; + target = ctx->cia + li; } else { target = li; } if (LK(ctx->opcode)) { gen_setlr(ctx, ctx->base.pc_next); } - gen_update_cfar(ctx, ctx->base.pc_next - 4); + gen_update_cfar(ctx, ctx->cia); gen_goto_tb(ctx, 0, target); } @@ -4912,11 +4913,11 @@ static void gen_bcond(DisasContext *ctx, int type) } tcg_temp_free_i32(temp); } - gen_update_cfar(ctx, ctx->base.pc_next - 4); + gen_update_cfar(ctx, ctx->cia); if (type == BCOND_IM) { target_ulong li = (target_long)((int16_t)(BD(ctx->opcode))); if (likely(AA(ctx->opcode) == 0)) { - gen_goto_tb(ctx, 0, ctx->base.pc_next + li - 4); + gen_goto_tb(ctx, 0, ctx->cia + li); } else { gen_goto_tb(ctx, 0, li); } @@ -5032,7 +5033,7 @@ static void gen_rfi(DisasContext *ctx) if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_start(); } - gen_update_cfar(ctx, ctx->base.pc_next - 4); + gen_update_cfar(ctx, ctx->cia); gen_helper_rfi(cpu_env); gen_sync_exception(ctx); #endif @@ -5049,7 +5050,7 @@ static void gen_rfid(DisasContext *ctx) if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_start(); } - gen_update_cfar(ctx, ctx->base.pc_next - 4); + gen_update_cfar(ctx, ctx->cia); gen_helper_rfid(cpu_env); gen_sync_exception(ctx); #endif @@ -5066,7 +5067,7 @@ static void gen_rfscv(DisasContext *ctx) if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_start(); } - gen_update_cfar(ctx, ctx->base.pc_next - 4); + gen_update_cfar(ctx, ctx->cia); gen_helper_rfscv(cpu_env); gen_sync_exception(ctx); #endif @@ -5109,7 +5110,7 @@ static void gen_scv(DisasContext *ctx) /* Set the PC back to the faulting instruction. */ if (ctx->exception == POWERPC_EXCP_NONE) { - gen_update_nip(ctx, ctx->base.pc_next - 4); + gen_update_nip(ctx, ctx->cia); } gen_helper_scv(cpu_env, tcg_constant_i32(lev)); @@ -5317,7 +5318,7 @@ static inline void gen_op_mfspr(DisasContext *ctx) if (sprn != SPR_PVR) { qemu_log_mask(LOG_GUEST_ERROR, "Trying to read privileged spr " "%d (0x%03x) at " TARGET_FMT_lx "\n", sprn, sprn, - ctx->base.pc_next - 4); + ctx->cia); } gen_priv_exception(ctx, POWERPC_EXCP_PRIV_REG); } @@ -5331,7 +5332,7 @@ static inline void gen_op_mfspr(DisasContext *ctx) /* Not defined */ qemu_log_mask(LOG_GUEST_ERROR, "Trying to read invalid spr %d (0x%03x) at " - TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4); + TARGET_FMT_lx "\n", sprn, sprn, ctx->cia); /* * The behaviour depends on MSR:PR and SPR# bit 0x10, it can @@ -5495,7 +5496,7 @@ static void gen_mtspr(DisasContext *ctx) /* Privilege exception */ qemu_log_mask(LOG_GUEST_ERROR, "Trying to write privileged spr " "%d (0x%03x) at " TARGET_FMT_lx "\n", sprn, sprn, - ctx->base.pc_next - 4); + ctx->cia); gen_priv_exception(ctx, POWERPC_EXCP_PRIV_REG); } } else { @@ -5509,7 +5510,7 @@ static void gen_mtspr(DisasContext *ctx) /* Not defined */ qemu_log_mask(LOG_GUEST_ERROR, "Trying to write invalid spr %d (0x%03x) at " - TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4); + TARGET_FMT_lx "\n", sprn, sprn, ctx->cia); /* @@ -9148,6 +9149,7 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n", ctx->base.pc_next, ctx->mem_idx, (int)msr_ir); + ctx->cia = ctx->base.pc_next; ctx->opcode = translator_ldl_swap(env, ctx->base.pc_next, need_byteswap(ctx)); @@ -9177,7 +9179,7 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) TARGET_FMT_lx " %d\n", opc1(ctx->opcode), opc2(ctx->opcode), opc3(ctx->opcode), opc4(ctx->opcode), - ctx->opcode, ctx->base.pc_next - 4, (int)msr_ir); + ctx->opcode, ctx->cia, (int)msr_ir); } else { uint32_t inval; @@ -9194,7 +9196,7 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) TARGET_FMT_lx "\n", ctx->opcode & inval, opc1(ctx->opcode), opc2(ctx->opcode), opc3(ctx->opcode), opc4(ctx->opcode), - ctx->opcode, ctx->base.pc_next - 4); + ctx->opcode, ctx->cia); gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); ctx->base.is_jmp = DISAS_NORETURN; return; From patchwork Wed May 19 12:51:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442402 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1305240jac; 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[209.51.188.17]) by mx.google.com with ESMTPS id n3si30723314ioh.98.2021.05.19.06.09.12 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:09:12 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=SHEisfKb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:43860 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLwl-00070h-N2 for patch@linaro.org; Wed, 19 May 2021 09:09:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33204) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgl-0000nW-Nt; Wed, 19 May 2021 08:52:41 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:38703) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgh-0001Eh-Pl; Wed, 19 May 2021 08:52:38 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnd2gh3z9t0G; Wed, 19 May 2021 22:52:05 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428725; bh=ybLxUFWCZnNn3UfoPCjH3zvWc/PUDjOMEzazDlxW048=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SHEisfKbhS56ZpDWGnYbsvUvqR7620d92WLyQdTICibMoUn15FFiJENUokPsdxL5F Nc5uxFTx7d1U0uG/ipFlpBUWhapgVHHqD1dEdwktLHzOxAd1gk4btlhtpxJhOaYjk0 9cNWug4mZPUDwTSV9TlZGciYlBueJ6DY5SbGIDXg= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 17/48] target/ppc: Split out decode_legacy Date: Wed, 19 May 2021 22:51:17 +1000 Message-Id: <20210519125148.27720-18-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org, Luis Pires , qemu-ppc@nongnu.org, Matheus Ferst , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Luis Pires Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-3-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 115 +++++++++++++++++++++++------------------ 1 file changed, 64 insertions(+), 51 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index abdef7e291..d6a8a04380 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -9062,6 +9062,62 @@ void ppc_cpu_dump_statistics(CPUState *cs, int flags) #endif } +static bool decode_legacy(PowerPCCPU *cpu, DisasContext *ctx, uint32_t insn) +{ + opc_handler_t **table, *handler; + uint32_t inval; + + ctx->opcode = insn; + + LOG_DISAS("translate opcode %08x (%02x %02x %02x %02x) (%s)\n", + insn, opc1(insn), opc2(insn), opc3(insn), opc4(insn), + ctx->le_mode ? "little" : "big"); + + table = cpu->opcodes; + handler = table[opc1(insn)]; + if (is_indirect_opcode(handler)) { + table = ind_table(handler); + handler = table[opc2(insn)]; + if (is_indirect_opcode(handler)) { + table = ind_table(handler); + handler = table[opc3(insn)]; + if (is_indirect_opcode(handler)) { + table = ind_table(handler); + handler = table[opc4(insn)]; + } + } + } + + /* Is opcode *REALLY* valid ? */ + if (unlikely(handler->handler == &gen_invalid)) { + qemu_log_mask(LOG_GUEST_ERROR, "invalid/unsupported opcode: " + "%02x - %02x - %02x - %02x (%08x) " + TARGET_FMT_lx "\n", + opc1(insn), opc2(insn), opc3(insn), opc4(insn), + insn, ctx->cia); + return false; + } + + if (unlikely(handler->type & (PPC_SPE | PPC_SPE_SINGLE | PPC_SPE_DOUBLE) + && Rc(insn))) { + inval = handler->inval2; + } else { + inval = handler->inval1; + } + + if (unlikely((insn & inval) != 0)) { + qemu_log_mask(LOG_GUEST_ERROR, "invalid bits: %08x for opcode: " + "%02x - %02x - %02x - %02x (%08x) " + TARGET_FMT_lx "\n", insn & inval, + opc1(insn), opc2(insn), opc3(insn), opc4(insn), + insn, ctx->cia); + return false; + } + + handler->handler(ctx); + return true; +} + static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); @@ -9143,66 +9199,23 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) DisasContext *ctx = container_of(dcbase, DisasContext, base); PowerPCCPU *cpu = POWERPC_CPU(cs); CPUPPCState *env = cs->env_ptr; - opc_handler_t **table, *handler; + uint32_t insn; + bool ok; LOG_DISAS("----------------\n"); LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n", ctx->base.pc_next, ctx->mem_idx, (int)msr_ir); ctx->cia = ctx->base.pc_next; - ctx->opcode = translator_ldl_swap(env, ctx->base.pc_next, - need_byteswap(ctx)); - - LOG_DISAS("translate opcode %08x (%02x %02x %02x %02x) (%s)\n", - ctx->opcode, opc1(ctx->opcode), opc2(ctx->opcode), - opc3(ctx->opcode), opc4(ctx->opcode), - ctx->le_mode ? "little" : "big"); + insn = translator_ldl_swap(env, ctx->base.pc_next, need_byteswap(ctx)); ctx->base.pc_next += 4; - table = cpu->opcodes; - handler = table[opc1(ctx->opcode)]; - if (is_indirect_opcode(handler)) { - table = ind_table(handler); - handler = table[opc2(ctx->opcode)]; - if (is_indirect_opcode(handler)) { - table = ind_table(handler); - handler = table[opc3(ctx->opcode)]; - if (is_indirect_opcode(handler)) { - table = ind_table(handler); - handler = table[opc4(ctx->opcode)]; - } - } - } - /* Is opcode *REALLY* valid ? */ - if (unlikely(handler->handler == &gen_invalid)) { - qemu_log_mask(LOG_GUEST_ERROR, "invalid/unsupported opcode: " - "%02x - %02x - %02x - %02x (%08x) " - TARGET_FMT_lx " %d\n", - opc1(ctx->opcode), opc2(ctx->opcode), - opc3(ctx->opcode), opc4(ctx->opcode), - ctx->opcode, ctx->cia, (int)msr_ir); - } else { - uint32_t inval; - if (unlikely(handler->type & (PPC_SPE | PPC_SPE_SINGLE | PPC_SPE_DOUBLE) - && Rc(ctx->opcode))) { - inval = handler->inval2; - } else { - inval = handler->inval1; - } - - if (unlikely((ctx->opcode & inval) != 0)) { - qemu_log_mask(LOG_GUEST_ERROR, "invalid bits: %08x for opcode: " - "%02x - %02x - %02x - %02x (%08x) " - TARGET_FMT_lx "\n", ctx->opcode & inval, - opc1(ctx->opcode), opc2(ctx->opcode), - opc3(ctx->opcode), opc4(ctx->opcode), - ctx->opcode, ctx->cia); - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); - ctx->base.is_jmp = DISAS_NORETURN; - return; - } + ok = decode_legacy(cpu, ctx, insn); + if (!ok) { + gen_invalid(ctx); + ctx->base.is_jmp = DISAS_NORETURN; } - (*(handler->handler))(ctx); + #if defined(DO_PPC_STATISTICS) handler->count++; #endif From patchwork Wed May 19 12:51:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442407 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1308259jac; Wed, 19 May 2021 06:12:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwBIliA3JefKLFi0ELiCU3sK8M8dK2iVzJVOO78f7zx76dA6YK8Xzaq7jz42N5qicgj5n/C X-Received: by 2002:a05:6e02:547:: with SMTP id i7mr1793196ils.281.1621429939450; Wed, 19 May 2021 06:12:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621429939; cv=none; d=google.com; s=arc-20160816; b=YZIqaUsEXN4hy3pAtvLoIFlX+L61cIL4J2V3kg7QUjUd2BBTOr1sDZFXikOTvS6LJj Lb6QBzaMAOt1MdyIYSiAvX9S8DYHMeJzyWxNRWnvGaH9eW67CybWr7SS6xI698g8n/m0 KeKcBxpPOa19AT7OX9f1gIYCSFoU2NN7LxeanIyscEMLBlFp4hRQryG97JDh4RPC1qIR 8WoHA0vZy63Oc04x7hKzfyrlAqgSLoXirV/Fe7KPyzLYWwNTC8zssDNMgAaJUnsniXu2 4voIC3DVPha7nDRHFyCMciswHWRhBjNthy4jXN1PgOBbOuLVRUkmI0nB5M0aEy1sowrB 3A5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=wzclvABPdWRClsn9nAXiEBmCC4Vcz1c4vBNkNXuD5w0=; b=igHFrCnHGwuGJIQxHTW54dt5LvcUxG+y3eSCP1MjQ9JiiA+CzzH7zmQ2/MaULtpiy4 3k1hqjbrEQZuL9c+1HInReY180qPGxDsRhboSZ+gJgZjMuzB/hAk5U8+mUwhcTNTwwgo ZVSIIoxUoDX99AcQFsMJp+xlDBbaxKozqzjZCQo6k0GtB7YT2KCUJQEPLsrnIF1Mh5Hj 344R4LLAsmHamxSl23ji1cp1/oD2xKH0wddDESh3pI1gnZeDgyRUnd0Z7Vqi/Kf//y4g i+KsIxa28ZSHZDwZSkXzfvqC04xgfElKhK1M3DIOfpXoW+fGtPbJZgLeCSlxIY4ny96E EfUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=gqpRfAV2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id p14si19272857jao.86.2021.05.19.06.12.19 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:12:19 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=gqpRfAV2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:53572 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLzm-00057U-TF for patch@linaro.org; Wed, 19 May 2021 09:12:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33276) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgt-0000tQ-EK; Wed, 19 May 2021 08:52:47 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:33637) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgl-0001Fh-S6; Wed, 19 May 2021 08:52:42 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnd65Rnz9t0T; Wed, 19 May 2021 22:52:05 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428725; bh=YepioIO6fM+22aWQNVJNN/CrWq02C6DWs1hzecs1a84=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gqpRfAV2JQ1LBZCCvgl9BFAj8BM/+Zbc6k1/IAWVzOvvSduQQna1hlEBjxanlHuxO Qm/PO4C/6yYrVT8p/tUvZdGq1MwgP5DrOgtHSFUlE5/VS9zMAl48HlUuTUa+BVIAWd GW4MinpqwFf/cnaGot7yXVlTzLb4e5a+2PeV04HA= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 18/48] target/ppc: Move DISAS_NORETURN setting into gen_exception* Date: Wed, 19 May 2021 22:51:18 +1000 Message-Id: <20210519125148.27720-19-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org, Luis Pires , qemu-ppc@nongnu.org, Matheus Ferst , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson There are other valid settings for is_jmp besides DISAS_NEXT and DISAS_NORETURN, so eliminating that dichotomy from ppc_tr_translate_insn is helpful. Signed-off-by: Richard Henderson Reviewed-by: Luis Pires Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-4-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d6a8a04380..ac0c0e5b2c 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -264,7 +264,8 @@ static void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t error) gen_helper_raise_exception_err(cpu_env, t0, t1); tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); - ctx->exception = (excp); + ctx->exception = excp; + ctx->base.is_jmp = DISAS_NORETURN; } static void gen_exception(DisasContext *ctx, uint32_t excp) @@ -281,7 +282,8 @@ static void gen_exception(DisasContext *ctx, uint32_t excp) t0 = tcg_const_i32(excp); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); - ctx->exception = (excp); + ctx->exception = excp; + ctx->base.is_jmp = DISAS_NORETURN; } static void gen_exception_nip(DisasContext *ctx, uint32_t excp, @@ -293,7 +295,8 @@ static void gen_exception_nip(DisasContext *ctx, uint32_t excp, t0 = tcg_const_i32(excp); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); - ctx->exception = (excp); + ctx->exception = excp; + ctx->base.is_jmp = DISAS_NORETURN; } /* @@ -339,6 +342,7 @@ static void gen_debug_exception(DisasContext *ctx) t0 = tcg_const_i32(EXCP_DEBUG); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); + ctx->base.is_jmp = DISAS_NORETURN; } static inline void gen_inval_exception(DisasContext *ctx, uint32_t error) @@ -9183,7 +9187,6 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, DisasContext *ctx = container_of(dcbase, DisasContext, base); gen_debug_exception(ctx); - dcbase->is_jmp = DISAS_NORETURN; /* * The address covered by the breakpoint must be included in * [tb->pc, tb->pc + tb->size) in order to for it to be properly @@ -9213,18 +9216,19 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) ok = decode_legacy(cpu, ctx, insn); if (!ok) { gen_invalid(ctx); - ctx->base.is_jmp = DISAS_NORETURN; } #if defined(DO_PPC_STATISTICS) handler->count++; #endif + /* Check trace mode exceptions */ if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && ctx->exception != POWERPC_SYSCALL && ctx->exception != POWERPC_EXCP_TRAP && - ctx->exception != POWERPC_EXCP_BRANCH)) { + ctx->exception != POWERPC_EXCP_BRANCH && + ctx->base.is_jmp != DISAS_NORETURN)) { uint32_t excp = gen_prep_dbgex(ctx); gen_exception_nip(ctx, excp, ctx->base.pc_next); } @@ -9235,14 +9239,20 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) opc3(ctx->opcode), opc4(ctx->opcode), ctx->opcode); } - ctx->base.is_jmp = ctx->exception == POWERPC_EXCP_NONE ? - DISAS_NEXT : DISAS_NORETURN; + if (ctx->base.is_jmp == DISAS_NEXT + && ctx->exception != POWERPC_EXCP_NONE) { + ctx->base.is_jmp = DISAS_TOO_MANY; + } } static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); + if (ctx->base.is_jmp == DISAS_NORETURN) { + return; + } + if (ctx->exception == POWERPC_EXCP_NONE) { gen_goto_tb(ctx, 0, ctx->base.pc_next); } else if (ctx->exception != POWERPC_EXCP_BRANCH) { From patchwork Wed May 19 12:51:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442401 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1304812jac; Wed, 19 May 2021 06:08:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyd1FB0aQr5VMPE/HrKXRjdKyNpEw4Zw2Jfip6mL8uVJSmFrHa8FnTXe3CFd3w7Aq3zEi0Z X-Received: by 2002:a5d:8516:: with SMTP id q22mr9985200ion.173.1621429722571; Wed, 19 May 2021 06:08:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621429722; cv=none; d=google.com; s=arc-20160816; b=MGE/Or+nP/G2HeuS7CwsX1b3z4v8Fm/n2XVMDAAzQgaVHt0waJ4FFYGCFAhOSzKhrk 9S9Y5lL7DYZ1ufAwvjgzaI63QME+a9Ej/QxCPz1Yf2nbjA0skc5ViCNyUecsMd+WPcPz 62jlsqqVN9QF2l2M9SmCsMPl7wLq9zLKKbAGwedT2GnuSZQ0ZnSqIP/9+BNXVXVjp+Wx kv0LmwbP95IY/21HnkHDijv4EQ8J4BqhzC107vyib68QsbiO4xxKEqb61Z8zRMdPTQkV JTqFSS5gdPWNEKQC9M5llxOjwgfyS+mdtM4xdURayGMQJ1m7Q11Y49E71u+oOdR7TJe+ WLsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=63DKpspcILEj2mUUxilePT89Le5TKZMjEC+Wa5ke+8M=; b=feUgHDEpEyDKMajsIj2CPn6GlbY/ln/l5ZEC0JVsf8Sl2zJRR8EUGgcX3A5cR9nq1T b5fhq7OsxxL+MdrxKgEl+JCrciEoD/K8eLYYUPjsFeRLYigVFUGD9dLJgKy2R0WdvQ8A e6BgL860dlQQsYm3WT3FIFOL6zw/oDwTNQH+qEGx0oUc2H2QwDIHa3CrWLkt3euggC9O TG5R+ThPTu4jxXLhfp7ytWF1198l6oA52OQlcWzl+OPOq5jkLOOyg0uTp3lxPHXBgvWf bAdxeCaiB7xoOdFFps2VQKs8zQQIU1ai6XKL6RZUUIUfWYBJ4ZJBwunL1pWma3eXRinO LTXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b="f/VeYfmP"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o5si6073772ill.66.2021.05.19.06.08.42 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:08:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b="f/VeYfmP"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:41806 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLwH-0005cK-UU for patch@linaro.org; Wed, 19 May 2021 09:08:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33280) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgt-0000te-Fj; Wed, 19 May 2021 08:52:47 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:39709) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgl-0001Fj-Rf; Wed, 19 May 2021 08:52:43 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnf1ksSz9t0Y; Wed, 19 May 2021 22:52:06 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428726; bh=1qq2Mawzr6KV3EhLLOeymzMmFvoWBKz70OCiWQZZgJ0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=f/VeYfmPvDQP+bhePTQP2TP6BSG8oMAGjOCRLuaDe+XDwPqesMS5vtHZtZCVG1zCd b5A5l/jRsjzKpH5Z0puAryyinFyOdU1rq3f8GKPE5tQhgPhVQkyJOvdxJrf+e0QGXq EWstNIdDMAYnFvyggo2uouavUacXD8ceNb2JFkD4= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 19/48] target/ppc: Remove special case for POWERPC_SYSCALL Date: Wed, 19 May 2021 22:51:19 +1000 Message-Id: <20210519125148.27720-20-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, TVD_SUBJ_WIPE_DEBT=1.004 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org, Luis Pires , qemu-ppc@nongnu.org, Matheus Ferst , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Since POWERPC_SYSCALL is raised by gen_exception_err, we will have also set DISAS_NORETURN. Signed-off-by: Richard Henderson Reviewed-by: Luis Pires Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-5-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 1 - 1 file changed, 1 deletion(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index ac0c0e5b2c..18f581e495 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -9225,7 +9225,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) /* Check trace mode exceptions */ if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && - ctx->exception != POWERPC_SYSCALL && ctx->exception != POWERPC_EXCP_TRAP && ctx->exception != POWERPC_EXCP_BRANCH && ctx->base.is_jmp != DISAS_NORETURN)) { From patchwork Wed May 19 12:51:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442400 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1302478jac; Wed, 19 May 2021 06:06:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyY2hoSa4ZZfq50DSPiiyEfQ3PB2Vfh2LCCO9a34iQVIGSfjHyd150gVCfqMwYZJ1FGeXKC X-Received: by 2002:a05:6e02:caf:: with SMTP id 15mr7981465ilg.3.1621429573064; Wed, 19 May 2021 06:06:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621429573; cv=none; d=google.com; s=arc-20160816; b=0xSyG+TI7p0jzyng5n7T2JSUnzTCweKV/goWaUrEFKH3vzd3c0ikdaxVS5SNiK/QMi tcbRl0cB65ehVgcFoU1dE6uTwGBbEt0yE70BQvxGRMoCv59bMTFAv7Dd3/ByOLWCeiIS UQWe1zJmI0REk5/6Uh6Sfa9dcb0+6oesdnmOoq+hwGPaQK4YNwVaDeMfHvdxlZvPGgyq VvfsybV6mU/LA2qBB5fHZFL+paX729aPw45bmavxCtetZyTg3YGIlDdz75bq02+YWCp/ NvBrOFKRAy/b1fz9q9+IE56Rt0JgrmdfEKnrhkU33QW4wisO1umkNI8E4QoGPAGqDLgy pEwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=CMnPHZUSfTswOX4WBY2MEwWsP5aNeKJMKkwoyOKiI8U=; b=sZVb1884XgevSq0tS4NQyGVITkMQoewTJDrgRyefSwtFU9nfm6AjOYuGY7eKI6LHCS o9PZLwQl19ACNCmeDgaq1XpHIp5t3nGDM8yDLHaEg+F5mPDytHUQ8/WbA4INlCaJvwld wLBZa8Lf9BI/aI505hDqUZZ8GB1jk8CzgjUNJ94QCSym0t72Qk/5r8K7UQENyCsEr4QD V0ErVL8WmLVYbLvClzFTtZfH0vkLgmTgmLepm4HJLUpMKRT9a87uJY2nF46GjUQF5QQy 6gzDnZWa3TRj8qNrF0vEHKc4eahmUxzlabZ5bYpR333xY4fYAuzBAH8sXM/M1lrcQjQ1 zCgA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=KOB2BU41; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t15si27348569jal.57.2021.05.19.06.06.13 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:06:13 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=KOB2BU41; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:35558 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLts-0001Lf-HV for patch@linaro.org; Wed, 19 May 2021 09:06:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33278) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgt-0000tU-FN; Wed, 19 May 2021 08:52:47 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:58767 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgl-0001FQ-QH; Wed, 19 May 2021 08:52:42 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnf5xcbz9t0k; Wed, 19 May 2021 22:52:06 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428726; bh=NBMnjqZ/xpl6gB1P2IE3gJJo99S1X1o/Lz1YdkFZp+A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KOB2BU414rTSgKs191tewlUzz9ZzGVgojwc5LloQYtwT9NpqxUAVL3dAXsW3M1Ik2 u6BLGdKZY+mcIK2fJBtCF0kKyMqDy4RmKajY8EeJit5YNj9LnVR4Zu2JbRIjZXkrLd gZiBq1aGn248dWH5uxkDoUhEOd2vphnuQP5nPGRw= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 20/48] target/ppc: Remove special case for POWERPC_EXCP_TRAP Date: Wed, 19 May 2021 22:51:20 +1000 Message-Id: <20210519125148.27720-21-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, TVD_SUBJ_WIPE_DEBT=1.004 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org, Luis Pires , qemu-ppc@nongnu.org, Matheus Ferst , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Since POWERPC_EXCP_TRAP is raised by gen_exception_err, we will have also set DISAS_NORETURN. Signed-off-by: Richard Henderson Reviewed-by: Luis Pires Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-6-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 1 - 1 file changed, 1 deletion(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 18f581e495..9626bea9d5 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -9225,7 +9225,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) /* Check trace mode exceptions */ if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && - ctx->exception != POWERPC_EXCP_TRAP && ctx->exception != POWERPC_EXCP_BRANCH && ctx->base.is_jmp != DISAS_NORETURN)) { uint32_t excp = gen_prep_dbgex(ctx); From patchwork Wed May 19 12:51:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442405 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1307018jac; Wed, 19 May 2021 06:11:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJximCjZbe5wWKKglL/SCidM8nTXpQaZaUNsoJaS4WVnlHly9nl4ZrsIACgmmAwSvn/Olvs8 X-Received: by 2002:a05:6e02:2188:: with SMTP id j8mr10946382ila.194.1621429864640; Wed, 19 May 2021 06:11:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621429864; cv=none; d=google.com; s=arc-20160816; b=kFABddL4BLD+vJKz9z4VS+q4IzTe5LAQVS9ZI2Jyuf9xDpVEFNxMoNDvjCWGJdJKfL 3Ur+vRMzr44KvPhxuyFxkVVSauayWLjyCGgPFVh4waq9cZapJlJypTt04zg1SW0OL6rK BibyFAQKnyXE8QQfF6xwali1fdwaBlOwn0kLZy4qw4k4tgQmQwOpFmv6agTCj3EidXrd DTtDhDh+MpwHzVHSPS/iISM+aDvoMSI16GcZVkw0etnyHha6SyCNG6QpDo2qrRr2EBq8 3hYojPqbo0zZLE3objeAUEWMl4BDVxtzUVVZrnol1Et3IR6t0CVCTUfZ+DgBrH/xpNhR +D+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=FhD9xH+eaSb1eTiC/gEyyq2TNL7/3+S16TaU8thVlmU=; b=qrI6vbjY7EJsnc1u9JAA1jOXvNn5LOr+cSGnbHY6wOVSDbhvQjBCZiPZwON35NDJvk 3fzQsJDCW4uPDH1X8IinhFaWrdBsryqmpnu6THHSmUwfONm8FoN0N24ANXNcE8M4SW/q fLpjERH4QLyajK1S+GrLM5NGSauv73SPMYyItNhxlWFWuzKPtEMzxsjE1yBz5cAsxFdL 8z8df8eKIuWMXIvEEQNFMO27NH0GTxqdKCpw3fNEljCq8/0USc9WJaXueNgVZ3YdeYnC N9JSjSFYXTP4pQmzDSG28ewE4iiAX42A1AZdgpq7fPLJoz357ZVTgrVRxzSgx4EUU0pu c4vg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=FBXDgAb5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t1si24956008jap.32.2021.05.19.06.11.04 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:11:04 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=FBXDgAb5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:51250 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLya-0003Sw-04 for patch@linaro.org; Wed, 19 May 2021 09:11:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33298) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgu-0000yr-R9; Wed, 19 May 2021 08:52:48 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:58367 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgn-0001GV-Qr; Wed, 19 May 2021 08:52:48 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXng1mDBz9t0p; Wed, 19 May 2021 22:52:07 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428727; bh=Xdw8XgkaWEWnfimzMa+ytAFrW3h36v/oUVgJ6xgTHHs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FBXDgAb5mt+BhlLZdDVYfjZ23aEvbiyFgkUmcXN2FwagZZI/J6v27Tu6zIKuo/E3l dO9QzhCMujJAq9I+icQlF7ZfyH7joDshZWDMqQbcjGopslEcgQlrEVLFraTKTjBHx/ DdpqgQSQfRp668q8sCA2Lg2LBVne2uzG/arNyRqw= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 21/48] target/ppc: Simplify gen_debug_exception Date: Wed, 19 May 2021 22:51:21 +1000 Message-Id: <20210519125148.27720-22-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Two of the call sites that use gen_debug_exception have already updated NIP. Only ppc_tr_breakpoint_check requires the update. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-7-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 9626bea9d5..5590a93ad5 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -329,19 +329,7 @@ static uint32_t gen_prep_dbgex(DisasContext *ctx) static void gen_debug_exception(DisasContext *ctx) { - TCGv_i32 t0; - - /* - * These are all synchronous exceptions, we set the PC back to the - * faulting instruction - */ - if ((ctx->exception != POWERPC_EXCP_BRANCH) && - (ctx->exception != POWERPC_EXCP_SYNC)) { - gen_update_nip(ctx, ctx->base.pc_next); - } - t0 = tcg_const_i32(EXCP_DEBUG); - gen_helper_raise_exception(cpu_env, t0); - tcg_temp_free_i32(t0); + gen_helper_raise_exception(cpu_env, tcg_constant_i32(EXCP_DEBUG)); ctx->base.is_jmp = DISAS_NORETURN; } @@ -9186,6 +9174,7 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, { DisasContext *ctx = container_of(dcbase, DisasContext, base); + gen_update_nip(ctx, ctx->base.pc_next); gen_debug_exception(ctx); /* * The address covered by the breakpoint must be included in From patchwork Wed May 19 12:51:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442403 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1305473jac; Wed, 19 May 2021 06:09:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy7ss3c+Gf2fuove4N92qkVcuXs898fjPy5I8N71OhJ85VCN4XbxoIAMt2uiY2qYiIOl+rf X-Received: by 2002:a05:6e02:92a:: with SMTP id o10mr10608884ilt.270.1621429767422; Wed, 19 May 2021 06:09:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621429767; cv=none; d=google.com; s=arc-20160816; b=aW50UnmFe1SqQ5YpBzw0QdSRultPMT3nSe2GbiWGKUwCzR9a0GyssW74fZEiIRDneB DK/h/S0VzSPFltiwglXr1Rjb+ZLbxr3Zo8I2qWMD+UnP3i2bOOCsGMWud0MKCPmB+8Po 5SgJL3ht7PaWS2LT/f0bR0B/Ap1liwORN4FsVJ8hnDOKVfUp5+0DSgznxu08HddL+3Ks KnW1xs0JSdBxhd09ITr0n3r1RFtxYt1055n941KnPZ9Ou+9swLvPThoZ/LV0ogICp/Xi fmrvtmAqmDeg2zk/X8ciE1GhbWM0aS3BEILwSXwjypSsOFY6Fhc0uRNCRX/iQ0kFmVpX vbqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=QMNfG6lcCChKNmPA2MyN+9YQHocijoh7XX4bP3fhmuU=; b=PfIDk93LD+H1uppPr7fP4DeCMehTeoO+Kuqu5AeD4dyqd8qrgNQxR6lKFF2crN7lai FS+O8vpi0bnK7AMPMAFIZaZVtwU+dEF5I1kohdDAUKKqiY14SywqMs1OeJwGoRvjICNj u9A4kTEhXP9zN8gxLw5+4pTvXppfSDn4GT0eplgZvxNwRe8xzzW1K2ZkNR6E6OQfzL68 vbMYSqk1WMmMKDOhMXH48SdiqJ5HJA231/iTFaU/9yM4LAqx4Bp9lxp0GKlhepRiXYF/ XDQ2Q3fZ7spAx0BBT9ukW29yjEDquT0B1T1+YXrT+Sq/UfB8GhBSlRcpR4Oo6T12F200 tDHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=YDfCL1z1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x2si26394805iom.61.2021.05.19.06.09.27 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:09:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=YDfCL1z1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:44822 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLx0-0007da-OM for patch@linaro.org; Wed, 19 May 2021 09:09:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33332) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgv-00013f-VJ; Wed, 19 May 2021 08:52:49 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:41919 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgo-0001Hi-8i; Wed, 19 May 2021 08:52:49 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXng45kdz9t10; Wed, 19 May 2021 22:52:07 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428727; bh=uNWtWZMeGVAzANT243kMUW21wxxT7EYTMKvQONb/t3U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YDfCL1z1YBx7fQ8uZ6GZqDAOSFroN2mbUgHrUg3wJsL9Vlq0WenYKw4psjGDbrKUp RiMeETKPBXYLkdD95/6p2sKtV4ir/s5hWWyfXT2+55gHHv8uV2kVS65Pl6I25Tnu+q 3b/GY45/go3nlz+5DrHvNXi1BJSWvg6xAxmHDsbU= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 22/48] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE} Date: Wed, 19 May 2021 22:51:22 +1000 Message-Id: <20210519125148.27720-23-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Rewrite ppc_tr_tb_stop to handle these new codes. Convert ctx->exception into these new codes at the end of ppc_tr_translate_insn, prior to pushing the change back throughout translate.c. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-8-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 75 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 65 insertions(+), 10 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 5590a93ad5..c879b47dc6 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -185,6 +185,11 @@ struct DisasContext { uint64_t insns_flags2; }; +#define DISAS_EXIT DISAS_TARGET_0 /* exit to main loop, pc updated */ +#define DISAS_EXIT_UPDATE DISAS_TARGET_1 /* exit to main loop, pc stale */ +#define DISAS_CHAIN DISAS_TARGET_2 /* lookup next tb, pc updated */ +#define DISAS_CHAIN_UPDATE DISAS_TARGET_3 /* lookup next tb, pc stale */ + /* Return true iff byteswap is needed in a scalar memop */ static inline bool need_byteswap(const DisasContext *ctx) { @@ -9226,28 +9231,78 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) opc3(ctx->opcode), opc4(ctx->opcode), ctx->opcode); } - if (ctx->base.is_jmp == DISAS_NEXT - && ctx->exception != POWERPC_EXCP_NONE) { - ctx->base.is_jmp = DISAS_TOO_MANY; + if (ctx->base.is_jmp == DISAS_NEXT) { + switch (ctx->exception) { + case POWERPC_EXCP_NONE: + break; + case POWERPC_EXCP_BRANCH: + ctx->base.is_jmp = DISAS_NORETURN; + break; + case POWERPC_EXCP_SYNC: + case POWERPC_EXCP_STOP: + ctx->base.is_jmp = DISAS_EXIT; + break; + default: + /* Every other ctx->exception should have set NORETURN. */ + g_assert_not_reached(); + } } } static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); + DisasJumpType is_jmp = ctx->base.is_jmp; + target_ulong nip = ctx->base.pc_next; - if (ctx->base.is_jmp == DISAS_NORETURN) { + if (is_jmp == DISAS_NORETURN) { + /* We have already exited the TB. */ return; } - if (ctx->exception == POWERPC_EXCP_NONE) { - gen_goto_tb(ctx, 0, ctx->base.pc_next); - } else if (ctx->exception != POWERPC_EXCP_BRANCH) { - if (unlikely(ctx->base.singlestep_enabled)) { - gen_debug_exception(ctx); + /* Honor single stepping. */ + if (unlikely(ctx->base.singlestep_enabled)) { + switch (is_jmp) { + case DISAS_TOO_MANY: + case DISAS_EXIT_UPDATE: + case DISAS_CHAIN_UPDATE: + gen_update_nip(ctx, nip); + break; + case DISAS_EXIT: + case DISAS_CHAIN: + break; + default: + g_assert_not_reached(); } - /* Generate the return instruction */ + gen_debug_exception(ctx); + return; + } + + switch (is_jmp) { + case DISAS_TOO_MANY: + if (use_goto_tb(ctx, nip)) { + tcg_gen_goto_tb(0); + gen_update_nip(ctx, nip); + tcg_gen_exit_tb(ctx->base.tb, 0); + break; + } + /* fall through */ + case DISAS_CHAIN_UPDATE: + gen_update_nip(ctx, nip); + /* fall through */ + case DISAS_CHAIN: + tcg_gen_lookup_and_goto_ptr(); + break; + + case DISAS_EXIT_UPDATE: + gen_update_nip(ctx, nip); + /* fall through */ + case DISAS_EXIT: tcg_gen_exit_tb(NULL, 0); + break; + + default: + g_assert_not_reached(); } } From patchwork Wed May 19 12:51:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442410 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1310381jac; 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[209.51.188.17]) by mx.google.com with ESMTPS id m12si25858861jav.104.2021.05.19.06.14.49 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:14:49 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=I4ex2exf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:33690 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM2D-0002FK-BR for patch@linaro.org; Wed, 19 May 2021 09:14:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33336) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgw-00014S-4g; Wed, 19 May 2021 08:52:50 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:53981) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgt-0001Hm-D5; Wed, 19 May 2021 08:52:49 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnh0Wt6z9t14; Wed, 19 May 2021 22:52:07 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428728; bh=lZBgIw0SlgXOfbn5GD7Ll+G4Zu67hb55WBfuEMoa71E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=I4ex2exfdJz3uhBdR0wbGN2RTsvRF494MjllljKBiEwBz7BfzZ64JN1CFrXgb4+PV kDVun5PgIbCCf6Rbx16p2TfHTCqgLaBmhsibqDtXHNik84RxSatPolHXa5HtcToQet jpKAopfL7YSI58/VE/1gBvMie1grH1xHHIqcyN/A= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 23/48] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT Date: Wed, 19 May 2021 22:51:23 +1000 Message-Id: <20210519125148.27720-24-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Bruno Larsen , Matheus Ferst , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the synthetic "exception" after no more uses. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-9-matheus.ferst@eldorado.org.br> Reviewed-by: Bruno Larsen (billionai) Signed-off-by: David Gibson --- target/ppc/cpu.h | 1 - target/ppc/translate.c | 27 +++++++++------------------ 2 files changed, 9 insertions(+), 19 deletions(-) -- 2.31.1 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index f43ceec5cb..99ee1e09b2 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -135,7 +135,6 @@ enum { POWERPC_EXCP_STOP = 0x200, /* stop translation */ POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */ /* QEMU exceptions: special cases we want to stop translation */ - POWERPC_EXCP_SYNC = 0x202, /* context synchronizing instruction */ POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */ }; diff --git a/target/ppc/translate.c b/target/ppc/translate.c index c879b47dc6..047d872c6b 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -362,14 +362,6 @@ static inline void gen_stop_exception(DisasContext *ctx) ctx->exception = POWERPC_EXCP_STOP; } -#ifndef CONFIG_USER_ONLY -/* No need to update nip here, as execution flow will change */ -static inline void gen_sync_exception(DisasContext *ctx) -{ - ctx->exception = POWERPC_EXCP_SYNC; -} -#endif - /*****************************************************************************/ /* SPR READ/WRITE CALLBACKS */ @@ -5032,7 +5024,7 @@ static void gen_rfi(DisasContext *ctx) } gen_update_cfar(ctx, ctx->cia); gen_helper_rfi(cpu_env); - gen_sync_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT; #endif } @@ -5049,7 +5041,7 @@ static void gen_rfid(DisasContext *ctx) } gen_update_cfar(ctx, ctx->cia); gen_helper_rfid(cpu_env); - gen_sync_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT; #endif } @@ -5066,7 +5058,7 @@ static void gen_rfscv(DisasContext *ctx) } gen_update_cfar(ctx, ctx->cia); gen_helper_rfscv(cpu_env); - gen_sync_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT; #endif } #endif @@ -5079,7 +5071,7 @@ static void gen_hrfid(DisasContext *ctx) /* Restore CPU state */ CHK_HV; gen_helper_hrfid(cpu_env); - gen_sync_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT; #endif } #endif @@ -6920,7 +6912,7 @@ static void gen_rfsvc(DisasContext *ctx) CHK_SV; gen_helper_rfsvc(cpu_env); - gen_sync_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT; #endif /* defined(CONFIG_USER_ONLY) */ } @@ -7300,7 +7292,7 @@ static void gen_rfci_40x(DisasContext *ctx) CHK_SV; /* Restore CPU state */ gen_helper_40x_rfci(cpu_env); - gen_sync_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT; #endif /* defined(CONFIG_USER_ONLY) */ } @@ -7312,7 +7304,7 @@ static void gen_rfci(DisasContext *ctx) CHK_SV; /* Restore CPU state */ gen_helper_rfci(cpu_env); - gen_sync_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT; #endif /* defined(CONFIG_USER_ONLY) */ } @@ -7327,7 +7319,7 @@ static void gen_rfdi(DisasContext *ctx) CHK_SV; /* Restore CPU state */ gen_helper_rfdi(cpu_env); - gen_sync_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT; #endif /* defined(CONFIG_USER_ONLY) */ } @@ -7340,7 +7332,7 @@ static void gen_rfmci(DisasContext *ctx) CHK_SV; /* Restore CPU state */ gen_helper_rfmci(cpu_env); - gen_sync_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT; #endif /* defined(CONFIG_USER_ONLY) */ } @@ -9238,7 +9230,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) case POWERPC_EXCP_BRANCH: ctx->base.is_jmp = DISAS_NORETURN; break; - case POWERPC_EXCP_SYNC: case POWERPC_EXCP_STOP: ctx->base.is_jmp = DISAS_EXIT; break; From patchwork Wed May 19 12:51:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442406 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1307545jac; Wed, 19 May 2021 06:11:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyhrTvZ7qJupLZeykAyeYV9Y73+seC1l/xC0aIUSA0aRBg5AkKvAfqAmep2S9TORj5F+YzV X-Received: by 2002:a05:6e02:19ce:: with SMTP id r14mr11003780ill.4.1621429894870; Wed, 19 May 2021 06:11:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621429894; cv=none; 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[209.51.188.17]) by mx.google.com with ESMTPS id d18si10340792jam.114.2021.05.19.06.11.34 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:11:34 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=e93B3cEj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:53378 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLz4-0004ys-9B for patch@linaro.org; Wed, 19 May 2021 09:11:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33334) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgw-000143-2B; Wed, 19 May 2021 08:52:50 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:49577 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgt-0001Is-ID; Wed, 19 May 2021 08:52:49 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnh274tz9t1C; Wed, 19 May 2021 22:52:08 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428728; bh=5l+IgCc2WP15Qzz3g4MsYYRCDw3Ffn4jNv/r3457ZYM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=e93B3cEjiAI54r7OTEvL5GtTwRmCnIb+x6JKx/mGB/aK4b00UKoj4szW7zJpn8U+o aJMi0O5w0uZTf3RAxiEXPdMTWuybtRtKyLW6kCFhPWXjMd0iLOsHoKuTMcxxAU0iuX f6znYwrzHe0ZnjZAnW+VjcckNks8jhweYR4sLYQQ= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 24/48] target/ppc: Remove unnecessary gen_io_end calls Date: Wed, 19 May 2021 22:51:24 +1000 Message-Id: <20210519125148.27720-25-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Since ba3e7926691ed33, we switched the implementation of icount to always reset can_do_io at the start of the following TB. Most of them were removed in 9e9b10c64911, but some were missed. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210512185441.3619828-10-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 6 ------ 1 file changed, 6 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 047d872c6b..d51a1913a7 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -570,7 +570,6 @@ void spr_read_tbl(DisasContext *ctx, int gprn, int sprn) } gen_helper_load_tbl(cpu_gpr[gprn], cpu_env); if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_end(); gen_stop_exception(ctx); } } @@ -582,7 +581,6 @@ void spr_read_tbu(DisasContext *ctx, int gprn, int sprn) } gen_helper_load_tbu(cpu_gpr[gprn], cpu_env); if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_end(); gen_stop_exception(ctx); } } @@ -605,7 +603,6 @@ void spr_write_tbl(DisasContext *ctx, int sprn, int gprn) } gen_helper_store_tbl(cpu_env, cpu_gpr[gprn]); if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_end(); gen_stop_exception(ctx); } } @@ -617,7 +614,6 @@ void spr_write_tbu(DisasContext *ctx, int sprn, int gprn) } gen_helper_store_tbu(cpu_env, cpu_gpr[gprn]); if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_end(); gen_stop_exception(ctx); } } @@ -663,7 +659,6 @@ void spr_read_hdecr(DisasContext *ctx, int gprn, int sprn) } gen_helper_load_hdecr(cpu_gpr[gprn], cpu_env); if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_end(); gen_stop_exception(ctx); } } @@ -675,7 +670,6 @@ void spr_write_hdecr(DisasContext *ctx, int sprn, int gprn) } gen_helper_store_hdecr(cpu_env, cpu_gpr[gprn]); if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_end(); gen_stop_exception(ctx); } } From patchwork Wed May 19 12:51:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442416 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1315159jac; Wed, 19 May 2021 06:19:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxvjoY23m1d3gv3FHL9PfsyWiyG+gaKsd/U2VCRxe1ytr7msBuQGVp+K+96FBDeVz8E1NLI X-Received: by 2002:a92:3611:: with SMTP id d17mr11816908ila.304.1621430398322; Wed, 19 May 2021 06:19:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430398; cv=none; d=google.com; s=arc-20160816; b=p+Ev70pwOgKVH5rhvcRCBinhpt86yIlCCvIcEEKGHAqzUxIRhXJibMq+xXZoIvockz Awe3FHp//gBkWPmsSjBUKbgGC1X3KVHvmdGWynr5VSNn74GKq/qPqiFC0bLJZRcAchM3 crTfoK2BGWw/whsriqa0sD9z0PDdmENK+uuyicSagY1cyLnoOvs9n6PGYmRk7hSG9a5a UryFSf1rQl6KbrMNSQHIwUH6himWR5C6UZsYp5WVagHlihDw8qRd1iGPnQIr8UMSrbTw GP8R4rGRGYKljCZP3H9nIconktiBngpjLh487uaxAhz/kvrcmPdbCltnc4Bge0Wu9SdP h6Eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=vTKApNa5TkoEvVy/sAVm7kq+AHbQ5E7V++XkkP9kbno=; b=ZgqwlRpsY8eFBRqiqoj4w405EMa8wT/Mhz9Is+5oXdqE4yt3eAeZe0qDo9L4rvcXld afTGfCVu+B3YLqoPiLzxHIlQti6d7Ay41gOCWQ6Y8ASqwwdxuftzyyyPnAehELVzE4Bt wPBVRxhVy3GZ1jq3I1uJYuUjVebbnTWzkjrnO5Ozy7FiRrgoCv/KRL4CQi2Csz7kMMUB 1KbHJmpGfE5veSzR8rrGTQZXPKoJ51u0yvl39jQhok298/vlgBeWAhRmyrSYqFycbYwQ 0zs7/2chsKbzas0kT3UCMuBXZIvpbLwEe6n1KnHV6NtQrsfXIiHVq0vC8lqA1BXAmBEC zMTw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=jWHgLhQb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id u12si24627870jak.73.2021.05.19.06.19.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:19:58 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=jWHgLhQb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:50538 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM7B-0005no-O1 for patch@linaro.org; Wed, 19 May 2021 09:19:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33468) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhI-0001Me-O4; Wed, 19 May 2021 08:53:12 -0400 Received: from ozlabs.org ([203.11.71.1]:51007) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhD-0001Iu-GA; Wed, 19 May 2021 08:53:09 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnh316tz9t1Q; Wed, 19 May 2021 22:52:08 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428728; bh=lNPPIVSq3q9zlmsi55IC/0ytJrrjeLihEY/GbwRXqmg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jWHgLhQbpVItyvhdyQu4jZiPSOTteltGyVtByF5fLevUX8Jf05uNDUHP01wZCwf1z a6FmiAUorP+DPZauCGe2Z8K7l6S+znjckzzFWnvBYcbz67UYaVLtv6RrRajhXGg7pY 3pnIuRevDIjh2vGU6zshqJ/3Q9EuojnItrWEa8PE= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 25/48] target/ppc: Introduce gen_icount_io_start Date: Wed, 19 May 2021 22:51:25 +1000 Message-Id: <20210519125148.27720-26-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Create a function to handle the details for interacting with icount. Force the exit from the tb via DISAS_TOO_MANY, which allows chaining to the next tb, where the code emitted for gen_tb_start() will determine if we must exit. We can thus remove any matching conditional call to gen_stop_exception. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210517205025.3777947-2-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 174 +++++++++-------------------------------- 1 file changed, 39 insertions(+), 135 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d51a1913a7..060ef83bc0 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -304,6 +304,20 @@ static void gen_exception_nip(DisasContext *ctx, uint32_t excp, ctx->base.is_jmp = DISAS_NORETURN; } +static void gen_icount_io_start(DisasContext *ctx) +{ + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + /* + * An I/O instruction must be last in the TB. + * Chain to the next TB, and let the code from gen_tb_start + * decide if we need to return to the main loop. + * Doing this first also allows this value to be overridden. + */ + ctx->base.is_jmp = DISAS_TOO_MANY; + } +} + /* * Tells the caller what is the appropriate exception to generate and prepares * SPR registers for this exception. @@ -540,24 +554,14 @@ void spr_write_ureg(DisasContext *ctx, int sprn, int gprn) #if !defined(CONFIG_USER_ONLY) void spr_read_decr(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_decr(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_decr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_decr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } #endif @@ -565,24 +569,14 @@ void spr_write_decr(DisasContext *ctx, int sprn, int gprn) /* Time base */ void spr_read_tbl(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_tbl(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_read_tbu(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_tbu(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_read_atbl(DisasContext *ctx, int gprn, int sprn) @@ -598,24 +592,14 @@ void spr_read_atbu(DisasContext *ctx, int gprn, int sprn) #if !defined(CONFIG_USER_ONLY) void spr_write_tbl(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_tbl(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_tbu(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_tbu(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_atbl(DisasContext *ctx, int sprn, int gprn) @@ -631,80 +615,45 @@ void spr_write_atbu(DisasContext *ctx, int sprn, int gprn) #if defined(TARGET_PPC64) void spr_read_purr(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_purr(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_purr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_purr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } /* HDECR */ void spr_read_hdecr(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_hdecr(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_hdecr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_hdecr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_read_vtb(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_vtb(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_vtb(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_vtb(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_tbu40(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_tbu40(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } #endif @@ -912,71 +861,41 @@ void spr_write_601_ubatl(DisasContext *ctx, int sprn, int gprn) #if !defined(CONFIG_USER_ONLY) void spr_read_40x_pit(DisasContext *ctx, int gprn, int sprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_load_40x_pit(cpu_gpr[gprn], cpu_env); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_40x_pit(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_40x_pit(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_40x_dbcr0(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_store_spr(sprn, cpu_gpr[gprn]); gen_helper_store_40x_dbcr0(cpu_env, cpu_gpr[gprn]); /* We must stop translation as we may have rebooted */ gen_stop_exception(ctx); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_40x_sler(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_40x_sler(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_booke_tcr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_booke_tcr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } void spr_write_booke_tsr(DisasContext *ctx, int sprn, int gprn) { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_helper_store_booke_tsr(cpu_env, cpu_gpr[gprn]); - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } #endif @@ -2860,18 +2779,13 @@ static void gen_darn(DisasContext *ctx) if (l > 2) { tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], -1); } else { - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); if (l == 0) { gen_helper_darn32(cpu_gpr[rD(ctx->opcode)]); } else { /* Return 64-bit random for both CRN and RRN */ gen_helper_darn64(cpu_gpr[rD(ctx->opcode)]); } - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_stop_exception(ctx); - } } } #endif @@ -5013,9 +4927,7 @@ static void gen_rfi(DisasContext *ctx) } /* Restore CPU state */ CHK_SV; - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_update_cfar(ctx, ctx->cia); gen_helper_rfi(cpu_env); ctx->base.is_jmp = DISAS_EXIT; @@ -5030,9 +4942,7 @@ static void gen_rfid(DisasContext *ctx) #else /* Restore CPU state */ CHK_SV; - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_update_cfar(ctx, ctx->cia); gen_helper_rfid(cpu_env); ctx->base.is_jmp = DISAS_EXIT; @@ -5047,9 +4957,7 @@ static void gen_rfscv(DisasContext *ctx) #else /* Restore CPU state */ CHK_SV; - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); gen_update_cfar(ctx, ctx->cia); gen_helper_rfscv(cpu_env); ctx->base.is_jmp = DISAS_EXIT; @@ -5379,9 +5287,7 @@ static void gen_mtmsrd(DisasContext *ctx) CHK_SV; #if !defined(CONFIG_USER_ONLY) - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); if (ctx->opcode & 0x00010000) { /* L=1 form only updates EE and RI */ TCGv t0 = tcg_temp_new(); @@ -5416,9 +5322,7 @@ static void gen_mtmsr(DisasContext *ctx) CHK_SV; #if !defined(CONFIG_USER_ONLY) - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } + gen_icount_io_start(ctx); if (ctx->opcode & 0x00010000) { /* L=1 form only updates EE and RI */ TCGv t0 = tcg_temp_new(); From patchwork Wed May 19 12:51:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442404 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1305868jac; Wed, 19 May 2021 06:09:53 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw6uK8Rcn02UP9nWmZ8Dgm9XTsWmLvs8j8zrDd4cLZRYrXUjne5kmjDqC1e5ZFtP5ZPOOHU X-Received: by 2002:a92:c607:: with SMTP id p7mr10633778ilm.97.1621429793245; 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[209.51.188.17]) by mx.google.com with ESMTPS id w36si12023944jal.44.2021.05.19.06.09.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:09:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=bpU+adku; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:47912 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLxQ-0001Fp-NJ for patch@linaro.org; Wed, 19 May 2021 09:09:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33494) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhK-0001T3-GI; Wed, 19 May 2021 08:53:14 -0400 Received: from ozlabs.org ([203.11.71.1]:59033) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhG-0001KD-3h; Wed, 19 May 2021 08:53:14 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnh6YX2z9t1r; Wed, 19 May 2021 22:52:08 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428728; bh=wm6gL6C25/ZglghH2dRTWQXcAMseYyp2xvnue02EqCg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bpU+adkufDgoBA4pP6fVmpzgsImGC9zWwrYm1yheak41Z3dm0/lkQGkbuVnORydlt p0KcIHTkVeGah2YkviwMcemOyHTQ7nKBLG7FHu32QYuTDlbuuUssV/A5TAo63359Uc kjINXax/Ofx6z2kjYQSUc1B6kseGHf/ugbtOfVeo= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 26/48] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE Date: Wed, 19 May 2021 22:51:26 +1000 Message-Id: <20210519125148.27720-27-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Remove the synthetic "exception" after no more uses. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210517205025.3777947-3-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- linux-user/ppc/cpu_loop.c | 3 --- target/ppc/cpu.h | 1 - target/ppc/translate.c | 24 +++++++----------------- 3 files changed, 7 insertions(+), 21 deletions(-) -- 2.31.1 diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c index 4a0f6c8dc2..fe526693d2 100644 --- a/linux-user/ppc/cpu_loop.c +++ b/linux-user/ppc/cpu_loop.c @@ -423,9 +423,6 @@ void cpu_loop(CPUPPCState *env) cpu_abort(cs, "Maintenance exception while in user mode. " "Aborting\n"); break; - case POWERPC_EXCP_STOP: /* stop translation */ - /* We did invalidate the instruction cache. Go on */ - break; case POWERPC_EXCP_BRANCH: /* branch instruction: */ /* We just stopped because of a branch. Go on */ break; diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 99ee1e09b2..9e38df685d 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -132,7 +132,6 @@ enum { /* EOL */ POWERPC_EXCP_NB = 103, /* QEMU exceptions: used internally during code translation */ - POWERPC_EXCP_STOP = 0x200, /* stop translation */ POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */ /* QEMU exceptions: special cases we want to stop translation */ POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */ diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 060ef83bc0..f57b67be5f 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -369,13 +369,6 @@ static inline void gen_hvpriv_exception(DisasContext *ctx, uint32_t error) gen_exception_err(ctx, POWERPC_EXCP_HV_EMU, POWERPC_EXCP_PRIV | error); } -/* Stop translation */ -static inline void gen_stop_exception(DisasContext *ctx) -{ - gen_update_nip(ctx, ctx->base.pc_next); - ctx->exception = POWERPC_EXCP_STOP; -} - /*****************************************************************************/ /* SPR READ/WRITE CALLBACKS */ @@ -829,7 +822,7 @@ void spr_write_hid0_601(DisasContext *ctx, int sprn, int gprn) { gen_helper_store_hid0_601(cpu_env, cpu_gpr[gprn]); /* Must stop the translation as endianness may have changed */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; } #endif @@ -877,7 +870,7 @@ void spr_write_40x_dbcr0(DisasContext *ctx, int sprn, int gprn) gen_store_spr(sprn, cpu_gpr[gprn]); gen_helper_store_40x_dbcr0(cpu_env, cpu_gpr[gprn]); /* We must stop translation as we may have rebooted */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; } void spr_write_40x_sler(DisasContext *ctx, int sprn, int gprn) @@ -4080,7 +4073,7 @@ static void gen_isync(DisasContext *ctx) gen_check_tlb_flush(ctx, false); } tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; } #define MEMOP_GET_SIZE(x) (1 << ((x) & MO_SIZE)) @@ -5312,7 +5305,7 @@ static void gen_mtmsrd(DisasContext *ctx) gen_helper_store_msr(cpu_env, cpu_gpr[rS(ctx->opcode)]); } /* Must stop the translation as machine state (may have) changed */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; #endif /* !defined(CONFIG_USER_ONLY) */ } #endif /* defined(TARGET_PPC64) */ @@ -5355,7 +5348,7 @@ static void gen_mtmsr(DisasContext *ctx) tcg_temp_free(msr); } /* Must stop the translation as machine state (may have) changed */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; #endif } @@ -7492,7 +7485,7 @@ static void gen_wrtee(DisasContext *ctx) * Stop translation to have a chance to raise an exception if we * just set msr_ee to 1 */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; #endif /* defined(CONFIG_USER_ONLY) */ } @@ -7506,7 +7499,7 @@ static void gen_wrteei(DisasContext *ctx) if (ctx->opcode & 0x00008000) { tcg_gen_ori_tl(cpu_msr, cpu_msr, (1 << MSR_EE)); /* Stop translation to have a chance to raise an exception */ - gen_stop_exception(ctx); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; } else { tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(1 << MSR_EE)); } @@ -9128,9 +9121,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) case POWERPC_EXCP_BRANCH: ctx->base.is_jmp = DISAS_NORETURN; break; - case POWERPC_EXCP_STOP: - ctx->base.is_jmp = DISAS_EXIT; - break; default: /* Every other ctx->exception should have set NORETURN. */ g_assert_not_reached(); From patchwork Wed May 19 12:51:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442411 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1310560jac; Wed, 19 May 2021 06:15:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwU0m1EZiKVMFmLybiRFflI+mEpAj/jT/nu50iqGBQnvbTxHxU+v+OLnS8UPuUVpBB2zXPf X-Received: by 2002:a6b:f311:: with SMTP id m17mr9605977ioh.162.1621430103927; Wed, 19 May 2021 06:15:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430103; cv=none; d=google.com; s=arc-20160816; b=BGecO1tiv0GZ9HGSzUC/Hn0Cp+vjOLE/8EzjicTOzBeipzFKVJmHp9DVR81Nm/5iWy iSHmv+FcOOJWR3z2xG0ViFvVkDPD1UQv83nXWw7JvJ5zbipZccV3eRNk2w1/38b9TCCy GmT5lFLYZjBFHOFBRSWQOlnu+3t5RX2MPZ/jQICKpJyN2IYnfKwAdumY3qItRudrzTrY bTHOoVTrDGHqhDhMOztuQyNNQyZVsc7k7ijrEg4ykMHFHAX3cDaqzHV6a/gpiV6nzYWo Z98i7FS0tFaf5BcNNnNduIxLQ1dhajKKGuSpW3nSNhJgeI9IDgt1SBD4hxFDcdUYGvgv f30g== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id a11si29649761jat.23.2021.05.19.06.15.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:15:03 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=Ifks3c3h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:34920 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM2Q-00031t-Ts for patch@linaro.org; Wed, 19 May 2021 09:15:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33492) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhK-0001Sx-ER; Wed, 19 May 2021 08:53:14 -0400 Received: from ozlabs.org ([203.11.71.1]:40323) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhG-0001KE-9n; Wed, 19 May 2021 08:53:14 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnj3p2qz9t1s; Wed, 19 May 2021 22:52:09 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428729; bh=qRid1Fy5HDgT9EYdy78EWqjRUnTiqZ12oEqK++StO+w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ifks3c3hnNxROxwDT+YfBibpS+fW8Z++/9BIDj68ZZS+WAc0eSvYNZkVlort+u2FU Tj5+ZLCMxSFopJtPRaOATDCIG5ErelyYMQ0bLiAKMUffO3alN+3jU3ygpHYxE42pnB i4q0/9fyibd73wKxHAVmD1vVeustRf2/oMuCgt+c= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 27/48] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN Date: Wed, 19 May 2021 22:51:27 +1000 Message-Id: <20210519125148.27720-28-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The translation of branch instructions always results in exit from the TB. Remove the synthetic "exception" after no more uses. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210517205025.3777947-4-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- linux-user/ppc/cpu_loop.c | 3 --- target/ppc/cpu.h | 2 -- target/ppc/translate.c | 8 ++------ 3 files changed, 2 insertions(+), 11 deletions(-) -- 2.31.1 diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c index fe526693d2..fa91ea0eed 100644 --- a/linux-user/ppc/cpu_loop.c +++ b/linux-user/ppc/cpu_loop.c @@ -423,9 +423,6 @@ void cpu_loop(CPUPPCState *env) cpu_abort(cs, "Maintenance exception while in user mode. " "Aborting\n"); break; - case POWERPC_EXCP_BRANCH: /* branch instruction: */ - /* We just stopped because of a branch. Go on */ - break; case POWERPC_EXCP_SYSCALL_USER: /* system call in user-mode emulation */ /* WARNING: diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 9e38df685d..cab33a3680 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -131,8 +131,6 @@ enum { POWERPC_EXCP_SYSCALL_VECTORED = 102, /* scv exception */ /* EOL */ POWERPC_EXCP_NB = 103, - /* QEMU exceptions: used internally during code translation */ - POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */ /* QEMU exceptions: special cases we want to stop translation */ POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */ }; diff --git a/target/ppc/translate.c b/target/ppc/translate.c index f57b67be5f..d019454550 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4692,7 +4692,6 @@ static void gen_b(DisasContext *ctx) { target_ulong li, target; - ctx->exception = POWERPC_EXCP_BRANCH; /* sign extend LI */ li = LI(ctx->opcode); li = (li ^ 0x02000000) - 0x02000000; @@ -4706,6 +4705,7 @@ static void gen_b(DisasContext *ctx) } gen_update_cfar(ctx, ctx->cia); gen_goto_tb(ctx, 0, target); + ctx->base.is_jmp = DISAS_NORETURN; } #define BCOND_IM 0 @@ -4718,7 +4718,6 @@ static void gen_bcond(DisasContext *ctx, int type) uint32_t bo = BO(ctx->opcode); TCGLabel *l1; TCGv target; - ctx->exception = POWERPC_EXCP_BRANCH; if (type == BCOND_LR || type == BCOND_CTR || type == BCOND_TAR) { target = tcg_temp_local_new(); @@ -4825,6 +4824,7 @@ static void gen_bcond(DisasContext *ctx, int type) gen_set_label(l1); gen_goto_tb(ctx, 1, ctx->base.pc_next); } + ctx->base.is_jmp = DISAS_NORETURN; } static void gen_bc(DisasContext *ctx) @@ -9102,7 +9102,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) /* Check trace mode exceptions */ if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && - ctx->exception != POWERPC_EXCP_BRANCH && ctx->base.is_jmp != DISAS_NORETURN)) { uint32_t excp = gen_prep_dbgex(ctx); gen_exception_nip(ctx, excp, ctx->base.pc_next); @@ -9118,9 +9117,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) switch (ctx->exception) { case POWERPC_EXCP_NONE: break; - case POWERPC_EXCP_BRANCH: - ctx->base.is_jmp = DISAS_NORETURN; - break; default: /* Every other ctx->exception should have set NORETURN. */ g_assert_not_reached(); From patchwork Wed May 19 12:51:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442409 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1309789jac; Wed, 19 May 2021 06:14:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzWkJhHM7nBY8VdcdJ9E35ekYRZFwBxrgaS0xR/JUHCls3ugGfmMSOTntbGSEmJWWZoBCht X-Received: by 2002:a05:6638:3013:: with SMTP id r19mr13259797jak.36.1621430047015; Wed, 19 May 2021 06:14:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430047; cv=none; d=google.com; s=arc-20160816; b=eBODrnpcY1/hDjlDDh6vJBcesVuLK/K850p2foUeurjgxqueqq+OoXNNhg88EJaO2m TNv0z5aeJDZCTW4rnmvV8Cn5C72QQWiogduznYBRJcYQWytLThWspkRFfKKujPxw/UqL LD0jfywxuqgg1+Kn2zyHxkfn235pBT4eahQWKUzt21HPpI/iV4h+0wAHXY37zXdWZvIJ giucP0AX4PLBY4yyqZgGu6Nxvnve9/wRZwFxjcrVaiURedNI5bjlRH6f4ForFbhSQl27 MD9+RGuz73bTnecvtrMXcZXnaZ2F+IkyLTC1u3aTBau/b8mTmuhpPJOxJfUk+zlxbFSu SXNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=1FujlOZS4EJO1qV1ycs/X+5gnn9os9bROuqqLEQllhQ=; b=qC7s/ZaeezXVoLpU8pfOqfwx+gdsYA8sYKVoT6apYYae39SDTXMzq5Dt6R9TShmhs6 DAyir7Hs7ZtOdIN2uhfweirrXjcNeD/47qhBV6jIx5MSrSJFnN/yUHwsLVzDLttqy6aD A4JUCnQCMVz0XoXOwuR2Q3/w5MacCbOZmAaMiHDZ7HFGsoeb4lwW/qa0s+bpJhdsg68M +wqQ/zlB13gA9dGIZLjSiwc/+guIurckAkmXZzPlZRJVnM5LykFuz6gRbf1om/EYpRGR Bvzw4XuYwHQ5ZTN/X30rqgVynTs3Xc2xlfGO3k7paMNJo0DC5FgIhO0t/WEOhIpV5o4m BueA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=PdpcuvMo; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id a13si26150202ilf.41.2021.05.19.06.14.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:14:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=PdpcuvMo; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:33400 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM1W-000240-Er for patch@linaro.org; Wed, 19 May 2021 09:14:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33370) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgz-0001JP-NI; Wed, 19 May 2021 08:52:56 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:36237) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgx-0001KJ-1N; Wed, 19 May 2021 08:52:53 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnk0b1fz9t25; Wed, 19 May 2021 22:52:09 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428730; bh=X+Y5b5/xIZsPnjiDvYYY3iKVgaD26GtrNAB6EytgFyA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PdpcuvMozvJFSzwLTsDLc17b8kAi9ydiQ9uLCyMgELRyx0mhKTXUNJ5LXWq7IFWAt r7rDRdpD40MmeIhlXlLimmow2r5zK6SLimtDsCAZVzbZuwtzKmBZ0zCcIHHUGZrQaC FURCEO7MFHkYsptdtZOMxnjkG+vWKjadsmPCOn+c= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 28/48] target/ppc: Remove DisasContext.exception Date: Wed, 19 May 2021 22:51:28 +1000 Message-Id: <20210519125148.27720-29-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Now that we have removed all of the fake exceptions, and all real exceptions exit via DISAS_NORETURN, we can remove this field. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210517205025.3777947-5-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 30 ++++-------------------------- 1 file changed, 4 insertions(+), 26 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d019454550..80cd11b3f8 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -159,7 +159,6 @@ struct DisasContext { DisasContextBase base; target_ulong cia; /* current instruction address */ uint32_t opcode; - uint32_t exception; /* Routine used to access memory */ bool pr, hv, dr, le_mode; bool lazy_tlb_flush; @@ -261,15 +260,12 @@ static void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t error) * These are all synchronous exceptions, we set the PC back to the * faulting instruction */ - if (ctx->exception == POWERPC_EXCP_NONE) { - gen_update_nip(ctx, ctx->cia); - } + gen_update_nip(ctx, ctx->cia); t0 = tcg_const_i32(excp); t1 = tcg_const_i32(error); gen_helper_raise_exception_err(cpu_env, t0, t1); tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); - ctx->exception = excp; ctx->base.is_jmp = DISAS_NORETURN; } @@ -281,13 +277,10 @@ static void gen_exception(DisasContext *ctx, uint32_t excp) * These are all synchronous exceptions, we set the PC back to the * faulting instruction */ - if (ctx->exception == POWERPC_EXCP_NONE) { - gen_update_nip(ctx, ctx->cia); - } + gen_update_nip(ctx, ctx->cia); t0 = tcg_const_i32(excp); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); - ctx->exception = excp; ctx->base.is_jmp = DISAS_NORETURN; } @@ -300,7 +293,6 @@ static void gen_exception_nip(DisasContext *ctx, uint32_t excp, t0 = tcg_const_i32(excp); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); - ctx->exception = excp; ctx->base.is_jmp = DISAS_NORETURN; } @@ -4993,13 +4985,10 @@ static void gen_scv(DisasContext *ctx) uint32_t lev = (ctx->opcode >> 5) & 0x7F; /* Set the PC back to the faulting instruction. */ - if (ctx->exception == POWERPC_EXCP_NONE) { - gen_update_nip(ctx, ctx->cia); - } + gen_update_nip(ctx, ctx->cia); gen_helper_scv(cpu_env, tcg_constant_i32(lev)); - /* This need not be exact, just not POWERPC_EXCP_NONE */ - ctx->exception = POWERPC_SYSCALL_VECTORED; + ctx->base.is_jmp = DISAS_NORETURN; } #endif #endif @@ -9005,7 +8994,6 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) uint32_t hflags = ctx->base.tb->flags; int bound; - ctx->exception = POWERPC_EXCP_NONE; ctx->spr_cb = env->spr_cb; ctx->pr = (hflags >> HFLAGS_PR) & 1; ctx->mem_idx = (hflags >> HFLAGS_DMMU_IDX) & 7; @@ -9112,16 +9100,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) "temporaries\n", opc1(ctx->opcode), opc2(ctx->opcode), opc3(ctx->opcode), opc4(ctx->opcode), ctx->opcode); } - - if (ctx->base.is_jmp == DISAS_NEXT) { - switch (ctx->exception) { - case POWERPC_EXCP_NONE: - break; - default: - /* Every other ctx->exception should have set NORETURN. */ - g_assert_not_reached(); - } - } } static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) From patchwork Wed May 19 12:51:29 2021 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id g9si3085307ild.113.2021.05.19.06.18.07 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:18:07 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b="Ux//wOvi"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:43616 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM5P-0000W2-1N for patch@linaro.org; Wed, 19 May 2021 09:18:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33526) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhL-0001ZF-Uu; Wed, 19 May 2021 08:53:15 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:41139 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhH-0001Ly-B0; Wed, 19 May 2021 08:53:15 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnk2CV5z9t2G; Wed, 19 May 2021 22:52:10 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428730; bh=B+5+CBFSKc5hIzIcxZ8RF3BK6uJSaw1YPUgVkZADPZo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ux//wOvidDozkXZ5Q9U2PgU6JbJyXjlW49CTtAcWtV7/4ETOUm+nJSdBua+gykSEk CKPwsWDSX9d621euRdSWY/UVP8o6s9tbC4rfstYThVHd26sHeWMWKrmFIX1u0hQn1u Z0n86PIpBF6BWh/3AQ51eCiOvp4uTmRDXrwvnl74= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 29/48] target/ppc: Move single-step check to ppc_tr_tb_stop Date: Wed, 19 May 2021 22:51:29 +1000 Message-Id: <20210519125148.27720-30-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson When single-stepping, force max_insns to 1 in init_disas so that we exit the translation loop immediately. Combine the single-step checks in tb_stop, and give the gdb exception priority over the cpu exception, just as we already do in gen_lookup_and_goto_ptr. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210517205025.3777947-6-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 80cd11b3f8..05e3c0417a 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -8992,7 +8992,6 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) DisasContext *ctx = container_of(dcbase, DisasContext, base); CPUPPCState *env = cs->env_ptr; uint32_t hflags = ctx->base.tb->flags; - int bound; ctx->spr_cb = env->spr_cb; ctx->pr = (hflags >> HFLAGS_PR) & 1; @@ -9032,8 +9031,12 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->singlestep_enabled |= GDBSTUB_SINGLE_STEP; } - bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4; - ctx->base.max_insns = MIN(ctx->base.max_insns, bound); + if (ctx->singlestep_enabled & (CPU_SINGLE_STEP | GDBSTUB_SINGLE_STEP)) { + ctx->base.max_insns = 1; + } else { + int bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4; + ctx->base.max_insns = MIN(ctx->base.max_insns, bound); + } } static void ppc_tr_tb_start(DisasContextBase *db, CPUState *cs) @@ -9087,14 +9090,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) handler->count++; #endif - /* Check trace mode exceptions */ - if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && - (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && - ctx->base.is_jmp != DISAS_NORETURN)) { - uint32_t excp = gen_prep_dbgex(ctx); - gen_exception_nip(ctx, excp, ctx->base.pc_next); - } - if (tcg_check_temp_count()) { qemu_log("Opcode %02x %02x %02x %02x (%08x) leaked " "temporaries\n", opc1(ctx->opcode), opc2(ctx->opcode), @@ -9107,6 +9102,7 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) DisasContext *ctx = container_of(dcbase, DisasContext, base); DisasJumpType is_jmp = ctx->base.is_jmp; target_ulong nip = ctx->base.pc_next; + int sse; if (is_jmp == DISAS_NORETURN) { /* We have already exited the TB. */ @@ -9114,7 +9110,8 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) } /* Honor single stepping. */ - if (unlikely(ctx->base.singlestep_enabled)) { + sse = ctx->singlestep_enabled & (CPU_SINGLE_STEP | GDBSTUB_SINGLE_STEP); + if (unlikely(sse)) { switch (is_jmp) { case DISAS_TOO_MANY: case DISAS_EXIT_UPDATE: @@ -9127,8 +9124,16 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) default: g_assert_not_reached(); } - gen_debug_exception(ctx); - return; + + if (sse & GDBSTUB_SINGLE_STEP) { + gen_debug_exception(ctx); + return; + } + /* else CPU_SINGLE_STEP... */ + if (nip <= 0x100 || nip > 0xf00) { + gen_exception(ctx, gen_prep_dbgex(ctx)); + return; + } } switch (is_jmp) { From patchwork Wed May 19 12:51:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442413 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1312988jac; Wed, 19 May 2021 06:17:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzNCZQLXlu8zxg1DZgPh2p7dkStXVnwWgw5lO96KW8b9dwp0yCitJMGs+zrr+HdqwGQbS4U X-Received: by 2002:a02:660e:: with SMTP id k14mr13058641jac.9.1621430270049; Wed, 19 May 2021 06:17:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430270; cv=none; d=google.com; s=arc-20160816; b=wQwjK1heLhnUWSydSQR2B9IGV73hvteHUSce7YJHJkXoFuqncTR2zHKqSgiSDdvfvJ A6kGbDVFi56KDc0pSzTOZaZOGTWJLcZFzRRCHynDLUi+h5Kph/7TZnm2MBdF2+4lHR8u q/iKisDDHEJfRmvEfbhD79l75YDiLZIrY1YC2ZvV7oU5RZR3gXMW9oKfNNnmMWM+2ajF DTMKANvwsnmRqcIzGi1AXA/9ydbH1Ww+ZMlmXAVdFqySs8iCOA/4o+xR0hkvOfIFPXxD pRRwKlLE8ozkILKrLYJbid3CNWGhA0DN+YWNz9CGlDZ6xy91JbiwakPESFotKu3BPFR/ s3jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xbVgONUdilvxkhqLb6q02thsJB0UMn4KPcik9Z6dO3k=; b=wR2w9ALK1R44VwYVpWJVmOpJAeiNrRgE8t8wJz3a75ElydS0MaTum4JkGEEDjn53Rt gRIQ/XzF0CkKKMJU1Kr7HDxuizZz7ZT+bebD/FQ04Zh5FracP87SE8Wg7VwgimCleyoB SSPSOnMDyNJrJ8+M9W7P2lwG1+xZ2yf73h3HvKc6+oQ5KlgeeFmsmFZ+ZmH1/suttXXQ I3t1cxdmSYOuAhb3NllGPGbQ/OIFa7+C+9vtYPU78NzkuHRVfT0mbXZnvJewKISIqSCo heGrSA2kD/yXuhQx7kCzDwcQxtkHfOot6teua9HH0A1takXY7ufXDQFhmEL3i9eeFu4D G7HA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=VFUvbgYM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x11si16402030ilp.53.2021.05.19.06.17.50 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:17:50 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=VFUvbgYM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:42198 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM57-0007zw-GA for patch@linaro.org; Wed, 19 May 2021 09:17:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33392) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLh7-0001K6-M8; Wed, 19 May 2021 08:53:02 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:34641) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLgz-0001MS-5J; Wed, 19 May 2021 08:52:54 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnk4TYPz9t2b; Wed, 19 May 2021 22:52:10 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428730; bh=zpsVKsxnnsx7gNVqFu7VaZXETBUW1ZEzg+RP1HiSQ60=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VFUvbgYMwi077GBmHek974H6xexwWteRL5gbHtKL2ld0r/QiLtVTxx6XWo2eHrXSE RuQAvtzPRiy3SIJ7f/nIjfUwO8xIMoTEEGZwuNSrINB/XFJ3gGb37yAvrh6fmgx7oq yGN5Q1d07qXjLnTxQO00DdcGvHP0ykPhakFhdd+g= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 30/48] target/ppc: Tidy exception vs exit_tb Date: Wed, 19 May 2021 22:51:30 +1000 Message-Id: <20210519125148.27720-31-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We do not need to emit an exit_tb after an exception, as the latter will exit via longjmp. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210517205025.3777947-7-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 05e3c0417a..e68152810e 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4648,8 +4648,9 @@ static void gen_lookup_and_goto_ptr(DisasContext *ctx) } else if (sse & (CPU_SINGLE_STEP | CPU_BRANCH_STEP)) { uint32_t excp = gen_prep_dbgex(ctx); gen_exception(ctx, excp); + } else { + tcg_gen_exit_tb(NULL, 0); } - tcg_gen_exit_tb(NULL, 0); } else { tcg_gen_lookup_and_goto_ptr(); } From patchwork Wed May 19 12:51:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442419 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1318099jac; Wed, 19 May 2021 06:22:55 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxIYc6MX303Ab0WffS6zF3bxseoa1llO2bsfG/KIlgqf1xOJTVg3xd3L3vFKbBoJimbstqS X-Received: by 2002:a6b:4e15:: with SMTP id c21mr10036447iob.116.1621430575851; Wed, 19 May 2021 06:22:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430575; cv=none; d=google.com; s=arc-20160816; b=EX0Dz4/FSkJalLFEWM5hNHFtqfZf8Oi1tMtsbhysN+dU+L6qJuoz3y7ZNyMji024JA hHd8aWF2q58QdkMuACZsq48jDVeDMN/uG8qG94XQI47y+U4a2NvY2LHlp2S4nfbGmTwH 7E7lymJS7vaXPwPsmuPDKCA7BzSJmBPlJi8dkL/TUENVf89vTPXOLKTSAC8W6m4E1uPP ORIlDTkcPoDraNypamXCcNHQRREWYxB82wJ6RtboSWPNebJQKObhCbGQOFlyeeyXVSxc W6qhDrmgOfUX257CjdKJvNd5GFCQAlGYucxW7lUq7WZCrmkaMFfftuc6HaNxKkhytDaT 9v3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=uZJwxKTnyqtRTVeNaZ5FN6EXp8tJftomW6tZZx3TkHQ=; b=qLmbrzFLOQAaf/geqpO2275HpcobUOA4xGfu5QzlUpDaU3zgGSsVnV7Sdo774pEn2A 8cank9oZGEFoPEELH+X9NYXVtJHj8B1YYGs4llPEsO4mDBAn+QhRXx6UvQ/+bccoaF0I VcORX9er1pUNbdA7n/tjylqalXjcRI93Iyr9gQ9POP/Z8xET+xhwAWqQc9FGdsrSyewF 8NhKXdG0ZsUMK6P1KY3BYH0FmnvrxDtn6w3r7Wj3sFNP8NfbnxeO2ow72AKS8Ujh+pqz d9iT8Efu4ZRdvidhLJBz7qWuYWmEelKWkdDHsxp04iaGEsrjkHaCe5IsnH1+U3JyxpTo WFrA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=f3AMYTrI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s15si8714631iog.67.2021.05.19.06.22.55 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:22:55 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=f3AMYTrI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:59848 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMA3-00041f-5w for patch@linaro.org; Wed, 19 May 2021 09:22:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33550) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhN-0001hF-TD; Wed, 19 May 2021 08:53:17 -0400 Received: from ozlabs.org ([203.11.71.1]:34041) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhM-0001NW-0Z; Wed, 19 May 2021 08:53:17 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnk60FBz9t2g; Wed, 19 May 2021 22:52:10 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428730; bh=ZI3fDpteXkqz4sW9NRYMUjXas2QCe5a4ah42UX9HtA0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=f3AMYTrIxI2Xu+k5WHh1RUUyZuccgSxTLhyDvPFSUiGpRoNjLEH1itCU//QmjX3I4 ZckULf2sDFhmmxWg5OtFsjysgem8z+2U5LkW/pxbkIzBH75wVDRPk8soByqdCs/cWF uy4m6mnMAeou7qLPQfyXHeEm3/cxAXvJ1/Bb8nJw= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 31/48] target/ppc: Mark helper_raise_exception* as noreturn Date: Wed, 19 May 2021 22:51:31 +1000 Message-Id: <20210519125148.27720-32-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Matheus Ferst Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210517205025.3777947-8-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/helper.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.31.1 diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 513066d54d..ea9f2a236c 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -1,5 +1,5 @@ -DEF_HELPER_FLAGS_3(raise_exception_err, TCG_CALL_NO_WG, void, env, i32, i32) -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, void, env, i32) +DEF_HELPER_FLAGS_3(raise_exception_err, TCG_CALL_NO_WG, noreturn, env, i32, i32) +DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) DEF_HELPER_FLAGS_4(tw, TCG_CALL_NO_WG, void, env, tl, tl, i32) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_4(td, TCG_CALL_NO_WG, void, env, tl, tl, i32) From patchwork Wed May 19 12:51:32 2021 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id s8si26495995ilt.116.2021.05.19.06.12.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:12:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=gDO8iDTb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:56530 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljLzt-00075T-8A for patch@linaro.org; Wed, 19 May 2021 09:12:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33528) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhL-0001ZM-VY; Wed, 19 May 2021 08:53:15 -0400 Received: from ozlabs.org ([203.11.71.1]:48587) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhJ-0001Md-B8; Wed, 19 May 2021 08:53:15 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnl0kzQz9t2p; Wed, 19 May 2021 22:52:11 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428731; bh=divziH9AFXDw7ex4etOicidfNW5m4/0DV5hb25t7Qus=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gDO8iDTb0BQggLrNMQFboFEMBR6KxxP3VaQH9mBJOZrl2al1HINGj6DHTSESdFux/ MldjbpDK8fgolUKYnVVUrfmg5V204/9bPkADUAtjoCBdhhpsiksZ0o1M895fhI2mVu iAfpo+5METdOvVWs2IuXC7s3/Hhp0YrEKebqdCQU= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 32/48] target/ppc: Use translator_loop_temp_check Date: Wed, 19 May 2021 22:51:32 +1000 Message-Id: <20210519125148.27720-33-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Bruno Larsen , Matheus Ferst , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The special logging is unnecessary. It will have been done immediately before in the log file. Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Reviewed-by: Bruno Larsen (billionai) Message-Id: <20210517205025.3777947-9-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/translate.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) -- 2.31.1 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index e68152810e..ea200f9637 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -9091,11 +9091,7 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) handler->count++; #endif - if (tcg_check_temp_count()) { - qemu_log("Opcode %02x %02x %02x %02x (%08x) leaked " - "temporaries\n", opc1(ctx->opcode), opc2(ctx->opcode), - opc3(ctx->opcode), opc4(ctx->opcode), ctx->opcode); - } + translator_loop_temp_check(&ctx->base); } static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) From patchwork Wed May 19 12:51:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442414 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1313202jac; Wed, 19 May 2021 06:18:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwA8RIbB8QuZWSJ8R0vuAfw/Hl7azDW2G06/gKHQjl/B3oXv7NAVKgdlWs9O0RsdEmlRh6l X-Received: by 2002:a92:4446:: with SMTP id a6mr11113119ilm.9.1621430283415; Wed, 19 May 2021 06:18:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430283; cv=none; d=google.com; s=arc-20160816; b=iO1XCvb9F1/cyM5dusIm9knSG4x00js6ahkV1oM+oqAqSGKp37TulFctcLS5OqIBrE WSLmY8GA4OxaGU+NbMC61JRXJyilOELw9VFpWnGuBctTP+JS9t23RyTMmg7BzH7QhtMz A/hbG+bZFL/a+nr5PgCeVTTJ8KG6IgGdd+q91fsnCDJIU2JxWaGcHIrLC41NbLRelpPq SdwBDFsYt+OXmjs752hIE0cuy25KAwHSzFPbPYbGp6xdMIEb7vr4XLyp9A4af/jYaacK P3qa2lpF6y+NDKoRWB/hka3I9y26AAG9Apbi9LRuzB3Tzrypm4ydrTBiagzttoKd6AEN GkZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=4NkmLLYRFwb7c079J/AkJTy1blM/TCL6Nu80hu4n+fs=; b=Q7zo9PvMtYAWkJlzkT0A2rqhEdF/ywvoLTjcF5A97DxpqXH5VmyruFQgFjLd2HX5iT VlBxYDs18VZwK28ha86S6gNYpk7cNbCHCyK6gbGC9Eqx01mT/3k8vSuRoCm0ddpOR9Qr NOy2FMMh1eapt2nAvDx0A1ZKMQxaR1aey+f0xOx//ubkPUVkO0vVHZXwEG4p27B2CtwE IgfJ8b/Mlafnl2eggeBY2I+Kvt0ZDARCSjwzju3/HCoAi9bPfTPcj1xKWWx4s3ykmhKh QLvKfsF6V1aRt+GvJcA4DZWZK+vpCPqSZOZ9dadfR+nDVL/F3ftRzKcI7dx+701OxHL0 YPpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=MnSvRQqi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k21si9814357jad.9.2021.05.19.06.18.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:18:03 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=MnSvRQqi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:43370 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM5K-0000LL-Nq for patch@linaro.org; Wed, 19 May 2021 09:18:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33442) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhE-0001Li-4f; Wed, 19 May 2021 08:53:12 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:33175) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhB-0001S0-Ek; Wed, 19 May 2021 08:53:07 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnl6ZvHz9t5G; Wed, 19 May 2021 22:52:11 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428731; bh=kptTWXvbrQo7EboPlTKRIqEOUXFj05GJNTL2ncf8t9M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MnSvRQqiS+A1LVHZcDtWU1+ztYsjFkgw0YuCOCV/vAUNb7Ew2cHMMuxgdwamLggVB e74YUcL7l0dwvBBAiifS83HInFK6T9hPSmSfqRCdhGWycbzR0w9azI5myh637c9Bw+ F/nY+s34BC98+XWSk4L5o0tXVRT+81FrTkhUusd8= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 34/48] target/ppc: Introduce prot_for_access_type Date: Wed, 19 May 2021 22:51:34 +1000 Message-Id: <20210519125148.27720-35-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Use this in the three places we currently have a local array indexed by rwx (which happens to have the same values). The types will match up correctly with additional changes. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-2-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/internal.h | 19 +++++++++++++++++++ target/ppc/mmu-hash32.c | 8 +++++--- target/ppc/mmu-hash64.c | 10 ++++++---- target/ppc/mmu-radix64.c | 6 ++++-- 4 files changed, 34 insertions(+), 9 deletions(-) -- 2.31.1 diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 184ba6d6b3..2b4b06eb76 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -228,4 +228,23 @@ void destroy_ppc_opcodes(PowerPCCPU *cpu); void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *ppc); gchar *ppc_gdb_arch_name(CPUState *cs); +/** + * prot_for_access_type: + * @access_type: Access type + * + * Return the protection bit required for the given access type. + */ +static inline int prot_for_access_type(MMUAccessType access_type) +{ + switch (access_type) { + case MMU_INST_FETCH: + return PAGE_EXEC; + case MMU_DATA_LOAD: + return PAGE_READ; + case MMU_DATA_STORE: + return PAGE_WRITE; + } + g_assert_not_reached(); +} + #endif /* PPC_INTERNAL_H */ diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index 178cf090b7..233a66658e 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -24,6 +24,7 @@ #include "exec/helper-proto.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" +#include "internal.h" #include "mmu-hash32.h" #include "exec/log.h" @@ -421,10 +422,11 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, hwaddr pte_offset; ppc_hash_pte32_t pte; int prot; - const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC}; + int need_prot; hwaddr raddr; assert((rwx == 0) || (rwx == 1) || (rwx == 2)); + need_prot = prot_for_access_type(rwx); /* 1. Handle real mode accesses */ if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) { @@ -440,7 +442,7 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, if (env->nb_BATs != 0) { raddr = ppc_hash32_bat_lookup(cpu, eaddr, rwx, &prot); if (raddr != -1) { - if (need_prot[rwx] & ~prot) { + if (need_prot & ~prot) { if (rwx == 2) { cs->exception_index = POWERPC_EXCP_ISI; env->error_code = 0x08000000; @@ -513,7 +515,7 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, prot = ppc_hash32_pte_prot(cpu, sr, pte); - if (need_prot[rwx] & ~prot) { + if (need_prot & ~prot) { /* Access right violation */ qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n"); if (rwx == 2) { diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index c4a4bc7cd2..d5b70ddc9c 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -29,6 +29,7 @@ #include "mmu-hash64.h" #include "exec/log.h" #include "hw/hw.h" +#include "internal.h" #include "mmu-book3s-v3.h" #include "helper_regs.h" @@ -876,7 +877,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, hwaddr ptex; ppc_hash_pte64_t pte; int exec_prot, pp_prot, amr_prot, prot; - const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC}; + int need_prot; hwaddr raddr; assert((rwx == 0) || (rwx == 1) || (rwx == 2)); @@ -996,7 +997,8 @@ skip_slb_search: amr_prot = ppc_hash64_amr_prot(cpu, pte); prot = exec_prot & pp_prot & amr_prot; - if ((need_prot[rwx] & ~prot) != 0) { + need_prot = prot_for_access_type(rwx); + if (need_prot & ~prot) { /* Access right violation */ qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n"); if (rwx == 2) { @@ -1012,13 +1014,13 @@ skip_slb_search: ppc_hash64_set_isi(cs, srr1); } else { int dsisr = 0; - if (need_prot[rwx] & ~pp_prot) { + if (need_prot & ~pp_prot) { dsisr |= DSISR_PROTFAULT; } if (rwx == 1) { dsisr |= DSISR_ISSTORE; } - if (need_prot[rwx] & ~amr_prot) { + if (need_prot & ~amr_prot) { dsisr |= DSISR_AMR; } ppc_hash64_set_dsi(cs, eaddr, dsisr); diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 30fcfcf11f..646b9afb7b 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -25,6 +25,7 @@ #include "sysemu/kvm.h" #include "kvm_ppc.h" #include "exec/log.h" +#include "internal.h" #include "mmu-radix64.h" #include "mmu-book3s-v3.h" @@ -135,7 +136,7 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, int rwx, uint64_t pte, bool partition_scoped) { CPUPPCState *env = &cpu->env; - const int need_prot[] = { PAGE_READ, PAGE_WRITE, PAGE_EXEC }; + int need_prot; /* Check Page Attributes (pte58:59) */ if (((pte & R_PTE_ATT) == R_PTE_ATT_NI_IO) && (rwx == 2)) { @@ -158,7 +159,8 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, int rwx, uint64_t pte, } /* Check if requested access type is allowed */ - if (need_prot[rwx] & ~(*prot)) { /* Page Protected for that Access */ + need_prot = prot_for_access_type(rwx); + if (need_prot & ~*prot) { /* Page Protected for that Access */ *fault_cause |= DSISR_PROTFAULT; return true; } From patchwork Wed May 19 12:51:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442421 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1319858jac; Wed, 19 May 2021 06:24:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzyOWhXFzxqgEsujKNRNnefKzZqFC0ITsFnNMOnu++e1XSBCpw6bwCXudlR0mEERxhy1uCZ X-Received: by 2002:a92:c5c2:: with SMTP id s2mr11266660ilt.231.1621430678656; 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[209.51.188.17]) by mx.google.com with ESMTPS id p15si27638203ilo.83.2021.05.19.06.24.38 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:24:38 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=YgfGhhWO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:36174 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMBi-0007Im-1X for patch@linaro.org; Wed, 19 May 2021 09:24:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33642) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhf-0002EK-UY; Wed, 19 May 2021 08:53:37 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:36347 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhc-0001UD-Q4; Wed, 19 May 2021 08:53:35 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnm2dghz9t5H; Wed, 19 May 2021 22:52:12 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428732; bh=2WfaI/nHHhODmul+aYqPpLdoPiebuDbaRAnku3lKfC8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YgfGhhWOxtlRfrj190kP81Ny0nZHpuRNEnqnKCDj44hWO1PHvAupkxy48EMRmL6n2 QSePwxCZrDv7eWxvxR5JTT4X1A3RrXs6Q/qjXrIAZMAkAjX9/VupagzSX8EF3g5Y47 c2qZX5aEOhn4vHPWW+mdRgYb2UkVGeNR4nlQRPEA= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 35/48] target/ppc: Use MMUAccessType in mmu-radix64.c Date: Wed, 19 May 2021 22:51:35 +1000 Message-Id: <20210519125148.27720-36-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We must leave the 'int rwx' parameter to ppc_radix64_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-3-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu-radix64.c | 119 ++++++++++++++++++++++++--------------- 1 file changed, 74 insertions(+), 45 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 646b9afb7b..7972153f23 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -75,71 +75,94 @@ static bool ppc_radix64_get_fully_qualified_addr(const CPUPPCState *env, return true; } -static void ppc_radix64_raise_segi(PowerPCCPU *cpu, int rwx, vaddr eaddr) +static void ppc_radix64_raise_segi(PowerPCCPU *cpu, MMUAccessType access_type, + vaddr eaddr) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; - if (rwx == 2) { /* Instruction Segment Interrupt */ + switch (access_type) { + case MMU_INST_FETCH: + /* Instruction Segment Interrupt */ cs->exception_index = POWERPC_EXCP_ISEG; - } else { /* Data Segment Interrupt */ + break; + case MMU_DATA_STORE: + case MMU_DATA_LOAD: + /* Data Segment Interrupt */ cs->exception_index = POWERPC_EXCP_DSEG; env->spr[SPR_DAR] = eaddr; + break; + default: + g_assert_not_reached(); } env->error_code = 0; } -static void ppc_radix64_raise_si(PowerPCCPU *cpu, int rwx, vaddr eaddr, - uint32_t cause) +static void ppc_radix64_raise_si(PowerPCCPU *cpu, MMUAccessType access_type, + vaddr eaddr, uint32_t cause) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; - if (rwx == 2) { /* Instruction Storage Interrupt */ + switch (access_type) { + case MMU_INST_FETCH: + /* Instruction Storage Interrupt */ cs->exception_index = POWERPC_EXCP_ISI; env->error_code = cause; - } else { /* Data Storage Interrupt */ + break; + case MMU_DATA_STORE: + cause |= DSISR_ISSTORE; + /* fall through */ + case MMU_DATA_LOAD: + /* Data Storage Interrupt */ cs->exception_index = POWERPC_EXCP_DSI; - if (rwx == 1) { /* Write -> Store */ - cause |= DSISR_ISSTORE; - } env->spr[SPR_DSISR] = cause; env->spr[SPR_DAR] = eaddr; env->error_code = 0; + break; + default: + g_assert_not_reached(); } } -static void ppc_radix64_raise_hsi(PowerPCCPU *cpu, int rwx, vaddr eaddr, - hwaddr g_raddr, uint32_t cause) +static void ppc_radix64_raise_hsi(PowerPCCPU *cpu, MMUAccessType access_type, + vaddr eaddr, hwaddr g_raddr, uint32_t cause) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; - if (rwx == 2) { /* H Instruction Storage Interrupt */ + switch (access_type) { + case MMU_INST_FETCH: + /* H Instruction Storage Interrupt */ cs->exception_index = POWERPC_EXCP_HISI; env->spr[SPR_ASDR] = g_raddr; env->error_code = cause; - } else { /* H Data Storage Interrupt */ + break; + case MMU_DATA_STORE: + cause |= DSISR_ISSTORE; + /* fall through */ + case MMU_DATA_LOAD: + /* H Data Storage Interrupt */ cs->exception_index = POWERPC_EXCP_HDSI; - if (rwx == 1) { /* Write -> Store */ - cause |= DSISR_ISSTORE; - } env->spr[SPR_HDSISR] = cause; env->spr[SPR_HDAR] = eaddr; env->spr[SPR_ASDR] = g_raddr; env->error_code = 0; + break; + default: + g_assert_not_reached(); } } -static bool ppc_radix64_check_prot(PowerPCCPU *cpu, int rwx, uint64_t pte, - int *fault_cause, int *prot, +static bool ppc_radix64_check_prot(PowerPCCPU *cpu, MMUAccessType access_type, + uint64_t pte, int *fault_cause, int *prot, bool partition_scoped) { CPUPPCState *env = &cpu->env; int need_prot; /* Check Page Attributes (pte58:59) */ - if (((pte & R_PTE_ATT) == R_PTE_ATT_NI_IO) && (rwx == 2)) { + if ((pte & R_PTE_ATT) == R_PTE_ATT_NI_IO && access_type == MMU_INST_FETCH) { /* * Radix PTE entries with the non-idempotent I/O attribute are treated * as guarded storage @@ -159,7 +182,7 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, int rwx, uint64_t pte, } /* Check if requested access type is allowed */ - need_prot = prot_for_access_type(rwx); + need_prot = prot_for_access_type(access_type); if (need_prot & ~*prot) { /* Page Protected for that Access */ *fault_cause |= DSISR_PROTFAULT; return true; @@ -168,15 +191,15 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, int rwx, uint64_t pte, return false; } -static void ppc_radix64_set_rc(PowerPCCPU *cpu, int rwx, uint64_t pte, - hwaddr pte_addr, int *prot) +static void ppc_radix64_set_rc(PowerPCCPU *cpu, MMUAccessType access_type, + uint64_t pte, hwaddr pte_addr, int *prot) { CPUState *cs = CPU(cpu); uint64_t npte; npte = pte | R_PTE_R; /* Always set reference bit */ - if (rwx == 1) { /* Store/Write */ + if (access_type == MMU_DATA_STORE) { /* Store/Write */ npte |= R_PTE_C; /* Set change bit */ } else { /* @@ -271,7 +294,8 @@ static bool validate_pate(PowerPCCPU *cpu, uint64_t lpid, ppc_v3_pate_t *pate) return true; } -static int ppc_radix64_partition_scoped_xlate(PowerPCCPU *cpu, int rwx, +static int ppc_radix64_partition_scoped_xlate(PowerPCCPU *cpu, + MMUAccessType access_type, vaddr eaddr, hwaddr g_raddr, ppc_v3_pate_t pate, hwaddr *h_raddr, int *h_prot, @@ -287,24 +311,25 @@ static int ppc_radix64_partition_scoped_xlate(PowerPCCPU *cpu, int rwx, if (ppc_radix64_walk_tree(CPU(cpu)->as, g_raddr, pate.dw0 & PRTBE_R_RPDB, pate.dw0 & PRTBE_R_RPDS, h_raddr, h_page_size, &pte, &fault_cause, &pte_addr) || - ppc_radix64_check_prot(cpu, rwx, pte, &fault_cause, h_prot, true)) { + ppc_radix64_check_prot(cpu, access_type, pte, &fault_cause, h_prot, true)) { if (pde_addr) { /* address being translated was that of a guest pde */ fault_cause |= DSISR_PRTABLE_FAULT; } if (guest_visible) { - ppc_radix64_raise_hsi(cpu, rwx, eaddr, g_raddr, fault_cause); + ppc_radix64_raise_hsi(cpu, access_type, eaddr, g_raddr, fault_cause); } return 1; } if (guest_visible) { - ppc_radix64_set_rc(cpu, rwx, pte, pte_addr, h_prot); + ppc_radix64_set_rc(cpu, access_type, pte, pte_addr, h_prot); } return 0; } -static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu, int rwx, +static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu, + MMUAccessType access_type, vaddr eaddr, uint64_t pid, ppc_v3_pate_t pate, hwaddr *g_raddr, int *g_prot, int *g_page_size, @@ -323,7 +348,7 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu, int rwx, if (offset >= size) { /* offset exceeds size of the process table */ if (guest_visible) { - ppc_radix64_raise_si(cpu, rwx, eaddr, DSISR_NOPTE); + ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_NOPTE); } return 1; } @@ -364,7 +389,7 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu, int rwx, if (ret) { /* No valid PTE */ if (guest_visible) { - ppc_radix64_raise_si(cpu, rwx, eaddr, fault_cause); + ppc_radix64_raise_si(cpu, access_type, eaddr, fault_cause); } return ret; } @@ -393,7 +418,7 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu, int rwx, if (ret) { /* No valid pte */ if (guest_visible) { - ppc_radix64_raise_si(cpu, rwx, eaddr, fault_cause); + ppc_radix64_raise_si(cpu, access_type, eaddr, fault_cause); } return ret; } @@ -407,16 +432,16 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu, int rwx, *g_raddr = (rpn & ~mask) | (eaddr & mask); } - if (ppc_radix64_check_prot(cpu, rwx, pte, &fault_cause, g_prot, false)) { + if (ppc_radix64_check_prot(cpu, access_type, pte, &fault_cause, g_prot, false)) { /* Access denied due to protection */ if (guest_visible) { - ppc_radix64_raise_si(cpu, rwx, eaddr, fault_cause); + ppc_radix64_raise_si(cpu, access_type, eaddr, fault_cause); } return 1; } if (guest_visible) { - ppc_radix64_set_rc(cpu, rwx, pte, pte_addr, g_prot); + ppc_radix64_set_rc(cpu, access_type, pte, pte_addr, g_prot); } return 0; @@ -439,7 +464,8 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU *cpu, int rwx, * | = On | Process Scoped | Scoped | * +-------------+----------------+---------------+ */ -static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, int rwx, +static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, + MMUAccessType access_type, bool relocation, hwaddr *raddr, int *psizep, int *protp, bool guest_visible) @@ -453,7 +479,7 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, int rwx, /* Virtual Mode Access - get the fully qualified address */ if (!ppc_radix64_get_fully_qualified_addr(&cpu->env, eaddr, &lpid, &pid)) { if (guest_visible) { - ppc_radix64_raise_segi(cpu, rwx, eaddr); + ppc_radix64_raise_segi(cpu, access_type, eaddr); } return 1; } @@ -466,13 +492,13 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, int rwx, } else { if (!ppc64_v3_get_pate(cpu, lpid, &pate)) { if (guest_visible) { - ppc_radix64_raise_si(cpu, rwx, eaddr, DSISR_NOPTE); + ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_NOPTE); } return 1; } if (!validate_pate(cpu, lpid, &pate)) { if (guest_visible) { - ppc_radix64_raise_si(cpu, rwx, eaddr, DSISR_R_BADCONFIG); + ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_R_BADCONFIG); } return 1; } @@ -490,7 +516,7 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, int rwx, * - Translates an effective address to a guest real address. */ if (relocation) { - int ret = ppc_radix64_process_scoped_xlate(cpu, rwx, eaddr, pid, + int ret = ppc_radix64_process_scoped_xlate(cpu, access_type, eaddr, pid, pate, &g_raddr, &prot, &psize, guest_visible); if (ret) { @@ -513,9 +539,10 @@ static int ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, int rwx, if (lpid || !msr_hv) { int ret; - ret = ppc_radix64_partition_scoped_xlate(cpu, rwx, eaddr, g_raddr, - pate, raddr, &prot, &psize, - false, guest_visible); + ret = ppc_radix64_partition_scoped_xlate(cpu, access_type, eaddr, + g_raddr, pate, raddr, + &prot, &psize, false, + guest_visible); if (ret) { return ret; } @@ -536,12 +563,14 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, CPUPPCState *env = &cpu->env; int page_size, prot; bool relocation; + MMUAccessType access_type; hwaddr raddr; assert(!(msr_hv && cpu->vhyp)); assert((rwx == 0) || (rwx == 1) || (rwx == 2)); + access_type = rwx; - relocation = ((rwx == 2) && (msr_ir == 1)) || ((rwx != 2) && (msr_dr == 1)); + relocation = (access_type == MMU_INST_FETCH ? msr_ir : msr_dr); /* HV or virtual hypervisor Real Mode Access */ if (!relocation && (msr_hv || cpu->vhyp)) { /* In real mode top 4 effective addr bits (mostly) ignored */ @@ -570,7 +599,7 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, } /* Translate eaddr to raddr (where raddr is addr qemu needs for access) */ - if (ppc_radix64_xlate(cpu, eaddr, rwx, relocation, &raddr, + if (ppc_radix64_xlate(cpu, eaddr, access_type, relocation, &raddr, &page_size, &prot, true)) { return 1; } From patchwork Wed May 19 12:51:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442412 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1311196jac; Wed, 19 May 2021 06:15:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzW2xr3by+Cx+/2t9jk/U1ui0UG/8EC1btZM0mzySSHmVg1+Fn1CreCcvbnoUqxvA7fkS/S X-Received: by 2002:a92:ddc6:: with SMTP id d6mr9201185ilr.51.1621430151653; Wed, 19 May 2021 06:15:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430151; cv=none; d=google.com; s=arc-20160816; b=C44wpwteYXEeTs1bsIk/QPaE24O6h4MOUelQsrNjv5ZFdff0OS3CYJa8Z8jJUdNvAA d7ExGKEM4nBPiurbT/xuhCl57To/LtRblJcX9GersIvWPspgnXjTrYJBAR5c1VmdDPo9 U7OfEKWkzHyqiQLpfNqpi6l4a+yKBARZ5d2rywqXOeXYUuHQw0SL/i5WkB7UYFj1kEQ2 y56AOxwLTJKC/XdWn4yI/jKV2NyHuxj+1Pr/AWhP1s0IlDWectQeEMz+f6eQE3E657UR 6r0l2MvsnbA/zbIbrcFxIIKfl8m4RRf0BdYex0oXdNWqL962o02hG7ghqz60vET/8kf7 ndLA== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id o67si27657676jao.17.2021.05.19.06.15.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:15:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=F4ZlgN5p; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:38766 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM3D-0005ZN-1Y for patch@linaro.org; Wed, 19 May 2021 09:15:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33658) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhh-0002FU-SK; Wed, 19 May 2021 08:53:39 -0400 Received: from ozlabs.org ([203.11.71.1]:43805) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhf-0001VL-5L; Wed, 19 May 2021 08:53:36 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnm5q53z9t5K; Wed, 19 May 2021 22:52:12 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428732; bh=IYhSONt3HOWROP9fH1P2QTeEPObXAsaix9l2v2Bmjac=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F4ZlgN5pOWLDPXSSVu27PqlSQnyd+DDXWPG+YsjagQyVSzBrHioul7gYFoM4VVy2W YyQHTg3xBPgImiUz3hW67wxKv5vwrBbmETX+1LVZPG6TVgXZCVTrLeziKw6Oqvi3uh 0wQYsf+zHMftt/RngsdjEVwIeaq9lmCPk03Hq2hE= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 36/48] target/ppc: Use MMUAccessType in mmu-hash64.c Date: Wed, 19 May 2021 22:51:36 +1000 Message-Id: <20210519125148.27720-37-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We must leave the 'int rwx' parameter to ppc_hash64_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Ricgard Henderson Message-Id: <20210518201146.794854-4-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu-hash64.c | 61 ++++++++++++++++++++++++++--------------- 1 file changed, 39 insertions(+), 22 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index d5b70ddc9c..f48b625f48 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -877,10 +877,12 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, hwaddr ptex; ppc_hash_pte64_t pte; int exec_prot, pp_prot, amr_prot, prot; + MMUAccessType access_type; int need_prot; hwaddr raddr; assert((rwx == 0) || (rwx == 1) || (rwx == 2)); + access_type = rwx; /* * Note on LPCR usage: 970 uses HID4, but our special variant of @@ -891,7 +893,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, */ /* 1. Handle real mode accesses */ - if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) { + if (access_type == MMU_INST_FETCH ? !msr_ir : !msr_dr) { /* * Translation is supposedly "off", but in real mode the top 4 * effective address bits are (mostly) ignored @@ -924,14 +926,19 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, /* Emulated old-style RMO mode, bounds check against RMLS */ if (raddr >= limit) { - if (rwx == 2) { + switch (access_type) { + case MMU_INST_FETCH: ppc_hash64_set_isi(cs, SRR1_PROTFAULT); - } else { - int dsisr = DSISR_PROTFAULT; - if (rwx == 1) { - dsisr |= DSISR_ISSTORE; - } - ppc_hash64_set_dsi(cs, eaddr, dsisr); + break; + case MMU_DATA_LOAD: + ppc_hash64_set_dsi(cs, eaddr, DSISR_PROTFAULT); + break; + case MMU_DATA_STORE: + ppc_hash64_set_dsi(cs, eaddr, + DSISR_PROTFAULT | DSISR_ISSTORE); + break; + default: + g_assert_not_reached(); } return 1; } @@ -954,13 +961,19 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, exit(1); } /* Segment still not found, generate the appropriate interrupt */ - if (rwx == 2) { + switch (access_type) { + case MMU_INST_FETCH: cs->exception_index = POWERPC_EXCP_ISEG; env->error_code = 0; - } else { + break; + case MMU_DATA_LOAD: + case MMU_DATA_STORE: cs->exception_index = POWERPC_EXCP_DSEG; env->error_code = 0; env->spr[SPR_DAR] = eaddr; + break; + default: + g_assert_not_reached(); } return 1; } @@ -968,7 +981,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, skip_slb_search: /* 3. Check for segment level no-execute violation */ - if ((rwx == 2) && (slb->vsid & SLB_VSID_N)) { + if (access_type == MMU_INST_FETCH && (slb->vsid & SLB_VSID_N)) { ppc_hash64_set_isi(cs, SRR1_NOEXEC_GUARD); return 1; } @@ -976,14 +989,18 @@ skip_slb_search: /* 4. Locate the PTE in the hash table */ ptex = ppc_hash64_htab_lookup(cpu, slb, eaddr, &pte, &apshift); if (ptex == -1) { - if (rwx == 2) { + switch (access_type) { + case MMU_INST_FETCH: ppc_hash64_set_isi(cs, SRR1_NOPTE); - } else { - int dsisr = DSISR_NOPTE; - if (rwx == 1) { - dsisr |= DSISR_ISSTORE; - } - ppc_hash64_set_dsi(cs, eaddr, dsisr); + break; + case MMU_DATA_LOAD: + ppc_hash64_set_dsi(cs, eaddr, DSISR_NOPTE); + break; + case MMU_DATA_STORE: + ppc_hash64_set_dsi(cs, eaddr, DSISR_NOPTE | DSISR_ISSTORE); + break; + default: + g_assert_not_reached(); } return 1; } @@ -997,11 +1014,11 @@ skip_slb_search: amr_prot = ppc_hash64_amr_prot(cpu, pte); prot = exec_prot & pp_prot & amr_prot; - need_prot = prot_for_access_type(rwx); + need_prot = prot_for_access_type(access_type); if (need_prot & ~prot) { /* Access right violation */ qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n"); - if (rwx == 2) { + if (access_type == MMU_INST_FETCH) { int srr1 = 0; if (PAGE_EXEC & ~exec_prot) { srr1 |= SRR1_NOEXEC_GUARD; /* Access violates noexec or guard */ @@ -1017,7 +1034,7 @@ skip_slb_search: if (need_prot & ~pp_prot) { dsisr |= DSISR_PROTFAULT; } - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { dsisr |= DSISR_ISSTORE; } if (need_prot & ~amr_prot) { @@ -1036,7 +1053,7 @@ skip_slb_search: ppc_hash64_set_r(cpu, ptex, pte.pte1); } if (!(pte.pte1 & HPTE64_R_C)) { - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { ppc_hash64_set_c(cpu, ptex, pte.pte1); } else { /* From patchwork Wed May 19 12:51:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442420 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1319452jac; Wed, 19 May 2021 06:24:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJym13/+WfYLhOQopI0nX7HZ87NFsLChA+gErCI21rwcRSI+8MJQT3U85TG2G6aINqHD68sm X-Received: by 2002:a05:6e02:6c8:: with SMTP id p8mr9903920ils.83.1621430654806; Wed, 19 May 2021 06:24:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430654; cv=none; d=google.com; s=arc-20160816; b=jDq00QMWgDU1xJJ9slE65kVAvl5+4GELNNgPrgrzjT9iCFEEX8lDBRmIq15kPKJLvi paNledCy+gmV4HMKm05yruCW9qzBlZApWsLtmu5bJ9jF/q5H1ekSs5MG6Hp/JHK2bKQr Y3UhrU0w0ZfCYyVs06riDSkSN/D8cmYCHhWZGQaKqJMhz3IS50OqpyZYuVPcQfvT48DX c8JyvXUQZHyhrhFZnerPPngQaA+ZiSVXPNSX9tLILkBB+ynRN1hAN62E1xY1CsgHYg1t jyryFPfJOONxr17rl/+HXPplVUwSSXPYbzgYr8yTq0EUwub44KM8maHyETiSnBpYSsP+ w3lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=SmATPfEUnOdH4wUa1ghGTuqJjdBFoj/PijBhaTgWTuo=; b=YiZEnNXkjIiJ+0386rlvbwx8cnZhrNC4mRMF1SYsqwb7tEKedu3GWtdbF2A6s9Lq4V pRLHuQWDHvRwOH03NXPRRsJncBrYtBdiFVTJFypmKk5AQVfO89vOZp2r0Etbv+tjq8SL q6EjzZzqZfp45PkNGZqzjRsUeTBCeZy/vc+Zw2878tE+Hc8YmkbkFix0LMgrOycl1EqD oq5xZ2kzLSYTceZffqJH/csP7IJLsX028Q+NnRRn0xgDo1off0wa63vjAEkwYJqWA6m2 q1rmxYzeu21CYEm1C4H+9Gr76YIMFB4UKgyp2LISxa2bzAT9DOvYn+HWtkVMMHiaLEZU FZkw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=qQekalPS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d70si16152890iog.4.2021.05.19.06.24.14 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:24:14 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=qQekalPS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:35314 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMBK-0006fl-7g for patch@linaro.org; Wed, 19 May 2021 09:24:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33680) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhj-0002G3-Qk; Wed, 19 May 2021 08:53:39 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:43857 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhg-0001Wu-Ns; Wed, 19 May 2021 08:53:39 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnn1fSCz9t5m; Wed, 19 May 2021 22:52:12 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428733; bh=jilhsORAop6g7BL+ey4S6C7MdUfCRRO3/4h7TeQoVKs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qQekalPSwRjPrDqB1fgEk6W56poTRsvRqlR6s/XO9c3JOJ1uPixhWSvPF/oOFLB6i zp1eqjlkUNrwnWnIGMATace2IYPyt6RpCAIKr3Z4PHtHPPMq/yyXHDl99obazxhJEr pLr29/Kzs3OVuJxy8FDaR8CxFQluyeVaTItgwIKw= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 37/48] target/ppc: Use MMUAccessType in mmu-hash32.c Date: Wed, 19 May 2021 22:51:37 +1000 Message-Id: <20210519125148.27720-38-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We must leave the 'int rwx' parameter to ppc_hash32_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-5-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu-hash32.c | 53 ++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 24 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index 233a66658e..744a763f44 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -153,16 +153,17 @@ static int hash32_bat_601_prot(PowerPCCPU *cpu, return ppc_hash32_pp_prot(key, pp, 0); } -static hwaddr ppc_hash32_bat_lookup(PowerPCCPU *cpu, target_ulong ea, int rwx, - int *prot) +static hwaddr ppc_hash32_bat_lookup(PowerPCCPU *cpu, target_ulong ea, + MMUAccessType access_type, int *prot) { CPUPPCState *env = &cpu->env; target_ulong *BATlt, *BATut; + bool ifetch = access_type == MMU_INST_FETCH; int i; LOG_BATS("%s: %cBAT v " TARGET_FMT_lx "\n", __func__, - rwx == 2 ? 'I' : 'D', ea); - if (rwx == 2) { + ifetch ? 'I' : 'D', ea); + if (ifetch) { BATlt = env->IBAT[1]; BATut = env->IBAT[0]; } else { @@ -181,7 +182,7 @@ static hwaddr ppc_hash32_bat_lookup(PowerPCCPU *cpu, target_ulong ea, int rwx, } LOG_BATS("%s: %cBAT%d v " TARGET_FMT_lx " BATu " TARGET_FMT_lx " BATl " TARGET_FMT_lx "\n", __func__, - type == ACCESS_CODE ? 'I' : 'D', i, ea, batu, batl); + ifetch ? 'I' : 'D', i, ea, batu, batl); if (mask && ((ea & mask) == (batu & BATU32_BEPI))) { hwaddr raddr = (batl & mask) | (ea & ~mask); @@ -209,7 +210,7 @@ static hwaddr ppc_hash32_bat_lookup(PowerPCCPU *cpu, target_ulong ea, int rwx, LOG_BATS("%s: %cBAT%d v " TARGET_FMT_lx " BATu " TARGET_FMT_lx " BATl " TARGET_FMT_lx "\n\t" TARGET_FMT_lx " " TARGET_FMT_lx " " TARGET_FMT_lx "\n", - __func__, type == ACCESS_CODE ? 'I' : 'D', i, ea, + __func__, ifetch ? 'I' : 'D', i, ea, *BATu, *BATl, BEPIu, BEPIl, bl); } } @@ -219,7 +220,8 @@ static hwaddr ppc_hash32_bat_lookup(PowerPCCPU *cpu, target_ulong ea, int rwx, } static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr, - target_ulong eaddr, int rwx, + target_ulong eaddr, + MMUAccessType access_type, hwaddr *raddr, int *prot) { CPUState *cs = CPU(cpu); @@ -240,7 +242,7 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr, return 0; } - if (rwx == 2) { + if (access_type == MMU_INST_FETCH) { /* No code fetch is allowed in direct-store areas */ cs->exception_index = POWERPC_EXCP_ISI; env->error_code = 0x10000000; @@ -261,7 +263,7 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr, /* lwarx, ldarx or srwcx. */ env->error_code = 0; env->spr[SPR_DAR] = eaddr; - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_DSISR] = 0x06000000; } else { env->spr[SPR_DSISR] = 0x04000000; @@ -281,7 +283,7 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr, cs->exception_index = POWERPC_EXCP_DSI; env->error_code = 0; env->spr[SPR_DAR] = eaddr; - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_DSISR] = 0x06100000; } else { env->spr[SPR_DSISR] = 0x04100000; @@ -291,14 +293,15 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr, cpu_abort(cs, "ERROR: instruction should not need " "address translation\n"); } - if ((rwx == 1 || key != 1) && (rwx == 0 || key != 0)) { + if ((access_type == MMU_DATA_STORE || key != 1) && + (access_type == MMU_DATA_LOAD || key != 0)) { *raddr = eaddr; return 0; } else { cs->exception_index = POWERPC_EXCP_DSI; env->error_code = 0; env->spr[SPR_DAR] = eaddr; - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_DSISR] = 0x0a000000; } else { env->spr[SPR_DSISR] = 0x08000000; @@ -423,13 +426,15 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, ppc_hash_pte32_t pte; int prot; int need_prot; + MMUAccessType access_type; hwaddr raddr; assert((rwx == 0) || (rwx == 1) || (rwx == 2)); - need_prot = prot_for_access_type(rwx); + access_type = rwx; + need_prot = prot_for_access_type(access_type); /* 1. Handle real mode accesses */ - if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) { + if (access_type == MMU_INST_FETCH ? !msr_ir : !msr_dr) { /* Translation is off */ raddr = eaddr; tlb_set_page(cs, eaddr & TARGET_PAGE_MASK, raddr & TARGET_PAGE_MASK, @@ -440,17 +445,17 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, /* 2. Check Block Address Translation entries (BATs) */ if (env->nb_BATs != 0) { - raddr = ppc_hash32_bat_lookup(cpu, eaddr, rwx, &prot); + raddr = ppc_hash32_bat_lookup(cpu, eaddr, access_type, &prot); if (raddr != -1) { if (need_prot & ~prot) { - if (rwx == 2) { + if (access_type == MMU_INST_FETCH) { cs->exception_index = POWERPC_EXCP_ISI; env->error_code = 0x08000000; } else { cs->exception_index = POWERPC_EXCP_DSI; env->error_code = 0; env->spr[SPR_DAR] = eaddr; - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_DSISR] = 0x0a000000; } else { env->spr[SPR_DSISR] = 0x08000000; @@ -471,7 +476,7 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, /* 4. Handle direct store segments */ if (sr & SR32_T) { - if (ppc_hash32_direct_store(cpu, sr, eaddr, rwx, + if (ppc_hash32_direct_store(cpu, sr, eaddr, access_type, &raddr, &prot) == 0) { tlb_set_page(cs, eaddr & TARGET_PAGE_MASK, raddr & TARGET_PAGE_MASK, prot, mmu_idx, @@ -483,7 +488,7 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, } /* 5. Check for segment level no-execute violation */ - if ((rwx == 2) && (sr & SR32_NX)) { + if (access_type == MMU_INST_FETCH && (sr & SR32_NX)) { cs->exception_index = POWERPC_EXCP_ISI; env->error_code = 0x10000000; return 1; @@ -492,14 +497,14 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, /* 6. Locate the PTE in the hash table */ pte_offset = ppc_hash32_htab_lookup(cpu, sr, eaddr, &pte); if (pte_offset == -1) { - if (rwx == 2) { + if (access_type == MMU_INST_FETCH) { cs->exception_index = POWERPC_EXCP_ISI; env->error_code = 0x40000000; } else { cs->exception_index = POWERPC_EXCP_DSI; env->error_code = 0; env->spr[SPR_DAR] = eaddr; - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_DSISR] = 0x42000000; } else { env->spr[SPR_DSISR] = 0x40000000; @@ -518,14 +523,14 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, if (need_prot & ~prot) { /* Access right violation */ qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n"); - if (rwx == 2) { + if (access_type == MMU_INST_FETCH) { cs->exception_index = POWERPC_EXCP_ISI; env->error_code = 0x08000000; } else { cs->exception_index = POWERPC_EXCP_DSI; env->error_code = 0; env->spr[SPR_DAR] = eaddr; - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_DSISR] = 0x0a000000; } else { env->spr[SPR_DSISR] = 0x08000000; @@ -542,7 +547,7 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, ppc_hash32_set_r(cpu, pte_offset, pte.pte1); } if (!(pte.pte1 & HPTE32_R_C)) { - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { ppc_hash32_set_c(cpu, pte_offset, pte.pte1); } else { /* From patchwork Wed May 19 12:51:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442422 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1321885jac; Wed, 19 May 2021 06:26:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz7BgrEduxhoOmjSC/eZOE1Zc/mSCW6z/u8s8bNy4V91g8eYUgrtlj7963za2HravLRrTl1 X-Received: by 2002:a02:7354:: with SMTP id a20mr9408203jae.94.1621430797751; Wed, 19 May 2021 06:26:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430797; cv=none; d=google.com; s=arc-20160816; b=B+NDiKa4fcEqZi5qaWwW/l0D01cNMvgF/cadJda8q4yLuZsLKwjGWGGd74v5+OekuG TWlb7KgFfLw15pDLUoPk6JZkeRXjlTGqMjSZqaw0dY7bqfPUZeFvvAfyZZJ6c+eo3OOD Oeiw93jeDSvHDMUTkHaHP61jiZ9jyvsy5yESKSCD5MFn3mX9n5Ei5huUQFWhiXpPHYwc H24452bvZ+TS0SeKrb1e9Yw0j+9Pc5vPDWhjqrz3WjT3b6rXK9WmF7JsNdBZivaSgZUN SF9lGmuxBTFBogK5FdcQ+erTkY4RFilytR4A3+3ha1DSoyreRtPFqiCC9cyU34xMNRcQ 9inQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Ye8lCXUKc9lcOtlPbXP3676ibzVIo+tQNxCXRcVSzQE=; b=LsEnlKywVLX7EaEKTQS+LDZaFxZDYHAMjOLPIJiEiW7K/3WC5JrJs/sfAF6Zcp1z7F H/TStGpHiJQzzyOjTipn7KxL5Mv0qdFzA3TtbSzMv8H7XUDktxhlHaQg3gC5tVeuSor7 W20Ueqw73XX7wKoblfjGbiNhoefiURgcrYOlQQqTwmO/e7Pho6/uwovAPqvGwjqKJkNB f4r0n35O4Hga+7cvmTzI302OBP2sLKw4bg08y5f60QMYQlyp7ZnwA1VXycO2FVidfYNe W2wxC27hVkjbYHDv2pjG4cqJf42odUy9dEct3Z+igtEBz0OrfFrQw/XbWkP/RoNTLSer qFug== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=GtQm5oYd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k14si7426125ilu.10.2021.05.19.06.26.37 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:26:37 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=GtQm5oYd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:39792 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMDd-0001Lq-4c for patch@linaro.org; Wed, 19 May 2021 09:26:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33682) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhj-0002G5-R3; Wed, 19 May 2021 08:53:39 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:36849 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhg-0001XG-S5; Wed, 19 May 2021 08:53:39 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnn3ZrDz9t6g; Wed, 19 May 2021 22:52:13 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428733; bh=8Cx0Xcv30VnMMMimRCOJL616awefrL2Emr7OvC8wVng=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GtQm5oYdvulYPgLT5shaM55ymslxYUZZQh8ByVOTg3GizjOXHIAuhkjN48f0wbhJW 2kj2ltVqXf+R9LZV1NoQxvycouOgNg4WS2bgjeOmyulJ0XQf5ABA5ndV1fZhBnHXsp IbVuZKfo7EsS9J58Fo79B2mZo2BxwH+EFl9Xn7bk= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 38/48] target/ppc: Rename access_type to type in mmu_helper.c Date: Wed, 19 May 2021 22:51:38 +1000 Message-Id: <20210519125148.27720-39-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The variable that holds ACCESS_INT, ACCESS_FLOAT, etc is variously called 'int type' or 'int access_type' within this file. Standardize on 'int type' throughout. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-6-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 64 ++++++++++++++++++++--------------------- 1 file changed, 32 insertions(+), 32 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 06e1ebdcbc..dd2f1e2a90 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -126,11 +126,11 @@ static int pp_check(int key, int pp, int nx) return access; } -static int check_prot(int prot, int rw, int access_type) +static int check_prot(int prot, int rw, int type) { int ret; - if (access_type == ACCESS_CODE) { + if (type == ACCESS_CODE) { if (prot & PAGE_EXEC) { ret = 0; } else { @@ -309,7 +309,7 @@ static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way, } static inline int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int access_type) + target_ulong eaddr, int rw, int type) { ppc6xx_tlb_t *tlb; int nr, best, way; @@ -319,7 +319,7 @@ static inline int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, ret = -1; /* No TLB found */ for (way = 0; way < env->nb_ways; way++) { nr = ppc6xx_tlb_getnum(env, eaddr, way, - access_type == ACCESS_CODE ? 1 : 0); + type == ACCESS_CODE ? 1 : 0); tlb = &env->tlb.tlb6[nr]; /* This test "emulates" the PTE index match for hardware TLBs */ if ((eaddr & TARGET_PAGE_MASK) != tlb->EPN) { @@ -333,9 +333,9 @@ static inline int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, TARGET_FMT_lx " %c %c\n", nr, env->nb_tlb, pte_is_valid(tlb->pte0) ? "valid" : "inval", tlb->EPN, eaddr, tlb->pte1, - rw ? 'S' : 'L', access_type == ACCESS_CODE ? 'I' : 'D'); + rw ? 'S' : 'L', type == ACCESS_CODE ? 'I' : 'D'); switch (ppc6xx_tlb_pte_check(ctx, tlb->pte0, tlb->pte1, - 0, rw, access_type)) { + 0, rw, type)) { case -3: /* TLB inconsistency */ return -1; @@ -683,7 +683,7 @@ static inline void ppc4xx_tlb_invalidate_all(CPUPPCState *env) static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong address, int rw, - int access_type) + int type) { ppcemb_tlb_t *tlb; hwaddr raddr; @@ -727,7 +727,7 @@ static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, check_perms: /* Check from TLB entry */ ctx->prot = tlb->prot; - ret = check_prot(ctx->prot, rw, access_type); + ret = check_prot(ctx->prot, rw, type); if (ret == -2) { env->spr[SPR_40x_ESR] = 0; } @@ -760,7 +760,7 @@ void store_40x_sler(CPUPPCState *env, uint32_t val) static inline int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb, hwaddr *raddr, int *prot, target_ulong address, int rw, - int access_type, int i) + int type, int i) { int ret, prot2; @@ -794,7 +794,7 @@ found_tlb: } /* Check the address space */ - if (access_type == ACCESS_CODE) { + if (type == ACCESS_CODE) { if (msr_ir != (tlb->attr & 1)) { LOG_SWTLB("%s: AS doesn't match\n", __func__); return -1; @@ -829,7 +829,7 @@ found_tlb: static int mmubooke_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong address, int rw, - int access_type) + int type) { ppcemb_tlb_t *tlb; hwaddr raddr; @@ -840,7 +840,7 @@ static int mmubooke_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, for (i = 0; i < env->nb_tlb; i++) { tlb = &env->tlb.tlbe[i]; ret = mmubooke_check_tlb(env, tlb, &raddr, &ctx->prot, address, rw, - access_type, i); + type, i); if (ret != -1) { break; } @@ -984,7 +984,7 @@ static bool mmubooke206_get_as(CPUPPCState *env, static int mmubooke206_check_tlb(CPUPPCState *env, ppcmas_tlb_t *tlb, hwaddr *raddr, int *prot, target_ulong address, int rw, - int access_type, int mmu_idx) + int type, int mmu_idx) { int ret; int prot2 = 0; @@ -1043,7 +1043,7 @@ found_tlb: } /* Check the address space and permissions */ - if (access_type == ACCESS_CODE) { + if (type == ACCESS_CODE) { /* There is no way to fetch code using epid load */ assert(!use_epid); if (msr_ir != ((tlb->mas1 & MAS1_TS) >> MAS1_TS_SHIFT)) { @@ -1080,7 +1080,7 @@ found_tlb: static int mmubooke206_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong address, int rw, - int access_type, int mmu_idx) + int type, int mmu_idx) { ppcmas_tlb_t *tlb; hwaddr raddr; @@ -1098,7 +1098,7 @@ static int mmubooke206_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, continue; } ret = mmubooke206_check_tlb(env, tlb, &raddr, &ctx->prot, address, - rw, access_type, mmu_idx); + rw, type, mmu_idx); if (ret != -1) { goto found_tlb; } @@ -1415,12 +1415,12 @@ static inline int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, static int get_physical_address_wtlb( CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int access_type, + target_ulong eaddr, int rw, int type, int mmu_idx) { int ret = -1; - bool real_mode = (access_type == ACCESS_CODE && msr_ir == 0) - || (access_type != ACCESS_CODE && msr_dr == 0); + bool real_mode = (type == ACCESS_CODE && msr_ir == 0) + || (type != ACCESS_CODE && msr_dr == 0); switch (env->mmu_model) { case POWERPC_MMU_SOFT_6xx: @@ -1430,11 +1430,11 @@ static int get_physical_address_wtlb( } else { /* Try to find a BAT */ if (env->nb_BATs != 0) { - ret = get_bat_6xx_tlb(env, ctx, eaddr, rw, access_type); + ret = get_bat_6xx_tlb(env, ctx, eaddr, rw, type); } if (ret < 0) { /* We didn't match any BAT entry or don't have BATs */ - ret = get_segment_6xx_tlb(env, ctx, eaddr, rw, access_type); + ret = get_segment_6xx_tlb(env, ctx, eaddr, rw, type); } } break; @@ -1445,16 +1445,16 @@ static int get_physical_address_wtlb( ret = check_physical(env, ctx, eaddr, rw); } else { ret = mmu40x_get_physical_address(env, ctx, eaddr, - rw, access_type); + rw, type); } break; case POWERPC_MMU_BOOKE: ret = mmubooke_get_physical_address(env, ctx, eaddr, - rw, access_type); + rw, type); break; case POWERPC_MMU_BOOKE206: ret = mmubooke206_get_physical_address(env, ctx, eaddr, rw, - access_type, mmu_idx); + type, mmu_idx); break; case POWERPC_MMU_MPC8xx: /* XXX: TODO */ @@ -1478,9 +1478,9 @@ static int get_physical_address_wtlb( static int get_physical_address( CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int access_type) + target_ulong eaddr, int rw, int type) { - return get_physical_address_wtlb(env, ctx, eaddr, rw, access_type, 0); + return get_physical_address_wtlb(env, ctx, eaddr, rw, type, 0); } hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) @@ -1584,19 +1584,19 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, CPUState *cs = env_cpu(env); PowerPCCPU *cpu = POWERPC_CPU(cs); mmu_ctx_t ctx; - int access_type; + int type; int ret = 0; if (rw == 2) { /* code access */ rw = 0; - access_type = ACCESS_CODE; + type = ACCESS_CODE; } else { /* data access */ - access_type = env->access_type; + type = env->access_type; } ret = get_physical_address_wtlb(env, &ctx, address, rw, - access_type, mmu_idx); + type, mmu_idx); if (ret == 0) { tlb_set_page(cs, address & TARGET_PAGE_MASK, ctx.raddr & TARGET_PAGE_MASK, ctx.prot, @@ -1604,7 +1604,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, ret = 0; } else if (ret < 0) { LOG_MMU_STATE(cs); - if (access_type == ACCESS_CODE) { + if (type == ACCESS_CODE) { switch (ret) { case -1: /* No matches in page tables or TLB */ @@ -1761,7 +1761,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, break; case -4: /* Direct store exception */ - switch (access_type) { + switch (type) { case ACCESS_FLOAT: /* Floating point load/store */ cs->exception_index = POWERPC_EXCP_ALIGN; From patchwork Wed May 19 12:51:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442425 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1323558jac; Wed, 19 May 2021 06:28:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzBqjHPY5iO3FEroz1W3zrlFn9C15hGtpO6xcTNOoMj4enYcRjHojweuNhklv150z5MClmB X-Received: by 2002:a05:6e02:ce:: with SMTP id r14mr10413201ilq.27.1621430905447; Wed, 19 May 2021 06:28:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430905; cv=none; d=google.com; s=arc-20160816; b=Uzh2o6vywgzWjUs6E8hVcAnHU84sZcwfj9YTShuuqk4m3LbibCJDBjqm4NLrkOcFgR XPdrakY1McHlq5H7779hHOX2KvC+9o4nRKfzuDFRcB7U1qhht4oW/M8E+HM/2DbQSjHc hNH5tEpOQEo15GzZzlxQRh+bok1RoYjgjv3LtblVYuQ2lyiOZlOL7TBY/XboPnPVf+56 p4pMYW9htiPaWEnPWzzY53JZjH+FHxbItdXvSNxqOS1CFhNDMZmtwO+VV39e1MZDxdEk UObLQVXaOXmRg095yvJpLW0QDfhWqtz0C94jDeACj7X/UFovFxW62vEbn0TvB1pBjUjW fWhg== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id w36si12075185jal.44.2021.05.19.06.28.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:28:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=GJ8xLJBq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:48006 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMFM-00074d-Nq for patch@linaro.org; Wed, 19 May 2021 09:28:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33716) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhn-0002J9-KS; Wed, 19 May 2021 08:53:43 -0400 Received: from ozlabs.org ([203.11.71.1]:56193) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhi-0001Xn-Gi; Wed, 19 May 2021 08:53:41 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnn5XRbz9t8j; Wed, 19 May 2021 22:52:13 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428733; bh=yQBabRRU7PlaDJyvINepyYXw7qIIxDtf9r8sGF6DQjA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GJ8xLJBqGdXj9bYbI6EHPkSDhz7jlJDToCH4EB/YvvaoVPJzjXKxruyBymfGWePKV 73F1KbWJd5jsQ9Kp87+7Oj/KSZwtuu29eQO989bC7CJUcAk4r7+dTTVOTp2tgOVSfy pLQ2lwafSXtIM/T3OpEjZERIODLaUAJ4CJH1yDvs= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 39/48] target/ppc: Use MMUAccessType in mmu_helper.c Date: Wed, 19 May 2021 22:51:39 +1000 Message-Id: <20210519125148.27720-40-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson This replaces 'int rw' with 'MMUAccessType access_type'. Comparisons vs zero become either MMU_DATA_LOAD or MMU_DATA_STORE, since we had previously squashed rw to 0 for code access. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-7-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 161 +++++++++++++++++++++------------------- 1 file changed, 85 insertions(+), 76 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index dd2f1e2a90..2aa1b777de 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -126,7 +126,7 @@ static int pp_check(int key, int pp, int nx) return access; } -static int check_prot(int prot, int rw, int type) +static int check_prot(int prot, MMUAccessType access_type, int type) { int ret; @@ -136,7 +136,7 @@ static int check_prot(int prot, int rw, int type) } else { ret = -2; } - } else if (rw) { + } else if (access_type == MMU_DATA_STORE) { if (prot & PAGE_WRITE) { ret = 0; } else { @@ -153,9 +153,9 @@ static int check_prot(int prot, int rw, int type) return ret; } -static inline int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, - target_ulong pte1, int h, - int rw, int type) +static int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, + target_ulong pte1, int h, + MMUAccessType access_type, int type) { target_ulong ptem, mmask; int access, ret, pteh, ptev, pp; @@ -182,7 +182,7 @@ static inline int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, /* Keep the matching PTE information */ ctx->raddr = pte1; ctx->prot = access; - ret = check_prot(ctx->prot, rw, type); + ret = check_prot(ctx->prot, access_type, type); if (ret == 0) { /* Access granted */ qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n"); @@ -197,7 +197,7 @@ static inline int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, } static int pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p, - int ret, int rw) + int ret, MMUAccessType access_type) { int store = 0; @@ -208,7 +208,7 @@ static int pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p, store = 1; } if (!(*pte1p & 0x00000080)) { - if (rw == 1 && ret == 0) { + if (access_type == MMU_DATA_STORE && ret == 0) { /* Update changed flag */ *pte1p |= 0x00000080; store = 1; @@ -308,8 +308,9 @@ static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way, env->last_way = way; } -static inline int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int type) +static int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, + target_ulong eaddr, + MMUAccessType access_type, int type) { ppc6xx_tlb_t *tlb; int nr, best, way; @@ -333,9 +334,10 @@ static inline int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, TARGET_FMT_lx " %c %c\n", nr, env->nb_tlb, pte_is_valid(tlb->pte0) ? "valid" : "inval", tlb->EPN, eaddr, tlb->pte1, - rw ? 'S' : 'L', type == ACCESS_CODE ? 'I' : 'D'); + access_type == MMU_DATA_STORE ? 'S' : 'L', + type == ACCESS_CODE ? 'I' : 'D'); switch (ppc6xx_tlb_pte_check(ctx, tlb->pte0, tlb->pte1, - 0, rw, type)) { + 0, access_type, type)) { case -3: /* TLB inconsistency */ return -1; @@ -366,7 +368,7 @@ static inline int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, LOG_SWTLB("found TLB at addr " TARGET_FMT_plx " prot=%01x ret=%d\n", ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret); /* Update page flags */ - pte_update_flags(ctx, &env->tlb.tlb6[best].pte1, ret, rw); + pte_update_flags(ctx, &env->tlb.tlb6[best].pte1, ret, access_type); } return ret; @@ -400,7 +402,8 @@ static inline void bat_size_prot(CPUPPCState *env, target_ulong *blp, } static int get_bat_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong virtual, int rw, int type) + target_ulong virtual, MMUAccessType access_type, + int type) { target_ulong *BATlt, *BATut, *BATu, *BATl; target_ulong BEPIl, BEPIu, bl; @@ -438,7 +441,7 @@ static int get_bat_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, (virtual & 0x0001F000); /* Compute access rights */ ctx->prot = prot; - ret = check_prot(ctx->prot, rw, type); + ret = check_prot(ctx->prot, access_type, type); if (ret == 0) { LOG_BATS("BAT %d match: r " TARGET_FMT_plx " prot=%c%c\n", i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-', @@ -472,8 +475,9 @@ static int get_bat_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, } /* Perform segment based translation */ -static inline int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int type) +static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, + target_ulong eaddr, MMUAccessType access_type, + int type) { PowerPCCPU *cpu = env_archcpu(env); hwaddr hash; @@ -497,7 +501,7 @@ static inline int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, " nip=" TARGET_FMT_lx " lr=" TARGET_FMT_lx " ir=%d dr=%d pr=%d %d t=%d\n", eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr, (int)msr_ir, - (int)msr_dr, pr != 0 ? 1 : 0, rw, type); + (int)msr_dr, pr != 0 ? 1 : 0, access_type == MMU_DATA_STORE, type); pgidx = (eaddr & ~SEGMENT_MASK_256M) >> target_page_bits; hash = vsid ^ pgidx; ctx->ptem = (vsid << 7) | (pgidx >> 10); @@ -520,7 +524,7 @@ static inline int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, /* Initialize real address with an invalid value */ ctx->raddr = (hwaddr)-1ULL; /* Software TLB search */ - ret = ppc6xx_tlb_check(env, ctx, eaddr, rw, type); + ret = ppc6xx_tlb_check(env, ctx, eaddr, access_type, type); #if defined(DUMP_PAGE_TABLES) if (qemu_loglevel_mask(CPU_LOG_MMU)) { CPUState *cs = env_cpu(env); @@ -603,7 +607,8 @@ static inline int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, "address translation\n"); return -4; } - if ((rw == 1 || ctx->key != 1) && (rw == 0 || ctx->key != 0)) { + if ((access_type == MMU_DATA_STORE || ctx->key != 1) && + (access_type == MMU_DATA_LOAD || ctx->key != 0)) { ctx->raddr = eaddr; ret = 2; } else { @@ -682,7 +687,8 @@ static inline void ppc4xx_tlb_invalidate_all(CPUPPCState *env) } static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong address, int rw, + target_ulong address, + MMUAccessType access_type, int type) { ppcemb_tlb_t *tlb; @@ -700,8 +706,8 @@ static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, } zsel = (tlb->attr >> 4) & 0xF; zpr = (env->spr[SPR_40x_ZPR] >> (30 - (2 * zsel))) & 0x3; - LOG_SWTLB("%s: TLB %d zsel %d zpr %d rw %d attr %08x\n", - __func__, i, zsel, zpr, rw, tlb->attr); + LOG_SWTLB("%s: TLB %d zsel %d zpr %d ty %d attr %08x\n", + __func__, i, zsel, zpr, access_type, tlb->attr); /* Check execute enable bit */ switch (zpr) { case 0x2: @@ -727,7 +733,7 @@ static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, check_perms: /* Check from TLB entry */ ctx->prot = tlb->prot; - ret = check_prot(ctx->prot, rw, type); + ret = check_prot(ctx->prot, access_type, type); if (ret == -2) { env->spr[SPR_40x_ESR] = 0; } @@ -757,10 +763,9 @@ void store_40x_sler(CPUPPCState *env, uint32_t val) env->spr[SPR_405_SLER] = val; } -static inline int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb, - hwaddr *raddr, int *prot, - target_ulong address, int rw, - int type, int i) +static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb, + hwaddr *raddr, int *prot, target_ulong address, + MMUAccessType access_type, int type, int i) { int ret, prot2; @@ -815,7 +820,7 @@ found_tlb: } *prot = prot2; - if ((!rw && prot2 & PAGE_READ) || (rw && (prot2 & PAGE_WRITE))) { + if (prot2 & (access_type == MMU_DATA_LOAD ? PAGE_READ : PAGE_WRITE)) { LOG_SWTLB("%s: found TLB!\n", __func__); return 0; } @@ -828,7 +833,8 @@ found_tlb: } static int mmubooke_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong address, int rw, + target_ulong address, + MMUAccessType access_type, int type) { ppcemb_tlb_t *tlb; @@ -839,8 +845,8 @@ static int mmubooke_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, raddr = (hwaddr)-1ULL; for (i = 0; i < env->nb_tlb; i++) { tlb = &env->tlb.tlbe[i]; - ret = mmubooke_check_tlb(env, tlb, &raddr, &ctx->prot, address, rw, - type, i); + ret = mmubooke_check_tlb(env, tlb, &raddr, &ctx->prot, address, + access_type, type, i); if (ret != -1) { break; } @@ -938,10 +944,10 @@ static bool is_epid_mmu(int mmu_idx) return mmu_idx == PPC_TLB_EPID_STORE || mmu_idx == PPC_TLB_EPID_LOAD; } -static uint32_t mmubooke206_esr(int mmu_idx, bool rw) +static uint32_t mmubooke206_esr(int mmu_idx, MMUAccessType access_type) { uint32_t esr = 0; - if (rw) { + if (access_type == MMU_DATA_STORE) { esr |= ESR_ST; } if (is_epid_mmu(mmu_idx)) { @@ -983,7 +989,8 @@ static bool mmubooke206_get_as(CPUPPCState *env, /* Check if the tlb found by hashing really matches */ static int mmubooke206_check_tlb(CPUPPCState *env, ppcmas_tlb_t *tlb, hwaddr *raddr, int *prot, - target_ulong address, int rw, + target_ulong address, + MMUAccessType access_type, int type, int mmu_idx) { int ret; @@ -1066,7 +1073,7 @@ found_tlb: } *prot = prot2; - if ((!rw && prot2 & PAGE_READ) || (rw && (prot2 & PAGE_WRITE))) { + if (prot2 & (access_type == MMU_DATA_LOAD ? PAGE_READ : PAGE_WRITE)) { LOG_SWTLB("%s: found TLB!\n", __func__); return 0; } @@ -1079,7 +1086,8 @@ found_tlb: } static int mmubooke206_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong address, int rw, + target_ulong address, + MMUAccessType access_type, int type, int mmu_idx) { ppcmas_tlb_t *tlb; @@ -1098,7 +1106,7 @@ static int mmubooke206_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, continue; } ret = mmubooke206_check_tlb(env, tlb, &raddr, &ctx->prot, address, - rw, type, mmu_idx); + access_type, type, mmu_idx); if (ret != -1) { goto found_tlb; } @@ -1361,8 +1369,8 @@ void dump_mmu(CPUPPCState *env) } } -static inline int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw) +static int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong eaddr, + MMUAccessType access_type) { int in_plb, ret; @@ -1393,7 +1401,7 @@ static inline int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, eaddr >= env->pb[2] && eaddr < env->pb[3]) ? 1 : 0; if (in_plb ^ msr_px) { /* Access in protected area */ - if (rw == 1) { + if (access_type == MMU_DATA_STORE) { /* Access is not allowed */ ret = -2; } @@ -1413,10 +1421,10 @@ static inline int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, return ret; } -static int get_physical_address_wtlb( - CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int type, - int mmu_idx) +static int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx, + target_ulong eaddr, + MMUAccessType access_type, int type, + int mmu_idx) { int ret = -1; bool real_mode = (type == ACCESS_CODE && msr_ir == 0) @@ -1426,15 +1434,15 @@ static int get_physical_address_wtlb( case POWERPC_MMU_SOFT_6xx: case POWERPC_MMU_SOFT_74xx: if (real_mode) { - ret = check_physical(env, ctx, eaddr, rw); + ret = check_physical(env, ctx, eaddr, access_type); } else { /* Try to find a BAT */ if (env->nb_BATs != 0) { - ret = get_bat_6xx_tlb(env, ctx, eaddr, rw, type); + ret = get_bat_6xx_tlb(env, ctx, eaddr, access_type, type); } if (ret < 0) { /* We didn't match any BAT entry or don't have BATs */ - ret = get_segment_6xx_tlb(env, ctx, eaddr, rw, type); + ret = get_segment_6xx_tlb(env, ctx, eaddr, access_type, type); } } break; @@ -1442,18 +1450,18 @@ static int get_physical_address_wtlb( case POWERPC_MMU_SOFT_4xx: case POWERPC_MMU_SOFT_4xx_Z: if (real_mode) { - ret = check_physical(env, ctx, eaddr, rw); + ret = check_physical(env, ctx, eaddr, access_type); } else { ret = mmu40x_get_physical_address(env, ctx, eaddr, - rw, type); + access_type, type); } break; case POWERPC_MMU_BOOKE: ret = mmubooke_get_physical_address(env, ctx, eaddr, - rw, type); + access_type, type); break; case POWERPC_MMU_BOOKE206: - ret = mmubooke206_get_physical_address(env, ctx, eaddr, rw, + ret = mmubooke206_get_physical_address(env, ctx, eaddr, access_type, type, mmu_idx); break; case POWERPC_MMU_MPC8xx: @@ -1462,7 +1470,7 @@ static int get_physical_address_wtlb( break; case POWERPC_MMU_REAL: if (real_mode) { - ret = check_physical(env, ctx, eaddr, rw); + ret = check_physical(env, ctx, eaddr, access_type); } else { cpu_abort(env_cpu(env), "PowerPC in real mode do not do any translation\n"); @@ -1476,11 +1484,11 @@ static int get_physical_address_wtlb( return ret; } -static int get_physical_address( - CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int type) +static int get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, + target_ulong eaddr, MMUAccessType access_type, + int type) { - return get_physical_address_wtlb(env, ctx, eaddr, rw, type, 0); + return get_physical_address_wtlb(env, ctx, eaddr, access_type, type, 0); } hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) @@ -1508,14 +1516,15 @@ hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) ; } - if (unlikely(get_physical_address(env, &ctx, addr, 0, ACCESS_INT) != 0)) { + if (unlikely(get_physical_address(env, &ctx, addr, MMU_DATA_LOAD, + ACCESS_INT) != 0)) { /* * Some MMUs have separate TLBs for code and data. If we only * try an ACCESS_INT, we may not be able to read instructions * mapped by code TLBs, so we also try a ACCESS_CODE. */ - if (unlikely(get_physical_address(env, &ctx, addr, 0, + if (unlikely(get_physical_address(env, &ctx, addr, MMU_INST_FETCH, ACCESS_CODE) != 0)) { return -1; } @@ -1525,13 +1534,14 @@ hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) } static void booke206_update_mas_tlb_miss(CPUPPCState *env, target_ulong address, - int rw, int mmu_idx) + MMUAccessType access_type, int mmu_idx) { uint32_t epid; bool as, pr; uint32_t missed_tid = 0; bool use_epid = mmubooke206_get_as(env, mmu_idx, &epid, &as, &pr); - if (rw == 2) { + + if (access_type == MMU_INST_FETCH) { as = msr_ir; } env->spr[SPR_BOOKE_MAS0] = env->spr[SPR_BOOKE_MAS4] & MAS4_TLBSELD_MASK; @@ -1579,7 +1589,7 @@ static void booke206_update_mas_tlb_miss(CPUPPCState *env, target_ulong address, /* Perform address translation */ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, - int rw, int mmu_idx) + MMUAccessType access_type, int mmu_idx) { CPUState *cs = env_cpu(env); PowerPCCPU *cpu = POWERPC_CPU(cs); @@ -1587,15 +1597,14 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, int type; int ret = 0; - if (rw == 2) { + if (access_type == MMU_INST_FETCH) { /* code access */ - rw = 0; type = ACCESS_CODE; } else { /* data access */ type = env->access_type; } - ret = get_physical_address_wtlb(env, &ctx, address, rw, + ret = get_physical_address_wtlb(env, &ctx, address, access_type, type, mmu_idx); if (ret == 0) { tlb_set_page(cs, address & TARGET_PAGE_MASK, @@ -1632,7 +1641,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, cs->exception_index = POWERPC_EXCP_ITLB; env->error_code = 0; env->spr[SPR_BOOKE_DEAR] = address; - env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, 0); + env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, MMU_DATA_LOAD); return -1; case POWERPC_MMU_MPC8xx: /* XXX: TODO */ @@ -1674,7 +1683,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, /* No matches in page tables or TLB */ switch (env->mmu_model) { case POWERPC_MMU_SOFT_6xx: - if (rw == 1) { + if (access_type == MMU_DATA_STORE) { cs->exception_index = POWERPC_EXCP_DSTLB; env->error_code = 1 << 16; } else { @@ -1691,7 +1700,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, get_pteg_offset32(cpu, ctx.hash[1]); break; case POWERPC_MMU_SOFT_74xx: - if (rw == 1) { + if (access_type == MMU_DATA_STORE) { cs->exception_index = POWERPC_EXCP_DSTLB; } else { cs->exception_index = POWERPC_EXCP_DLTLB; @@ -1708,7 +1717,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, cs->exception_index = POWERPC_EXCP_DTLB; env->error_code = 0; env->spr[SPR_40x_DEAR] = address; - if (rw) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_40x_ESR] = 0x00800000; } else { env->spr[SPR_40x_ESR] = 0x00000000; @@ -1719,13 +1728,13 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, cpu_abort(cs, "MPC8xx MMU model is not implemented\n"); break; case POWERPC_MMU_BOOKE206: - booke206_update_mas_tlb_miss(env, address, rw, mmu_idx); + booke206_update_mas_tlb_miss(env, address, access_type, mmu_idx); /* fall through */ case POWERPC_MMU_BOOKE: cs->exception_index = POWERPC_EXCP_DTLB; env->error_code = 0; env->spr[SPR_BOOKE_DEAR] = address; - env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, rw); + env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); return -1; case POWERPC_MMU_REAL: cpu_abort(cs, "PowerPC in real mode should never raise " @@ -1743,16 +1752,16 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, if (env->mmu_model == POWERPC_MMU_SOFT_4xx || env->mmu_model == POWERPC_MMU_SOFT_4xx_Z) { env->spr[SPR_40x_DEAR] = address; - if (rw) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_40x_ESR] |= 0x00800000; } } else if ((env->mmu_model == POWERPC_MMU_BOOKE) || (env->mmu_model == POWERPC_MMU_BOOKE206)) { env->spr[SPR_BOOKE_DEAR] = address; - env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, rw); + env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); } else { env->spr[SPR_DAR] = address; - if (rw == 1) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_DSISR] = 0x0A000000; } else { env->spr[SPR_DSISR] = 0x08000000; @@ -1773,7 +1782,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, cs->exception_index = POWERPC_EXCP_DSI; env->error_code = 0; env->spr[SPR_DAR] = address; - if (rw == 1) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_DSISR] = 0x06000000; } else { env->spr[SPR_DSISR] = 0x04000000; @@ -1784,7 +1793,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, cs->exception_index = POWERPC_EXCP_DSI; env->error_code = 0; env->spr[SPR_DAR] = address; - if (rw == 1) { + if (access_type == MMU_DATA_STORE) { env->spr[SPR_DSISR] = 0x06100000; } else { env->spr[SPR_DSISR] = 0x04100000; From patchwork Wed May 19 12:51:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442423 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1322148jac; Wed, 19 May 2021 06:26:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyhTw//Uzj+u20q36nGBL4gGNZJtMXUQ1QBlt62f2t4qOjwxuv17DcZ6BjgzTqFIzCte9JN X-Received: by 2002:a6b:e703:: with SMTP id b3mr9513085ioh.115.1621430814634; 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mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=n3KAM+HZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id b12si25916173jai.103.2021.05.19.06.26.54 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:26:54 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=n3KAM+HZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:43124 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMDu-0003gt-4J for patch@linaro.org; Wed, 19 May 2021 09:26:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33702) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhl-0002Hv-Nf; Wed, 19 May 2021 08:53:43 -0400 Received: from ozlabs.org ([203.11.71.1]:50731) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhi-0001Xp-E2; Wed, 19 May 2021 08:53:40 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnp1JT1z9t9y; Wed, 19 May 2021 22:52:13 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428734; bh=YLQV41tCRO0Sn+ZD8X4LB0WgTPfP62gFsVq0Rcx24EI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n3KAM+HZOnlUAtSE3L4VD8o1tH3ngwXlVveTnBZe1HowlL/F0MW0DNJDefuFVNmuk Rr4C2hJvYm8gkTRne9PE3VRZotWJhSOHcjZe7LIh1n3IIljilvYZ3ufEJhl7b8GDMR PtoGKCXnUp83YbEi2G3J6oRyazJEspehcokACcsw= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 40/48] target/ppc: Remove type argument from check_prot Date: Wed, 19 May 2021 22:51:40 +1000 Message-Id: <20210519125148.27720-41-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We can now use MMU_INST_FETCH from access_type for this. Use prot_for_access_type to simplify everything. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-8-richard.henderson@linaro.org> [dwg: Remove a stray trailing whitespace] Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 33 ++++++--------------------------- 1 file changed, 6 insertions(+), 27 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 2aa1b777de..2c813af924 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -32,6 +32,7 @@ #include "qemu/error-report.h" #include "qemu/main-loop.h" #include "qemu/qemu-print.h" +#include "internal.h" #include "mmu-book3s-v3.h" #include "mmu-radix64.h" @@ -126,31 +127,9 @@ static int pp_check(int key, int pp, int nx) return access; } -static int check_prot(int prot, MMUAccessType access_type, int type) +static int check_prot(int prot, MMUAccessType access_type) { - int ret; - - if (type == ACCESS_CODE) { - if (prot & PAGE_EXEC) { - ret = 0; - } else { - ret = -2; - } - } else if (access_type == MMU_DATA_STORE) { - if (prot & PAGE_WRITE) { - ret = 0; - } else { - ret = -2; - } - } else { - if (prot & PAGE_READ) { - ret = 0; - } else { - ret = -2; - } - } - - return ret; + return prot & prot_for_access_type(access_type) ? 0 : -2; } static int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, @@ -182,7 +161,7 @@ static int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, /* Keep the matching PTE information */ ctx->raddr = pte1; ctx->prot = access; - ret = check_prot(ctx->prot, access_type, type); + ret = check_prot(ctx->prot, access_type); if (ret == 0) { /* Access granted */ qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n"); @@ -441,7 +420,7 @@ static int get_bat_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, (virtual & 0x0001F000); /* Compute access rights */ ctx->prot = prot; - ret = check_prot(ctx->prot, access_type, type); + ret = check_prot(ctx->prot, access_type); if (ret == 0) { LOG_BATS("BAT %d match: r " TARGET_FMT_plx " prot=%c%c\n", i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-', @@ -733,7 +712,7 @@ static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, check_perms: /* Check from TLB entry */ ctx->prot = tlb->prot; - ret = check_prot(ctx->prot, access_type, type); + ret = check_prot(ctx->prot, access_type); if (ret == -2) { env->spr[SPR_40x_ESR] = 0; } From patchwork Wed May 19 12:51:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442418 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1317038jac; Wed, 19 May 2021 06:21:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzDy1A63i6cKkk1k0h6dojIZJWbo4JE0f8VT90sqZGnPfZveDM/vF5nmSyijs27I5ToBZB7 X-Received: by 2002:a92:ad07:: with SMTP id w7mr9990216ilh.98.1621430512698; Wed, 19 May 2021 06:21:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430512; cv=none; d=google.com; s=arc-20160816; b=lQo3QlqU1O0ho2mj8HdSGJA1B9tNOg1Be45TbD4Hbr2b/0ZGuCwN8Plbw6Rr3h69sE hdiCkdE8PrcNoH33nwu7yy8jHPX94NL98MXWU2K2yQPJGPRqGTQycBjDubA232+G+ohM S5jtx2i4YCneLNkVsbSXW+C0eZV4MDhgBsBTSEAZ9fq9zQLCo5WQE/P9IdJFYaS6S3Bu 8w+vkrvulD3oHpxoG3wObFna7j6no+Y4n9VUtOni1hMQzAZEb8Xy6VXhCIa4zBqKEZPK vBK4ggT4/KtG4qsnNb4blesN/iZP5DWSkKIP1DElNRUtkWtTj4+qzYEBx86ulbidVvrv gg4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=27wNmt46GzhdTSCGzQEnXEu5lRzljZgaEZJrLD8rjFo=; b=Zl2ElKRScyZsNZPMuOd84EQB2Kn2od9bWXt8eqcvMBgtuwFUajk1Z4/exFS6w7i2X4 Wi9Bpfb0ar9Ol1ia4CV9YzCDb93qvMzW2OW8OVC+rpRWPAIS/UEuaneDNhB4oxDOX7/x vOt3rO7ygqgUdkT2YKiMTIp9D/jQ21Z/GwBsRnjBnzxHK4il9PnIvjNp3T4Syx5a6Uv6 2GmtAiZYZgj1H63Zl0LT7fggCjrRK9j2jDxDqQVH9z+z7NCt9ka5GTifwxJ1GHYQP6o+ VVE6YZWPRBbusExxswqpCLMPk+9B6NU/7ZZjsWZuVk6WbJUBx7okfDuWpmknD0Xf45++ BXCg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=YdDSE1AO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id b1si24914344ioh.94.2021.05.19.06.21.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:21:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=YdDSE1AO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:55074 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM92-0000hg-4d for patch@linaro.org; Wed, 19 May 2021 09:21:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33604) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhT-00023C-As; Wed, 19 May 2021 08:53:23 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:59893) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhR-0001Zw-Dz; Wed, 19 May 2021 08:53:22 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnp57Cmz9tB1; Wed, 19 May 2021 22:52:14 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428734; bh=4JnAYd9TRyRFu4bSK2imsM+WTU2zQGtEP0etK1q9SSg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YdDSE1AOW4z8k3HUiuqrAzhk0kARUEBpONkvF+QH96mGh3FsFgCszm2cQG0aJaZSq mSIpggS0NMAJwfmKua130XWHmGf7ecq25rlIsEv5vnUMPp81GdURYC96YpDBQgVwEU 5hXf4ZJevIIGzkTZSSo1j3S1DYh9t6l9NhCUo8FM= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 41/48] target/ppc: Remove type argument from ppc6xx_tlb_pte_check Date: Wed, 19 May 2021 22:51:41 +1000 Message-Id: <20210519125148.27720-42-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson It is no longer used. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-9-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 2c813af924..0c10677ade 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -134,7 +134,7 @@ static int check_prot(int prot, MMUAccessType access_type) static int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, target_ulong pte1, int h, - MMUAccessType access_type, int type) + MMUAccessType access_type) { target_ulong ptem, mmask; int access, ret, pteh, ptev, pp; @@ -316,7 +316,7 @@ static int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, access_type == MMU_DATA_STORE ? 'S' : 'L', type == ACCESS_CODE ? 'I' : 'D'); switch (ppc6xx_tlb_pte_check(ctx, tlb->pte0, tlb->pte1, - 0, access_type, type)) { + 0, access_type)) { case -3: /* TLB inconsistency */ return -1; From patchwork Wed May 19 12:51:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442417 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1316074jac; Wed, 19 May 2021 06:21:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwq1IJVkUNOO0FFg9rQMQi/LNpRh/toZ7F9gQ6TIlmR7tAmWrBRVr2z68ahGuUpfpky816N X-Received: by 2002:a05:6638:260e:: with SMTP id m14mr12827049jat.83.1621430460924; Wed, 19 May 2021 06:21:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430460; cv=none; d=google.com; s=arc-20160816; b=XrIaVP8wsiTaNk2y60/CDnt/hVLYtMdwmLHkC7BbbKEe/HUfugLYbz+bCbhCsac+fr 5t9Ti95DaR0Kf4XhSQNMPgC+a8q053MET//K+Pe3QkVYHXFIVrq4r14NVgodqNlgB1Sa Md04UtR70BLmamc5wo/4q8H1DUaWK5pnFX3lHvZdNv6YK0qOjSJLZgd/p08J8S/BsmHH IkxJgVpXgwFcaeHUu5d/hntH+2hMDeGBze+iZN95hedmIlLDYJLknq3k7oe9Dle4FFap 2EamjdokgOURyV4/JB4YZrOqazELQtdlx7GwAOGAQ+HoGfAGY+BLI1BmijMOgM5SXGry safg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=a6GA4k0m8el6wbcAruOg8xSuHMtXW+bX75Yq+sclSUU=; b=Yv/3Vlvy6ZbYKgw/ZBXyTdwrJaio7ooiflplIB0DPOYWISRGZgYi42MMtJ6+PNclPB sSiihYyv45EsLQXr4FS+7pY+dWRCjTi1DcxNU1YbTgAH2Ufxsgk7sHcCYxrIlAjby9tv ADxVhdspsD58q7IHe+5U+1tA7F9NzJmrAML8ULgYd8IU+jPOVkrmv8UWLnEo6BAxs/XZ Ci6B2aGoB4hJsHxkKB1dOFxod00OZwruI228NyeX9xw07zKd4sMXTFksf4TdU1h0FxCz HZyiCZWogTOZ7lK51mRbEP35hAtCr4JoQ3EFITqefB5C0CnqHy1dFMK7kNfilkTAgYfu PZaw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=eqeovtGt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f10si12536722ilu.68.2021.05.19.06.21.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:21:00 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=eqeovtGt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:50338 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM8C-0005ee-BW for patch@linaro.org; Wed, 19 May 2021 09:21:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33750) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhr-0002bh-MG; Wed, 19 May 2021 08:53:47 -0400 Received: from ozlabs.org ([203.11.71.1]:35001) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhp-0001cx-Qf; Wed, 19 May 2021 08:53:47 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnq3ZW1z9tD4; Wed, 19 May 2021 22:52:15 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428735; bh=8tUdgfIdEqkaF1Yz6xbubshybQ+yxSkeZ1Oy1ZBYEZc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eqeovtGt5ESQZ/vJ6AwRVrww1wUL/H0mh2vKh8z37U2Qzco+hypwDbvP+WJIz0wza wCl+60GzgLJ87Dls1c928FxILpU3o9VogHy0JwwD2vZsJ3Gst4fzLlfG4SRg5vH3ag Qd7CZMIGoiFj435S362prwcl8vq4KiZM84i2aqt0= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 42/48] target/ppc: Remove type argument from ppc6xx_tlb_check Date: Wed, 19 May 2021 22:51:42 +1000 Message-Id: <20210519125148.27720-43-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We can now use MMU_INST_FETCH from access_type for this. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-10-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 0c10677ade..2f00955b80 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -288,8 +288,7 @@ static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way, } static int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, - MMUAccessType access_type, int type) + target_ulong eaddr, MMUAccessType access_type) { ppc6xx_tlb_t *tlb; int nr, best, way; @@ -298,8 +297,7 @@ static int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, best = -1; ret = -1; /* No TLB found */ for (way = 0; way < env->nb_ways; way++) { - nr = ppc6xx_tlb_getnum(env, eaddr, way, - type == ACCESS_CODE ? 1 : 0); + nr = ppc6xx_tlb_getnum(env, eaddr, way, access_type == MMU_INST_FETCH); tlb = &env->tlb.tlb6[nr]; /* This test "emulates" the PTE index match for hardware TLBs */ if ((eaddr & TARGET_PAGE_MASK) != tlb->EPN) { @@ -314,7 +312,7 @@ static int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, pte_is_valid(tlb->pte0) ? "valid" : "inval", tlb->EPN, eaddr, tlb->pte1, access_type == MMU_DATA_STORE ? 'S' : 'L', - type == ACCESS_CODE ? 'I' : 'D'); + access_type == MMU_INST_FETCH ? 'I' : 'D'); switch (ppc6xx_tlb_pte_check(ctx, tlb->pte0, tlb->pte1, 0, access_type)) { case -3: @@ -503,7 +501,7 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, /* Initialize real address with an invalid value */ ctx->raddr = (hwaddr)-1ULL; /* Software TLB search */ - ret = ppc6xx_tlb_check(env, ctx, eaddr, access_type, type); + ret = ppc6xx_tlb_check(env, ctx, eaddr, access_type); #if defined(DUMP_PAGE_TABLES) if (qemu_loglevel_mask(CPU_LOG_MMU)) { CPUState *cs = env_cpu(env); From patchwork Wed May 19 12:51:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442429 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1329581jac; Wed, 19 May 2021 06:34:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxh3lqRO+oYXyPt+I8aOrm44PTN/qlKNoMGsJRbk4anSX6TW6XNa+7bv23154SqqyWx++2B X-Received: by 2002:a05:6602:718:: with SMTP id f24mr9247587iox.59.1621431251634; Wed, 19 May 2021 06:34:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621431251; cv=none; d=google.com; s=arc-20160816; b=S4HxOdKHKRXntaLS5XUgjcLBUSPrHszh05TyKwcqgT5Z64kxtv4YLFe+jH57a8CQbp wWKAiFuFe4coDwqg/TbACZiI9TDtuw3ON41vlkLfIDfM2yMJIa7k/2rGsXAZkWqJ9eqt pNoh/uBayW9qCgJ7BzvvJj2Ls+bqp2KdO4Ctjw9Ha8hePuBpUfB3FTzsTCPzawwKfbGD aUOyahNxHOG27ESKeWS/pMOknPxNqvv+bk0ixJqFg0NEY5xwirJ8LOXL5un4vP1So9kE 1HBT2Yhbt1hvcrjbKewEF5AoH5HAeBbjNLXB5S7HYlddaFGiyTKipko9e1qSptpLL1e3 6N6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=njtnm8Iwj3dlWcn5zcifWXHovGffNT0Ch/Plh8RRecs=; b=K+y+t3jr5IjkNX44aNKcKwNZ0wZYyuiPIG2ERVqPEcLmgFEIth7AxhFqzfG0Bym/t6 2R28F5Teox5oon/0Ie9vbCamAWMvWmxaqM+qe3FDfZIeHlRBxQHEMgJoY1ZA6xeZQhbL 45uFC/W/PQ+/FHgEc4iZO2PfehKM4KeKTzPe4pBEVhU6CaIEcK7/F8txDYVLgicWVFcL qKJEJZLNcYOOhgngvGbjNHn8h3CNhv3GdlUqmyujqwiAOAIxrz3KZjoB1lwyeuiUoHgI 3N5cyLBJwpXgjdqq3otYKQ1oVTNOj3qjZ57VMQts7z68Qrm1/VV0NZauLIU4O8jiohhi th0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=VjXOUHae; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x18si1111474ilj.7.2021.05.19.06.34.11 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:34:11 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=VjXOUHae; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:36110 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMKx-0001Ye-4E for patch@linaro.org; Wed, 19 May 2021 09:34:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33752) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhr-0002cK-RJ; Wed, 19 May 2021 08:53:47 -0400 Received: from ozlabs.org ([203.11.71.1]:41239) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhq-0001dC-0U; Wed, 19 May 2021 08:53:47 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnr2bndz9s1l; Wed, 19 May 2021 22:52:15 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428736; bh=HvzS/W9peBFoqRQMJFUOSjaaY1iY7OVTY37oKn+DsfQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VjXOUHaeck5kPa6GfIghQUtC6wZ9CCbz66C/SVvnhZ0ZyAEXd+TrJI3TuBT0+rnZ/ mvV3YowDsqa/QNU6I8uMGS9vJ+Ck5Kv7axhgMUfsvjn7Z5sSIwZRDO6PV5H4iDVQYG Y9IGi4vMVY9xGFhRztrOXLLoUpCk64pzQk/tu/BQ= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 43/48] target/ppc: Remove type argument from get_bat_6xx_tlb Date: Wed, 19 May 2021 22:51:43 +1000 Message-Id: <20210519125148.27720-44-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We can now use MMU_INST_FETCH from access_type for this. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-11-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 2f00955b80..0eba8302ee 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -379,25 +379,22 @@ static inline void bat_size_prot(CPUPPCState *env, target_ulong *blp, } static int get_bat_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong virtual, MMUAccessType access_type, - int type) + target_ulong virtual, MMUAccessType access_type) { target_ulong *BATlt, *BATut, *BATu, *BATl; target_ulong BEPIl, BEPIu, bl; int i, valid, prot; int ret = -1; + bool ifetch = access_type == MMU_INST_FETCH; LOG_BATS("%s: %cBAT v " TARGET_FMT_lx "\n", __func__, - type == ACCESS_CODE ? 'I' : 'D', virtual); - switch (type) { - case ACCESS_CODE: + ifetch ? 'I' : 'D', virtual); + if (ifetch) { BATlt = env->IBAT[1]; BATut = env->IBAT[0]; - break; - default: + } else { BATlt = env->DBAT[1]; BATut = env->DBAT[0]; - break; } for (i = 0; i < env->nb_BATs; i++) { BATu = &BATut[i]; @@ -407,7 +404,7 @@ static int get_bat_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, bat_size_prot(env, &bl, &valid, &prot, BATu, BATl); LOG_BATS("%s: %cBAT%d v " TARGET_FMT_lx " BATu " TARGET_FMT_lx " BATl " TARGET_FMT_lx "\n", __func__, - type == ACCESS_CODE ? 'I' : 'D', i, virtual, *BATu, *BATl); + ifetch ? 'I' : 'D', i, virtual, *BATu, *BATl); if ((virtual & 0xF0000000) == BEPIu && ((virtual & 0x0FFE0000) & ~bl) == BEPIl) { /* BAT matches */ @@ -441,7 +438,7 @@ static int get_bat_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, LOG_BATS("%s: %cBAT%d v " TARGET_FMT_lx " BATu " TARGET_FMT_lx " BATl " TARGET_FMT_lx "\n\t" TARGET_FMT_lx " " TARGET_FMT_lx " " TARGET_FMT_lx "\n", - __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual, + __func__, ifetch ? 'I' : 'D', i, virtual, *BATu, *BATl, BEPIu, BEPIl, bl); } } @@ -1415,7 +1412,7 @@ static int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx, } else { /* Try to find a BAT */ if (env->nb_BATs != 0) { - ret = get_bat_6xx_tlb(env, ctx, eaddr, access_type, type); + ret = get_bat_6xx_tlb(env, ctx, eaddr, access_type); } if (ret < 0) { /* We didn't match any BAT entry or don't have BATs */ From patchwork Wed May 19 12:51:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442428 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1327273jac; Wed, 19 May 2021 06:31:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyp8gPYT+c/KsT/3xmJtbFQNPAvOQOHxPRxMRJtB9xTlfkfS95U2L3w5A2Wi+MD6mJifm66 X-Received: by 2002:a92:2004:: with SMTP id j4mr11141156ile.53.1621431117973; Wed, 19 May 2021 06:31:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621431117; cv=none; d=google.com; s=arc-20160816; b=CbVPUYqvD9u9eWRUBD4Lc7gwRBYJQUD5AxeYrFLVTAbt5MjTkTS9SHEvbRpshnL0e3 E2/TG56NOtTsJ+k+EKHFx801s1cPmrZBZ12vBmWQ1+n/pczi3MRD4LOHZgkZeV3ITklB KW9DoUIiuX2/njZsC/9K/hkk84x33vVNuBINBU+Ffn2vyUkZunDrV2ym7i1yhQO2bb/d 8jKkKMAjsg1UEULp4akgmD8mu6lBhOdv/fxiTfzTXGVEO750fxHzncbUM9cQ+6yl8ePD nJKDU94UFC+LA41EBbU/ltyKC32cTOrqNGUNHG8eD1JbVeESVbVtj4WrcdSaVnFEjay/ 5Jbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=iVhM7fJwQJldzZVio220onkGzqG/P6eHl0EsWBkJlBE=; b=TB10Mr25z84k3cu++NbcUjzG8AD6wltrXDYNd0UO/vOsUusrFa4bPuXcrqbcHLSuwK snKUXxbD3NXvAB8w3ftXvNyQVCxn0QPcbpuOMIjZAu7WX2tD2/+7eahZsR7On8iZ//h/ mp+eqLE8uflTmqLzmqz4noV7CmyHCUD3sdgLTh98LDtSY0ZYRHXJqIexBggKdBFVm0O6 y8orr6nC/j67qejwFqcmOLt52HRm/siskmNXUzdCVdjURp1ZyHI+FwhxRGhRzr1kV28K m3u7pBBiHlm1DXkhQga4fG38yh1J5BlppWiHhMyocrBPmXwKYoCK7PCFyQiNWDM62u+F vpMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b="dTq63/dn"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z8si26514191ilq.2.2021.05.19.06.31.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:31:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b="dTq63/dn"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:55902 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMIn-00048l-96 for patch@linaro.org; Wed, 19 May 2021 09:31:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33714) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhn-0002J5-LC; Wed, 19 May 2021 08:53:43 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:37755) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhj-0001jA-Um; Wed, 19 May 2021 08:53:42 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXns2D0kz9tD5; Wed, 19 May 2021 22:52:17 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428737; bh=lZKRM89jGQ5fffSDCjTPVVHmFfPRAxQ0VWRr7ZbUmek=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dTq63/dnxdnJ8svWNTKPFtTaN6B+QQw6VzCuV4Gk7592eqP/B7hHWk+4zZQNPwwPq MhTqE2lvsyL8i+PYKfRP/AR4lD1VfmlqiYiEygvRtLnN0TOVPWsuEt3BjcJYBaJTH0 4osCzByZSn4H7ddAVi8U9x8nabFvsmaTbM273T+8= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 44/48] target/ppc: Remove type argument from mmu40x_get_physical_address Date: Wed, 19 May 2021 22:51:44 +1000 Message-Id: <20210519125148.27720-45-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson It is no longer used. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-12-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 0eba8302ee..1426973b4d 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -662,8 +662,7 @@ static inline void ppc4xx_tlb_invalidate_all(CPUPPCState *env) static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong address, - MMUAccessType access_type, - int type) + MMUAccessType access_type) { ppcemb_tlb_t *tlb; hwaddr raddr; @@ -1426,8 +1425,7 @@ static int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx, if (real_mode) { ret = check_physical(env, ctx, eaddr, access_type); } else { - ret = mmu40x_get_physical_address(env, ctx, eaddr, - access_type, type); + ret = mmu40x_get_physical_address(env, ctx, eaddr, access_type); } break; case POWERPC_MMU_BOOKE: From patchwork Wed May 19 12:51:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442424 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1322782jac; Wed, 19 May 2021 06:27:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzuzy+kfRh8pzfCRsiOm5E26NdFcTI8C7Gql8tAYDLL+QUi5RuSrgJIIEh0M7sZZndAhyyF X-Received: by 2002:a92:d6c2:: with SMTP id z2mr11487714ilp.246.1621430852929; Wed, 19 May 2021 06:27:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430852; cv=none; d=google.com; s=arc-20160816; b=udA+73z4GE1LffROBYMKIywtbkM8eaR3/j6MSciQIQfZLlQOH3r/oY/g1zB5whdP4m HTQNpoyiVVFWcodtxlwZbhoOPLn80X0is2I+aylTW1SZ8D58aY8Oho47852r0F3j/kLy p2bj+X3XuIcQkCRLU+IC6VWtiYegwndVlcygsKN8fVop8j6NQemAh/A6OMCLLMpmpmDw q02YehOy+31NHpVLUblCUyAmrDaPFtP6Jn72pdcHA86ET50kV2SesCmnxTKtnu/wUKdT GqKzPcwTZJ7hBv17a4reSoXEOmth0vYGkzihT7Y37SqvGz589jrKBECnu6FLi+dxTxhx U95g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=yYN0Z/xOHSzkM3jLEbYCnBCbwL+bBmOVYOnlHZC8wvU=; b=LufGBNWxvfrLMDVeQ0qchWIWzqcOelKWtMfY689Oz1ibN907t+m7G88See+dydlWze aj8P8Xg0vWpJwYyo0meCm7xFPfGZERj4o5RZKU2Oa0GApQQ2XXO+cooocGiAUfTxQyro 8Bdg9d2Vf9Gs547qpa0yFbwY2gl1dGqNSIcgauK6biNpu5kfBn7Bn4YqSOj8o3H4yk8+ iDtaTyVBsZo1RZfYpwRc3KkdXHP/fGLPFZyUtz9ku91b/QCVTC/gaq3EfWLSmH8OpmdC 42/yCuqf7rc21gVCe7Ytiky4Yd0Hmuln7sex8XpdKOlMbj0MykI4apcRTJUKraCty8/o buxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=FacMkJ3R; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t128si30796613iof.16.2021.05.19.06.27.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:27:32 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=FacMkJ3R; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:45526 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMEW-0005Oj-AU for patch@linaro.org; Wed, 19 May 2021 09:27:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33726) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLho-0002Ow-TG; Wed, 19 May 2021 08:53:44 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:49581) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhl-0001kP-Rw; Wed, 19 May 2021 08:53:44 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnt1gTgz9sPf; Wed, 19 May 2021 22:52:17 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428738; bh=sipivPMIlLrzXZG/dcDLE4GTPmzZmFYDG/cqAob/gEY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FacMkJ3Rgoa6b8AAR2Pz2c7vlQDswNtxeiDHx2v3xHSfVSRbsD3dGB0coG0X2wGW0 5jxAkrspfsYhbFgKP7WwC6+fSL0Yr8Jmg5xoNaD7rFnQ1wqmFV777wP8OjjazRgCtr HNPIAXT/n2YQoc+du3pfhUOxIwK46m4d+in+qVIA= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 45/48] target/ppc: Remove type argument from mmubooke_check_tlb Date: Wed, 19 May 2021 22:51:45 +1000 Message-Id: <20210519125148.27720-46-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We can now use MMU_INST_FETCH from access_type for this. Unify the I/D code paths, making use of prot_for_access_type. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-13-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 44 ++++++++++++----------------------------- 1 file changed, 13 insertions(+), 31 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 1426973b4d..4e5cc11b44 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -738,9 +738,9 @@ void store_40x_sler(CPUPPCState *env, uint32_t val) static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb, hwaddr *raddr, int *prot, target_ulong address, - MMUAccessType access_type, int type, int i) + MMUAccessType access_type, int i) { - int ret, prot2; + int prot2; if (ppcemb_tlb_check(env, tlb, raddr, address, env->spr[SPR_BOOKE_PID], @@ -772,37 +772,19 @@ found_tlb: } /* Check the address space */ - if (type == ACCESS_CODE) { - if (msr_ir != (tlb->attr & 1)) { - LOG_SWTLB("%s: AS doesn't match\n", __func__); - return -1; - } - - *prot = prot2; - if (prot2 & PAGE_EXEC) { - LOG_SWTLB("%s: good TLB!\n", __func__); - return 0; - } - - LOG_SWTLB("%s: no PAGE_EXEC: %x\n", __func__, prot2); - ret = -3; - } else { - if (msr_dr != (tlb->attr & 1)) { - LOG_SWTLB("%s: AS doesn't match\n", __func__); - return -1; - } - - *prot = prot2; - if (prot2 & (access_type == MMU_DATA_LOAD ? PAGE_READ : PAGE_WRITE)) { - LOG_SWTLB("%s: found TLB!\n", __func__); - return 0; - } + if ((access_type == MMU_INST_FETCH ? msr_ir : msr_dr) != (tlb->attr & 1)) { + LOG_SWTLB("%s: AS doesn't match\n", __func__); + return -1; + } - LOG_SWTLB("%s: PAGE_READ/WRITE doesn't match: %x\n", __func__, prot2); - ret = -2; + *prot = prot2; + if (prot2 & prot_for_access_type(access_type)) { + LOG_SWTLB("%s: good TLB!\n", __func__); + return 0; } - return ret; + LOG_SWTLB("%s: no prot match: %x\n", __func__, prot2); + return access_type == MMU_INST_FETCH ? -3 : -2; } static int mmubooke_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, @@ -819,7 +801,7 @@ static int mmubooke_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, for (i = 0; i < env->nb_tlb; i++) { tlb = &env->tlb.tlbe[i]; ret = mmubooke_check_tlb(env, tlb, &raddr, &ctx->prot, address, - access_type, type, i); + access_type, i); if (ret != -1) { break; } From patchwork Wed May 19 12:51:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442427 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1325805jac; Wed, 19 May 2021 06:30:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwFz1AebnZ9kdB1EndjZ7krfmCaT4nlvTuY5k0p8h5nuShoWdMYhDM0zu2xINWNii0iYLZz X-Received: by 2002:a92:c541:: with SMTP id a1mr6246975ilj.99.1621431036651; Wed, 19 May 2021 06:30:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621431036; cv=none; d=google.com; s=arc-20160816; b=YieF5L6J0x8s/JyNURtBTLxS+Dl/tKsZISX6GnO8A3IHvwwE8yExPECrOafUG3nxEL VPvdudapCpj9xGwiKwPSfYJa97/4QrpL5oUxB0eYghZzHxtY5ktW/Okk2u8q7WZ294Xz s6HzoYBR6faoZ4znD+sK1NVayWa/npJwQEW2jXiWxxCTIPeG+X27llS9sbmD3oxjNugn Hakvw1W37dM3XSEERy648zql2ljkH/UbtBBFQyjpItdNKMBsspkh9y4qa21MYfe+vclo Wd7UHBgSPdUBF5ceSYIOEB4/ctaGRd9ByDYelxI3dIH6LHEHDK07/MMR6yhVJip9FLvu QtqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=P8rCORwELfbyr6fm64JVIUn7xSZtS8u9MLmvnZPcM4I=; b=Umi+25dnWlwipbyk8CEuwb2JRGSCPNbFma0C1Lyfu1Bm//XX7QvqeCgRyYWldGp71V 5NGxl0H2pppvAEslSSLIK5fo7TCxTVN508BPvk5OkMk55jTeR5EpgOtxG0OmGXGbCWS4 fQ4MKpG2zA1McrlLNA12Mg9cSN9XS+goANxpuXo5/ipUO26gKOFdKIwZB1KCFyArD2rN Fi+1W/DgeqxF8qA3ybTfokuc1WMJuF7C4vkCQGBgc09OqCLUUQfYgAxeViSAo2P9+1Qc 4p8JeNQSl3yWGMUSa79O+sz4WtFcoDpwG69M0Hiz14DgFkSaOkg3xbIoP5sR8uin+3Dq Zxqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=WL3bMujj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z25si24452547ior.21.2021.05.19.06.30.36 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:30:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=WL3bMujj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:53698 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMHU-0002dt-0z for patch@linaro.org; Wed, 19 May 2021 09:30:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33854) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLi9-0003mC-FD; Wed, 19 May 2021 08:54:05 -0400 Received: from ozlabs.org ([203.11.71.1]:45529) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLi7-0001lX-My; Wed, 19 May 2021 08:54:05 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnv0c2Fz9sW4; Wed, 19 May 2021 22:52:18 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428739; bh=q4+HBdkEmxsP6UfQyseNs8hlAjJHCKfGvZ9rqVlm7xQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WL3bMujjnykOCFyBM6hXq7dEO3NsfMap2zKoMX5YPX2FnNvvdYJQkpao4E5EsuSvB 54MluyYtstJbaZXAFXgfVXTU328xdB41Z9rhs95wS7QbtwHHLMltC4NeF4Y+/7X30O 0dPgfS/jMXaLWt719n20Ip/dlR6BdsFp47cV+Hfw= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 46/48] target/ppc: Remove type argument from mmubooke_get_physical_address Date: Wed, 19 May 2021 22:51:46 +1000 Message-Id: <20210519125148.27720-47-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson It is no longer used. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-14-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 4e5cc11b44..7535a1aa7d 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -789,8 +789,7 @@ found_tlb: static int mmubooke_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong address, - MMUAccessType access_type, - int type) + MMUAccessType access_type) { ppcemb_tlb_t *tlb; hwaddr raddr; @@ -1411,8 +1410,7 @@ static int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx, } break; case POWERPC_MMU_BOOKE: - ret = mmubooke_get_physical_address(env, ctx, eaddr, - access_type, type); + ret = mmubooke_get_physical_address(env, ctx, eaddr, access_type); break; case POWERPC_MMU_BOOKE206: ret = mmubooke206_get_physical_address(env, ctx, eaddr, access_type, From patchwork Wed May 19 12:51:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442426 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1325474jac; Wed, 19 May 2021 06:30:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyHxiMjxKMxyZXQ/Ma4VlnuQvzqiLEBu0A6MNcj42gWgFaalj6hKoyVzBsz/JffFvGwaeag X-Received: by 2002:a5d:94ce:: with SMTP id y14mr10289680ior.67.1621431016350; Wed, 19 May 2021 06:30:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621431016; cv=none; d=google.com; s=arc-20160816; b=KKxsF+pHmV9mZD3SagkUflf0OREGeq9D2JNChH4vsdgrDaClDMEq531i/riXz5bMdg fLHnz+3IOZ0e2KvUdEfL89oOt2yxjOGUpiZEo4k9o7BUDk6E+7kRrl+DMayO+EXXWN1J YOBA/Jj2n/JYe++by6g3Q98WRHPafkbo08D/PwZfV8MszxYw1tdnS7vZD9dOZbkUi9KZ yuV9HdcyySsUrEsfZrSVyAqoPQKeJe63YE7d+D83HUXV75pGxJhQK/HpQnB+n+EzoRd6 PwG8s47hqQ9+lAkw6hvVyPKxBOO72RCcNI7IWptfsc1CapICMrMEJk+oHMRa8Fafhc41 OnWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=4fqYAoCz7quar3hSf+SfjDAcCI1khQy1Qeb64sb5IIs=; b=z30Kz4y8ciCIM7GNYn8iBGGgY1l245SbGRJJ8pY/BRXwvZc2+CIyfhZTqsd78fy71U llheWwHFbIrJ4cujbQwr+geh6m1veY1zHgLYY8o0pb7WF9i8KIeXA6K4jDJhXl+7rFd6 OcCiVRfkUkGWRywexXcRAPtREJzE4eifU27KOfxW/Z27F4D5Ym/fmydRByxbPApbuqCg INyzdn8tHtObtuiAvK0L4riQMpNBoAbiMKEj8GYdy/icTaZw/FQwqeyAAEUIit2RSYdm fQXjy+ij8bxCF4PULSgbN5cX1oS23beTq87bKaSxbwGiY0800EfhX6zQJNoXP4EVE7c1 wNkw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=IhSX28fS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g10si26553447iow.86.2021.05.19.06.30.16 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:30:16 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=IhSX28fS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:52746 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMH9-0001xc-NP for patch@linaro.org; Wed, 19 May 2021 09:30:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33874) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLiA-0003rX-Rf; Wed, 19 May 2021 08:54:07 -0400 Received: from ozlabs.org ([203.11.71.1]:35721) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLi7-0001lZ-OE; Wed, 19 May 2021 08:54:06 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnv3vbfz9sWp; Wed, 19 May 2021 22:52:19 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428739; bh=umesooVcUeFH4XPX81RM+rIlHRDgiF1YwCRIpSTNnjg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IhSX28fSoIUYsS4Gw6MB5NvLp14+yMQ+kBUCmjm8Q/KDdQbkmydpDsyFYPrcjppvW EbfUW1hDJLCSNMOd0Ndb9fnMy2+yfIC4pawY5NeG/hmVMbSRXfZmsVQXFmVoalfTBJ LbLO0s220j2Ha99UbIyn699YBHSaqUZbmBCNLrL4= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 47/48] target/ppc: Remove type argument from mmubooke206_check_tlb Date: Wed, 19 May 2021 22:51:47 +1000 Message-Id: <20210519125148.27720-48-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We can now use MMU_INST_FETCH from access_type for this. Unify the I/D code paths, making use of prot_for_access_type. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-15-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 46 ++++++++++++++--------------------------- 1 file changed, 15 insertions(+), 31 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 7535a1aa7d..144a14abd9 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -944,10 +944,8 @@ static bool mmubooke206_get_as(CPUPPCState *env, static int mmubooke206_check_tlb(CPUPPCState *env, ppcmas_tlb_t *tlb, hwaddr *raddr, int *prot, target_ulong address, - MMUAccessType access_type, - int type, int mmu_idx) + MMUAccessType access_type, int mmu_idx) { - int ret; int prot2 = 0; uint32_t epid; bool as, pr; @@ -1004,39 +1002,25 @@ found_tlb: } /* Check the address space and permissions */ - if (type == ACCESS_CODE) { + if (access_type == MMU_INST_FETCH) { /* There is no way to fetch code using epid load */ assert(!use_epid); - if (msr_ir != ((tlb->mas1 & MAS1_TS) >> MAS1_TS_SHIFT)) { - LOG_SWTLB("%s: AS doesn't match\n", __func__); - return -1; - } - - *prot = prot2; - if (prot2 & PAGE_EXEC) { - LOG_SWTLB("%s: good TLB!\n", __func__); - return 0; - } - - LOG_SWTLB("%s: no PAGE_EXEC: %x\n", __func__, prot2); - ret = -3; - } else { - if (as != ((tlb->mas1 & MAS1_TS) >> MAS1_TS_SHIFT)) { - LOG_SWTLB("%s: AS doesn't match\n", __func__); - return -1; - } + as = msr_ir; + } - *prot = prot2; - if (prot2 & (access_type == MMU_DATA_LOAD ? PAGE_READ : PAGE_WRITE)) { - LOG_SWTLB("%s: found TLB!\n", __func__); - return 0; - } + if (as != ((tlb->mas1 & MAS1_TS) >> MAS1_TS_SHIFT)) { + LOG_SWTLB("%s: AS doesn't match\n", __func__); + return -1; + } - LOG_SWTLB("%s: PAGE_READ/WRITE doesn't match: %x\n", __func__, prot2); - ret = -2; + *prot = prot2; + if (prot2 & prot_for_access_type(access_type)) { + LOG_SWTLB("%s: good TLB!\n", __func__); + return 0; } - return ret; + LOG_SWTLB("%s: no prot match: %x\n", __func__, prot2); + return access_type == MMU_INST_FETCH ? -3 : -2; } static int mmubooke206_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, @@ -1060,7 +1044,7 @@ static int mmubooke206_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, continue; } ret = mmubooke206_check_tlb(env, tlb, &raddr, &ctx->prot, address, - access_type, type, mmu_idx); + access_type, mmu_idx); if (ret != -1) { goto found_tlb; } From patchwork Wed May 19 12:51:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442430 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1332469jac; Wed, 19 May 2021 06:37:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxl4gplIcKRrPEWkBRjfymD0OuoXWaUbPFD86ay7pTpK9C5kdWdFWZzfTrxAyhrN9bSokG9 X-Received: by 2002:a05:6638:cc9:: with SMTP id e9mr13274111jak.46.1621431445042; Wed, 19 May 2021 06:37:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621431445; cv=none; d=google.com; s=arc-20160816; b=ypvm0ZimveMXxPIt5zQuE2u5gKQFdk61hnuk1ENxN8t2l6j0cQ47KIJDTcE/Ipg/bB 1mauxzn66jSjudQ2Ln9KB8079QrJ87IziTSf+FMpQeOBRkwBiBR9FRC+3UjtWqF2X5YM RZltGtH6ZB31NVGwMeyHblcYpNJxK+SOwKh/0NDaB3G/EAAcVdmPWZILnFgvA3zFsyGy IdpZISG8ftYrOLWia74IpDcB4JRwBk3CGGPr1cVM/eCsdIn691MVQxzxcYrsy0oI6z40 w7ixb6m+uvX1H4g/bBgh0g/o+CrkE8ad1DgI9NW2WmSesBGuy9uPnZKZ4UQ1nKyeXHI4 B9sA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=MO/ypVOYgqW5ES4zur++smatki90ben85kkvDgcwaSY=; b=PrbFRlVNAX7dMHgaQV1Hyv2+eHeQiVV2bousSBRXzRrdPtv28EYtd9JxlqOeTX6fIS TFZPpcPffM10BslwoGTC7j8vbGFQsO2wDSuGcMCPUawrWhjMu2+IteZV8zDRRSwjpPeC tmLLOyMs/lERKjnrERmTB8lv67zjPe+6Pgin0cKSnRY2SZl0m+vcKzZdD/RtDEzMuRSs lnC0cERTtLFfvQ/444W6+InIDXzChB0YyBezSHhqtMfQfPSXXQCwmKOersdlUieHUOje /kUL3tZoJhTGcXGk/Mb3b1FWLd85RO7280QibZ0VAPYotJgI49g6QYOcdUrBHhyBuKHU anzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=grH9J5R2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g3si13702990jan.54.2021.05.19.06.37.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:37:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=grH9J5R2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:44796 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljMO4-0007VM-Gr for patch@linaro.org; Wed, 19 May 2021 09:37:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33872) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLiA-0003rS-SM; Wed, 19 May 2021 08:54:07 -0400 Received: from ozlabs.org ([203.11.71.1]:52777) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLi8-0001mU-BT; Wed, 19 May 2021 08:54:06 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnv6ltXz9sWl; Wed, 19 May 2021 22:52:19 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428739; bh=a8ezrDhP56G/3k0UPoFxLdwiJbNoCTDgOHu1OoN77F8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=grH9J5R2mCpS1Y4Hf0ZQzGTkpa7zgyeXBQ/n/IcErQYqVk3By0WYyTMM9HUzwvtat 3cezgqcAWvKAU64y0dND2GRkBxgylD7qRensnb4K/sTF30U21GSfyT5pB+OR6g0rJP K/Z283QVEWmthSpQBKiEtpLrkwkSMoThumPkmeRU= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 48/48] target/ppc: Remove type argument for mmubooke206_get_physical_address Date: Wed, 19 May 2021 22:51:48 +1000 Message-Id: <20210519125148.27720-49-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson It is no longer used. Signed-off-by: Richard Henderson Message-Id: <20210518201146.794854-16-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 144a14abd9..37986c59ba 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -1026,7 +1026,7 @@ found_tlb: static int mmubooke206_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong address, MMUAccessType access_type, - int type, int mmu_idx) + int mmu_idx) { ppcmas_tlb_t *tlb; hwaddr raddr; @@ -1398,7 +1398,7 @@ static int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx, break; case POWERPC_MMU_BOOKE206: ret = mmubooke206_get_physical_address(env, ctx, eaddr, access_type, - type, mmu_idx); + mmu_idx); break; case POWERPC_MMU_MPC8xx: /* XXX: TODO */