From patchwork Thu May 27 06:12:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 449021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D362C4708C for ; Thu, 27 May 2021 06:13:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 11142613DA for ; Thu, 27 May 2021 06:13:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229878AbhE0GO6 (ORCPT ); Thu, 27 May 2021 02:14:58 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:59879 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229829AbhE0GO5 (ORCPT ); Thu, 27 May 2021 02:14:57 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1622096004; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=lXTsfZqPcbDCxCHnsnI5ikdYUjfJEBZAI3C9A6ale4U=; b=vEYfG44NIdrjLa3ykNKbrCWy8vEs1Tpcyd2cPRQGV4KhAsqvsYCLgkNuLNpWYBQDvIonVtSs pFpKBAhezpmCjOKPaLKR4g2B2VHXG2Hpq2QrCKqunjUZmDdd+2JX0eEVc0kO7Or6pwWfxRgG q20Uc11bqCFYwYzg6f4zB7792i4= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-west-2.postgun.com with SMTP id 60af386df752fca66830b2e1 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 27 May 2021 06:13:01 GMT Sender: rnayak=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 920D7C43460; Thu, 27 May 2021 06:13:01 +0000 (UTC) Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak) by smtp.codeaurora.org (Postfix) with ESMTPSA id B8009C43217; Thu, 27 May 2021 06:12:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B8009C43217 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: ulf.hansson@linaro.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, viresh.kumar@linaro.org Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, swboyd@chromium.org, rojay@codeaurora.org, Rajendra Nayak Subject: [PATCH v2 1/3] dt-bindings: power: Introduce 'assigned-performance-states' property Date: Thu, 27 May 2021 11:42:27 +0530 Message-Id: <1622095949-2014-2-git-send-email-rnayak@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1622095949-2014-1-git-send-email-rnayak@codeaurora.org> References: <1622095949-2014-1-git-send-email-rnayak@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org While most devices within power-domains which support performance states, scale the performance state dynamically, some devices might want to set a static/default performance state while the device is active. These devices typically would also run off a fixed clock and not support dynamically scaling the device's performance, also known as DVFS techniques. Add a property 'assigned-performance-states' which client devices can use to set this default performance state on their power-domains. Signed-off-by: Rajendra Nayak Reviewed-by: Ulf Hansson --- .../devicetree/bindings/power/power-domain.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml index aed51e9..88cebf2 100644 --- a/Documentation/devicetree/bindings/power/power-domain.yaml +++ b/Documentation/devicetree/bindings/power/power-domain.yaml @@ -66,6 +66,19 @@ properties: by the given provider should be subdomains of the domain specified by this binding. + assigned-performance-states: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Some devices might need to configure their power domains in a default + performance state while the device is active. These devices typically + would also run off a fixed clock and not support dynamically scaling the + device's performance, also known as DVFS techniques. The list of performance + state values should correspond to the list of power domains specified as part + of the power-domains property. Each cell corresponds to one power-domain. + A value of 0 can be used for power-domains with no performance state + requirement. In case the power-domains have OPP tables associated, the values + here would typically match with one of the entries in the OPP table. + required: - "#power-domain-cells" @@ -131,3 +144,40 @@ examples: min-residency-us = <7000>; }; }; + + - | + parent4: power-controller@12340000 { + compatible = "foo,power-controller"; + reg = <0x12340000 0x1000>; + #power-domain-cells = <0>; + }; + + parent5: power-controller@43210000 { + compatible = "foo,power-controller"; + reg = <0x43210000 0x1000>; + #power-domain-cells = <0>; + operating-points-v2 = <&power_opp_table>; + + power_opp_table: opp-table { + compatible = "operating-points-v2"; + + power_opp_low: opp1 { + opp-level = <16>; + }; + + rpmpd_opp_ret: opp2 { + opp-level = <64>; + }; + + rpmpd_opp_svs: opp3 { + opp-level = <256>; + }; + }; + }; + + child4: consumer@12341000 { + compatible = "foo,consumer"; + reg = <0x12341000 0x1000>; + power-domains = <&parent4>, <&parent5>; + assigned-performance-states = <0>, <256>; + }; From patchwork Thu May 27 06:12:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 449022 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 551CDC47089 for ; Thu, 27 May 2021 06:13:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 31527613DC for ; Thu, 27 May 2021 06:13:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230107AbhE0GOy (ORCPT ); Thu, 27 May 2021 02:14:54 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:32521 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229851AbhE0GOs (ORCPT ); Thu, 27 May 2021 02:14:48 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1622095996; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=3hOmE0VPR1A3EJosKoBXOYdxI8H1foQzRse78k1n4cQ=; b=w6X+MQovLDmXpz/BVNrZPUPhW0UeEFxEEoC1QVcDLJpau7Km+CjVEiLH2TGbA0YXRKAaB/CX jBQUJPeAXkMMzVnrUVGVkMssF9QadeBqSdIXELWGJK24MVnqCgAgsd8C/EvQck4sJmLtjVsx TD+1JO5Jfi0hkMPzvaAiN24WUUs= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n01.prod.us-east-1.postgun.com with SMTP id 60af3871063320cd13807ec0 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 27 May 2021 06:13:05 GMT Sender: rnayak=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id F3113C433D3; Thu, 27 May 2021 06:13:04 +0000 (UTC) Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6B434C4338A; Thu, 27 May 2021 06:13:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6B434C4338A Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: ulf.hansson@linaro.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, viresh.kumar@linaro.org Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, swboyd@chromium.org, rojay@codeaurora.org, Rajendra Nayak Subject: [PATCH v2 2/3] PM / Domains: Add support for 'assigned-performance-states' Date: Thu, 27 May 2021 11:42:28 +0530 Message-Id: <1622095949-2014-3-git-send-email-rnayak@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1622095949-2014-1-git-send-email-rnayak@codeaurora.org> References: <1622095949-2014-1-git-send-email-rnayak@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For devices which have 'assigned-performance-states' specified in DT, set the specified performance state during attach and drop it on detach. Also drop/set as part of runtime suspend/resume callbacks. Signed-off-by: Rajendra Nayak --- drivers/base/power/domain.c | 27 +++++++++++++++++++++++++++ include/linux/pm_domain.h | 1 + 2 files changed, 28 insertions(+) diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c index b6a782c..145ce12 100644 --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c @@ -888,6 +888,10 @@ static int genpd_runtime_suspend(struct device *dev) if (irq_safe_dev_in_no_sleep_domain(dev, genpd)) return 0; + /* Drop the assigned performance state */ + if (dev_gpd_data(dev)->assigned_pstate) + dev_pm_genpd_set_performance_state(dev, 0); + genpd_lock(genpd); genpd_power_off(genpd, true, 0); genpd_unlock(genpd); @@ -907,6 +911,7 @@ static int genpd_runtime_resume(struct device *dev) { struct generic_pm_domain *genpd; struct gpd_timing_data *td = &dev_gpd_data(dev)->td; + unsigned int assigned_pstate = dev_gpd_data(dev)->assigned_pstate; bool runtime_pm = pm_runtime_enabled(dev); ktime_t time_start; s64 elapsed_ns; @@ -935,6 +940,9 @@ static int genpd_runtime_resume(struct device *dev) if (ret) return ret; + /* Set the assigned performance state */ + if (assigned_pstate) + dev_pm_genpd_set_performance_state(dev, assigned_pstate); out: /* Measure resume latency. */ time_start = 0; @@ -967,6 +975,8 @@ static int genpd_runtime_resume(struct device *dev) genpd_stop_dev(genpd, dev); err_poweroff: if (!pm_runtime_is_irq_safe(dev) || genpd_is_irq_safe(genpd)) { + if (assigned_pstate) + dev_pm_genpd_set_performance_state(dev, 0); genpd_lock(genpd); genpd_power_off(genpd, true, 0); genpd_unlock(genpd); @@ -2568,6 +2578,12 @@ static void genpd_dev_pm_detach(struct device *dev, bool power_off) dev_dbg(dev, "removing from PM domain %s\n", pd->name); + /* Drop the assigned performance state */ + if (dev_gpd_data(dev)->assigned_pstate) { + dev_pm_genpd_set_performance_state(dev, 0); + dev_gpd_data(dev)->assigned_pstate = 0; + } + for (i = 1; i < GENPD_RETRY_MAX_MS; i <<= 1) { ret = genpd_remove_device(pd, dev); if (ret != -EAGAIN) @@ -2605,6 +2621,7 @@ static void genpd_dev_pm_sync(struct device *dev) static int __genpd_dev_pm_attach(struct device *dev, struct device *base_dev, unsigned int index, bool power_on) { + unsigned int assigned_pstate; struct of_phandle_args pd_args; struct generic_pm_domain *pd; int ret; @@ -2648,6 +2665,16 @@ static int __genpd_dev_pm_attach(struct device *dev, struct device *base_dev, if (ret) genpd_remove_device(pd, dev); + /* Set the assigned performance state */ + if (!of_property_read_u32_index(base_dev->of_node, + "assigned-performance-states", + index, &assigned_pstate)) { + if (assigned_pstate) { + dev_pm_genpd_set_performance_state(dev, assigned_pstate); + dev_gpd_data(dev)->assigned_pstate = assigned_pstate; + } + } + return ret ? -EPROBE_DEFER : 1; } diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index dfcfbce..71c1b11 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -198,6 +198,7 @@ struct generic_pm_domain_data { struct notifier_block *power_nb; int cpu; unsigned int performance_state; + unsigned int assigned_pstate; ktime_t next_wakeup; void *data; }; From patchwork Thu May 27 06:12:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 449699 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FF46C4707F for ; Thu, 27 May 2021 06:13:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2FCBD613D4 for ; Thu, 27 May 2021 06:13:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229861AbhE0GO5 (ORCPT ); Thu, 27 May 2021 02:14:57 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:57163 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229836AbhE0GOx (ORCPT ); Thu, 27 May 2021 02:14:53 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1622096000; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=JvgOHm6a2wLmPx0HPIhq/3P0bq9FPp9/PY1rUljh0ag=; b=wm1bwqiF3KfYU4do+/40cugF877u/np39nMtt4ypFvj7lxw679OGRUiIYci0RnWf1BajwKF6 rmLE+LzerJXqIHX/uHCfaRXPLs/3wtAezTqY8Ijvw/NqiisKIoT5CXZNzKjuZ+wmMgpQDa8D FRWDGe/+g4FCXcZUdTKXodGXKGs= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-east-1.postgun.com with SMTP id 60af3875b15734c8f910417e (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 27 May 2021 06:13:09 GMT Sender: rnayak=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 33AFDC4323A; Thu, 27 May 2021 06:13:09 +0000 (UTC) Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak) by smtp.codeaurora.org (Postfix) with ESMTPSA id 1EDE5C433F1; Thu, 27 May 2021 06:13:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1EDE5C433F1 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: ulf.hansson@linaro.org, robh+dt@kernel.org, bjorn.andersson@linaro.org, viresh.kumar@linaro.org Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, swboyd@chromium.org, rojay@codeaurora.org, Rajendra Nayak Subject: [PATCH v2 3/3] arm64: dts: sc7180: Add assigned-performance-states for i2c Date: Thu, 27 May 2021 11:42:29 +0530 Message-Id: <1622095949-2014-4-git-send-email-rnayak@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1622095949-2014-1-git-send-email-rnayak@codeaurora.org> References: <1622095949-2014-1-git-send-email-rnayak@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org qup-i2c devices on sc7180 are clocked with a fixed clock (19.2 MHz) Though qup-i2c does not support DVFS, it still needs to vote for a performance state on 'CX' to satisfy the 19.2 Mhz clock frequency requirement. Use 'assigned-performance-states' to pass this information from device tree, and also add the power-domains property to specify the cx power-domain. Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 6228ba2..7914084 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -786,8 +786,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; spi0: spi@880000 { @@ -838,8 +840,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; spi1: spi@884000 { @@ -890,8 +894,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; uart2: serial@888000 { @@ -924,8 +930,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; spi3: spi@88c000 { @@ -976,8 +984,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; uart4: serial@890000 { @@ -1010,8 +1020,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; spi5: spi@894000 { @@ -1077,8 +1089,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; spi6: spi@a80000 { @@ -1129,8 +1143,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; uart7: serial@a84000 { @@ -1163,8 +1179,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; spi8: spi@a88000 { @@ -1215,8 +1233,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; uart9: serial@a8c000 { @@ -1249,8 +1269,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; spi10: spi@a90000 { @@ -1301,8 +1323,10 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = ; status = "disabled"; }; spi11: spi@a94000 {